15 lines
261 B
Systemverilog
15 lines
261 B
Systemverilog
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`ifndef MEMORY_IF_SV
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`define MEMORY_IF_SV
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interface memory_if(input clk, input rst);
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logic [1 : 0] addr;
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logic rw;
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logic en;
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logic [7 : 0] data_i;
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logic [7 : 0] data_o;
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endinterface : memory_if
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`endif
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