130 lines
5.1 KiB
Systemverilog
130 lines
5.1 KiB
Systemverilog
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`ifndef TEST_LIB_SV
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`define TEST_LIB_SV
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//=============================================================================
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// Additional Calc1 tests, built on top of test_base.
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//=============================================================================
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//-----------------------------------------------------------------------------
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// Broad random regression: exercises every command, every port, both ALUs,
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// corner cases and a few illegal commands. Good for coverage closure.
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//-----------------------------------------------------------------------------
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class test_random extends test_base;
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`uvm_component_utils(test_random)
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function new(string name = "test_random", uvm_component parent = null);
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super.new(name,parent);
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endfunction : new
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task main_phase(uvm_phase phase);
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calc_simple_seq rnd;
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calc_alu_seq alu;
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calc_shift_seq sh;
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calc_diff_port_seq dp;
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calc_same_port_seq sp;
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calc_shift_amounts_seq sa;
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calc_corner_seq cor;
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phase.raise_objection(this);
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`uvm_info(get_type_name(), "Starting random regression", UVM_LOW)
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repeat (3) begin
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rnd = calc_simple_seq::type_id::create("rnd");
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void'(rnd.randomize());
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rnd.start(env.agent.seqr);
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end
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alu = calc_alu_seq::type_id::create("alu"); void'(alu.randomize()); alu.start(env.agent.seqr);
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sh = calc_shift_seq::type_id::create("sh"); void'(sh.randomize()); sh.start(env.agent.seqr);
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dp = calc_diff_port_seq::type_id::create("dp"); void'(dp.randomize()); dp.start(env.agent.seqr);
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sp = calc_same_port_seq::type_id::create("sp"); void'(sp.randomize()); sp.start(env.agent.seqr);
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sa = calc_shift_amounts_seq::type_id::create("sa"); sa.start(env.agent.seqr);
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cor = calc_corner_seq::type_id::create("cor"); cor.start(env.agent.seqr);
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phase.drop_objection(this);
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endtask : main_phase
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endclass : test_random
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//-----------------------------------------------------------------------------
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// Sanity test: only spec-conformant traffic. Expected result: 0 UVM_ERRORs.
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// Proves the environment (driver/monitor/scoreboard/reference model) is sound
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// and free of false positives.
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//-----------------------------------------------------------------------------
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class test_sanity extends test_base;
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`uvm_component_utils(test_sanity)
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function new(string name = "test_sanity", uvm_component parent = null);
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super.new(name,parent);
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endfunction : new
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task main_phase(uvm_phase phase);
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calc_known_good_seq good;
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phase.raise_objection(this);
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`uvm_info(get_type_name(), "Running directed known-good vectors (expect 0 errors)", UVM_LOW)
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repeat (3) begin
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good = calc_known_good_seq::type_id::create("good");
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good.start(env.agent.seqr);
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end
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phase.drop_objection(this);
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endtask : main_phase
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endclass : test_sanity
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//-----------------------------------------------------------------------------
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// Directed corner / error test: overflow, underflow, equal-subtract, invalid.
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//-----------------------------------------------------------------------------
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class test_corner extends test_base;
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`uvm_component_utils(test_corner)
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function new(string name = "test_corner", uvm_component parent = null);
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super.new(name,parent);
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endfunction : new
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task main_phase(uvm_phase phase);
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calc_corner_seq cor;
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calc_invalid_seq inv;
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calc_shift_amounts_seq sa;
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phase.raise_objection(this);
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cor = calc_corner_seq::type_id::create("cor"); cor.start(env.agent.seqr);
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inv = calc_invalid_seq::type_id::create("inv"); inv.start(env.agent.seqr);
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sa = calc_shift_amounts_seq::type_id::create("sa"); sa.start(env.agent.seqr);
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phase.drop_objection(this);
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endtask : main_phase
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endclass : test_corner
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//-----------------------------------------------------------------------------
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// Factory-override demo (Vezba 9, Zadatak): a transaction that never uses SUB.
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//-----------------------------------------------------------------------------
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class calc_seq_item_no_sub extends calc_seq_item;
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`uvm_object_utils(calc_seq_item_no_sub)
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constraint c_no_sub { cmd != CMD_SUB; }
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function new(string name = "calc_seq_item_no_sub");
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super.new(name);
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endfunction
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endclass : calc_seq_item_no_sub
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class test_no_sub extends test_base;
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`uvm_component_utils(test_no_sub)
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calc_simple_seq simple_seq;
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function new(string name = "test_no_sub", uvm_component parent = null);
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super.new(name,parent);
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endfunction : new
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function void build_phase(uvm_phase phase);
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super.build_phase(phase);
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// every calc_seq_item created in the environment becomes a no-sub item
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calc_seq_item::type_id::set_type_override(calc_seq_item_no_sub::get_type());
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simple_seq = calc_simple_seq::type_id::create("simple_seq");
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endfunction : build_phase
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task main_phase(uvm_phase phase);
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phase.raise_objection(this);
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void'(simple_seq.randomize());
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simple_seq.start(env.agent.seqr);
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phase.drop_objection(this);
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endtask : main_phase
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endclass : test_no_sub
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`endif
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