commit 59e71f32976bd377d4b01f4b0c6bca111f915e4a Author: embedded Date: Fri Jun 12 07:53:32 2026 +0200 init diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/docs/APB_UVC.pdf b/code/Vezba 13 - prateci materijal/apb_uvc/docs/APB_UVC.pdf new file mode 100644 index 0000000..761448d Binary files /dev/null and b/code/Vezba 13 - prateci materijal/apb_uvc/docs/APB_UVC.pdf differ diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/docs/ARM_AMBA3_APB_PROTOCOL_SPECIFICATION.pdf b/code/Vezba 13 - prateci materijal/apb_uvc/docs/ARM_AMBA3_APB_PROTOCOL_SPECIFICATION.pdf new file mode 100644 index 0000000..d97df59 Binary files /dev/null and b/code/Vezba 13 - prateci materijal/apb_uvc/docs/ARM_AMBA3_APB_PROTOCOL_SPECIFICATION.pdf differ diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/examples/apb_test_top.sv b/code/Vezba 13 - prateci materijal/apb_uvc/examples/apb_test_top.sv new file mode 100644 index 0000000..829a1a5 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/examples/apb_test_top.sv @@ -0,0 +1,73 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_test_top.sv + + DESCRIPTION top module + - connects DUT and interface + - generates clk and reset + - runs UVM test + + ****************************************************************************/ + +`ifndef APB_TEST_TOP_SV +`define APB_TEST_TOP_SV + +/** + * Module: apb_test_top + */ +module apb_test_top; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + + import apb_pkg::*; // import the APB pkg + + `include "apb_test_lib.sv" + + `include "dut.sv" + + logic clock; + logic reset; + + // interface + apb_if apb_vif(clock, reset); + + // DUT + dut #( .ADDR_WIDTH(32), + .RDATA_WIDTH(32), + .WDATA_WIDTH(32), + .SLV_NUM(15) + ) dut_inst ( + .paddr (apb_vif.paddr ), + .psel (apb_vif.psel ), + .penable (apb_vif.penable), + .pwrite (apb_vif.pwrite ), + .pwdata (apb_vif.pwdata ), + .pready (apb_vif.pready ), + .prdata (apb_vif.prdata ), + .pslverr (apb_vif.pslverr) + ); + + // set interface in db; run UVM test + initial begin + uvm_config_db#(virtual apb_if)::set(null,"uvm_test_top.*","apb_if", apb_vif); + run_test(); + end + + // initialize clock and reset + initial begin + clock <= 1'b0; + reset <= 1'b0; + #50 reset <= 1'b1; + end + + // generate clock + always #5 clock = ~clock; + +endmodule : apb_test_top + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/examples/dut.sv b/code/Vezba 13 - prateci materijal/apb_uvc/examples/dut.sv new file mode 100644 index 0000000..33472c0 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/examples/dut.sv @@ -0,0 +1,36 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE dut.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef DUT_SV +`define DUT_SV + +/** + * Module: dut + */ +module dut#( + parameter ADDR_WIDTH = 32, + parameter RDATA_WIDTH = 32, + parameter WDATA_WIDTH = 32, + parameter SLV_NUM = 15 + ) + ( + ref logic [ADDR_WIDTH - 1 : 0] paddr, + ref logic [SLV_NUM - 1 : 0] psel, + ref logic penable, + ref logic pwrite, + ref logic [WDATA_WIDTH - 1 : 0] pwdata, + ref logic pready, + ref logic [RDATA_WIDTH - 1 : 0] prdata, + ref logic pslverr + ); +endmodule : dut + +`endif diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_base.sv b/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_base.sv new file mode 100644 index 0000000..3277b5d --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_base.sv @@ -0,0 +1,48 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_test_base.sv + + DESCRIPTION base test to be extended by other tests + + ****************************************************************************/ + +`ifndef APB_TEST_BASE_SV +`define APB_TEST_BASE_SV + +/** + * Class: apb_test_base + */ +class apb_test_base extends uvm_test; + + // UVM factory registration + `uvm_component_utils (apb_test_base) + + // main environment + apb_env env; + + // new - constructor + function new(string name = "apb_test_base", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // build environment + env = apb_env::type_id::create("env", this); + endfunction : build_phase + + // UVM end_of_elaboration_phase + function void end_of_elaboration_phase(uvm_phase phase); + super.end_of_elaboration_phase(phase); + // display verification environment topology + uvm_top.print_topology(); + endfunction : end_of_elaboration_phase + +endclass : apb_test_base + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_lib.sv b/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_lib.sv new file mode 100644 index 0000000..ad339b6 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_lib.sv @@ -0,0 +1,18 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_test_lib.sv + + DESCRIPTION test includes + + ****************************************************************************/ + +`ifndef APB_TEST_LIB_SV +`define APB_TEST_LIB_SV + +`include "apb_test_base.sv" +`include "apb_test_simple.sv" + +`endif \ No newline at end of file diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_simple.sv b/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_simple.sv new file mode 100644 index 0000000..b9b7724 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/examples/tests/apb_test_simple.sv @@ -0,0 +1,59 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_test_simple.sv + + DESCRIPTION simple test for debug + + ****************************************************************************/ + +`ifndef APB_TEST_SIMPLE_SV +`define APB_TEST_SIMPLE_SV + +/** + * Class: apb_test_simple + */ +class apb_test_simple extends apb_test_base; + + // UVM factory registration + `uvm_component_utils (apb_test_simple) + + // sequences + apb_master_simple_seq master_seq; + apb_slave_simple_seq slave_seq; + + // new - constructor + function new(string name = "apb_test_simple", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // build all sequences + master_seq = apb_master_simple_seq::type_id::create("master_seq"); + slave_seq = apb_slave_simple_seq::type_id::create("slave_seq"); + endfunction : build_phase + + // UVM run_phase + task run_phase(uvm_phase phase); + assert(master_seq.randomize()); // random fields in master seq. + + phase.raise_objection(this); // test cannot end yet + + // start all sequences + fork + master_seq.start(env.master.seqr); + slave_seq.start(env.slaves[0].seqr); // runs forever + join_any + // only way to get here is if master sequence finished + + phase.drop_objection(this); // test can end + endtask : run_phase + +endclass : apb_test_simple + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sim/run.do b/code/Vezba 13 - prateci materijal/apb_uvc/sim/run.do new file mode 100644 index 0000000..16c65f7 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sim/run.do @@ -0,0 +1,29 @@ +################################################################################ +# +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ +# |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| +# +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ +# +# FILE run +# +# DESCRIPTION +# +################################################################################ + +# Create the library. +if [file exists work] { + vdel -all +} +vlib work + +# compile testbench +vlog -sv \ + +incdir+$env(UVM_HOME) \ + +incdir+../sv \ + +incdir+../examples \ + +incdir+../examples/tests \ + ../sv/apb_pkg.sv \ + ../examples/apb_test_top.sv + +# run simulation +vsim apb_test_top -novopt +UVM_TESTNAME=apb_test_simple -sv_seed random + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_config.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_config.sv new file mode 100644 index 0000000..b21a3b1 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_config.sv @@ -0,0 +1,117 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_config.sv + + DESCRIPTION contains main and default configurations + + ****************************************************************************/ + +`ifndef APB_CONFIG_SV +`define APB_CONFIG_SV + +/** + * Class: apb_config + */ +class apb_config extends uvm_object; + + // number of master and slave agents + int unsigned num_of_slaves; // total number of slaves (DUT or agents) + int unsigned num_of_slave_agents; // number of UVM slave agents + bit has_master; + + // configurations for every agent + apb_slave_config slave_cfg_queue[$]; + apb_master_config master_cfg; + + // control + bit has_pslverr = 1; // APB peripherals are not required to support the PSLVERR pin + bit has_checks = 1; + bit has_coverage = 1; + + // UVM factory registration + `uvm_object_utils_begin(apb_config) + `uvm_field_int(num_of_slaves, UVM_DEFAULT) + `uvm_field_int(num_of_slave_agents, UVM_DEFAULT) + `uvm_field_int(has_master, UVM_DEFAULT) + `uvm_field_queue_object(slave_cfg_queue, UVM_DEFAULT) + `uvm_field_object(master_cfg, UVM_DEFAULT) + `uvm_field_int(has_pslverr, UVM_DEFAULT) + `uvm_field_int(has_checks, UVM_DEFAULT) + `uvm_field_int(has_coverage, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "apb_config"); + super.new(name); + endfunction : new + + // additional class methods + extern function void add_slave( bit [ADDR_WIDTH - 1 : 0] start_addr, + bit [ADDR_WIDTH - 1 : 0] end_addr, + int unsigned psel_indx, + bit create_agent = 1, + uvm_active_passive_enum is_active = UVM_ACTIVE); + extern function void add_master(uvm_active_passive_enum is_active = UVM_ACTIVE); + extern function int unsigned get_slave_psel_by_addr(bit [ADDR_WIDTH - 1 : 0] addr); + +endclass : apb_config + +// creates and configures a slave agent config and adds to a queue +function void apb_config::add_slave(bit [ADDR_WIDTH - 1 : 0] start_addr, + bit [ADDR_WIDTH - 1 : 0] end_addr, + int unsigned psel_indx, + bit create_agent = 1, + uvm_active_passive_enum is_active = UVM_ACTIVE); + apb_slave_config tmp_cfg; + ++num_of_slaves; + if(create_agent == 1) ++num_of_slave_agents; + tmp_cfg = apb_slave_config::type_id::create("slave_cfg"); + tmp_cfg.start_address = start_addr; + tmp_cfg.end_address = end_addr; + tmp_cfg.psel_index = psel_indx; + tmp_cfg.create_agent = create_agent; + tmp_cfg.is_active = is_active; + tmp_cfg.has_checks = has_checks; + tmp_cfg.has_coverage = has_coverage; + slave_cfg_queue.push_back(tmp_cfg); +endfunction : add_slave + +// creates and configures a master agent configuration +function void apb_config::add_master(uvm_active_passive_enum is_active = UVM_ACTIVE); + has_master = 1; + master_cfg = apb_master_config::type_id::create("master_cfg"); + master_cfg.is_active = is_active; + master_cfg.has_checks = has_checks; + master_cfg.has_coverage = has_coverage; +endfunction : add_master + +// returns the slave psel index +function int unsigned apb_config::get_slave_psel_by_addr(bit [ADDR_WIDTH - 1 : 0] addr); + for (int i = 0; i < slave_cfg_queue.size(); i++) + if(slave_cfg_queue[i].check_address_range(addr)) begin + return slave_cfg_queue[i].psel_index; + end + return 0; +endfunction : get_slave_psel_by_addr + +/** + * Class: default_apb_config + * + * Description: default configuration - one master, no slaves + */ +class default_apb_config extends apb_config; + + `uvm_object_utils(default_apb_config) + + function new(string name = "default_apb_config"); + super.new(name); + add_master(UVM_ACTIVE); + add_slave(0, 2**ADDR_WIDTH - 1, 1, 1, UVM_ACTIVE); // TODO : remove after debug + endfunction : new + +endclass : default_apb_config + +`endif diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_env.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_env.sv new file mode 100644 index 0000000..8e507e5 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_env.sv @@ -0,0 +1,75 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_env.sv + + DESCRIPTION environment containing the master and slave agents + + ****************************************************************************/ + +`ifndef APB_ENV_SV +`define APB_ENV_SV + +/** + * Class: apb_env + */ +class apb_env extends uvm_env; + + apb_slave_agent slaves[]; // can have more than one slave + apb_master_agent master; // one master + + apb_config cfg; // uvc configuration + + // UVM factory registration + `uvm_component_utils_begin(apb_env) + `uvm_field_object(cfg, UVM_DEFAULT) + `uvm_component_utils_end + + // new - constructor + function new(string name = "apb_env", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + // get configuration from db or use default configuration if none is set + if(!uvm_config_db#(apb_config)::get(this, "", "apb_config", cfg)) begin + `uvm_info("NOCONFIG", "Using default_apb_config", UVM_LOW) + apb_config::type_id::set_type_override(default_apb_config::get_type(), 1); + cfg = apb_config::type_id::create("cfg"); + end + + // set the master configuration + if(cfg.has_master) begin + uvm_config_db#(apb_config)::set(this, "master*", "apb_config", cfg); + end + // set the slave configurations + foreach(cfg.slave_cfg_queue[i]) begin + string sname; + sname = $sformatf("slave[%0d]*", i); + uvm_config_db#(apb_slave_config)::set(this, sname, "apb_slave_config", cfg.slave_cfg_queue[i]); + end + + // create agents + if(cfg.has_master) begin + master = apb_master_agent::type_id::create("master",this); + end + if(cfg.num_of_slave_agents != 0) begin + slaves = new[cfg.num_of_slave_agents]; + for(int i = 0; i < cfg.slave_cfg_queue.size(); i++) begin + if(cfg.slave_cfg_queue[i].create_agent == 1) begin + slaves[i] = apb_slave_agent::type_id::create($sformatf("slave[%0d]", i), this); + end + end + end + + endfunction : build_phase + +endclass : apb_env + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_if.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_if.sv new file mode 100644 index 0000000..bf1ceed --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_if.sv @@ -0,0 +1,48 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_if.sv + + DESCRIPTION apb interface + + ****************************************************************************/ + +`ifndef APB_IF_SV +`define APB_IF_SV + +/** + * Interface: apb_if + */ +interface apb_if (input logic pclk, input logic presetn); + + parameter ADDR_WIDTH = 32; // up to 32 bits + parameter RDATA_WIDTH = 32; // up to 32 bits + parameter WDATA_WIDTH = 32; // up to 32 bits + parameter SLV_NUM = 15; + + // source is master + logic [ADDR_WIDTH - 1 : 0] paddr; // the APB address bus + logic [SLV_NUM - 1 : 0] psel; // select; the slave device is selected + // and that a data transfer is required + logic penable; // enable; the second and subsequent + // cycles of an APB transfer + logic pwrite; // direction + logic [WDATA_WIDTH - 1 : 0] pwdata; // write data + + // source is slave + logic pready; // ready; the slave uses this signal to + // extend an APB transfer + logic [RDATA_WIDTH - 1 : 0] prdata; // read data + logic pslverr; // indicates a transfer failure + + // control + bit has_checks = 1; + bit has_coverage = 1; + + // TODO : coverage and assertions go here... + +endinterface : apb_if + +`endif diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_pkg.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_pkg.sv new file mode 100644 index 0000000..8274dbf --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_pkg.sv @@ -0,0 +1,83 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_pkg.sv + + DESCRIPTION package containing all parameters and includes + + ****************************************************************************/ + +`ifndef APB_PKG_SV +`define APB_PKG_SV + +/** + * Package: apb_pkg + */ +package apb_pkg; + + parameter ADDR_WIDTH = 32; // up to 32 bits + parameter RDATA_WIDTH = 32; // up to 32 bits + parameter WDATA_WIDTH = 32; // up to 32 bits + parameter SLV_NUM = 15; // up to 15 slaves + + // ==================== OBJECTS ============================== + typedef class apb_transaction; + typedef class apb_master_config; + typedef class apb_slave_config; + typedef class apb_config; + // ========================================================== + + // ==================== SLAVE =============================== + typedef class apb_slave_driver; + typedef class apb_slave_sequencer; + typedef class apb_slave_monitor; + typedef class apb_slave_agent; + // ========================================================== + + // ==================== MASTER ============================== + typedef class apb_master_driver; + typedef class apb_master_sequencer; + typedef class apb_master_monitor; + typedef class apb_master_agent; + // ========================================================== + + // ==================== TOP ================================== + typedef class apb_env; + // ========================================================== + + import uvm_pkg::*; + `include "uvm_macros.svh" + + `include "apb_types.sv" + `include "apb_config.sv" + + // ==================== MASTER ============================== + `include "master/sequences/apb_master_seq_lib.sv" + `include "master/apb_master_config.sv" + `include "master/apb_master_driver.sv" + `include "master/apb_master_monitor.sv" + `include "master/apb_master_sequencer.sv" + `include "master/apb_master_agent.sv" + // ========================================================== + + // ==================== SLAVE =============================== + `include "slave/sequences/apb_slave_seq_lib.sv" + `include "slave/apb_slave_config.sv" + `include "slave/apb_slave_driver.sv" + `include "slave/apb_slave_monitor.sv" + `include "slave/apb_slave_sequencer.sv" + `include "slave/apb_slave_agent.sv" + // ========================================================== + + // ==================== TOP ================================= + `include "apb_env.sv" + `include "apb_transaction.sv" + // ========================================================== + +endpackage : apb_pkg + +`include "apb_if.sv" + +`endif diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_transaction.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_transaction.sv new file mode 100644 index 0000000..218d601 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_transaction.sv @@ -0,0 +1,48 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_transaction.sv + + DESCRIPTION sequence item + + ****************************************************************************/ + +`ifndef APB_TRANSACTION_SV +`define APB_TRANSACTION_SV + +/** + * Class: apb_transaction + */ +class apb_transaction extends uvm_sequence_item; + + // fields + rand bit [ADDR_WIDTH - 1 : 0] addr; + rand apb_direction_enum dir; + rand bit [RDATA_WIDTH - 1 : 0] rdata; + rand bit [WDATA_WIDTH - 1 : 0] wdata; + rand int unsigned delay = 0; + bit error; + + // constraints + constraint c_delay { delay <= 10 ; } + + // UVM factory registration + `uvm_object_utils_begin(apb_transaction) + `uvm_field_int(addr, UVM_DEFAULT) + `uvm_field_enum(apb_direction_enum, dir, UVM_DEFAULT) + `uvm_field_int(rdata, UVM_DEFAULT) + `uvm_field_int(wdata, UVM_DEFAULT) + `uvm_field_int(delay, UVM_DEFAULT) + `uvm_field_int(error, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "apb_transaction"); + super.new(name); + endfunction : new + +endclass : apb_transaction + +`endif diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_types.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_types.sv new file mode 100644 index 0000000..f9d6a63 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/apb_types.sv @@ -0,0 +1,22 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_types.sv + + DESCRIPTION contains all typedef-s used in project + + ****************************************************************************/ + +`ifndef APB_TYPES_SV +`define APB_TYPES_SV + +// APB direction - read or write +typedef enum { + APB_READ = 0, + APB_WRITE = 1 +} apb_direction_enum; + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_agent.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_agent.sv new file mode 100644 index 0000000..cf59980 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_agent.sv @@ -0,0 +1,67 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_agent.sv + + DESCRIPTION master agent + + ****************************************************************************/ + +`ifndef APB_MASTER_AGENT_SV +`define APB_MASTER_AGENT_SV + +/** + * Class: apb_master_agent + */ +class apb_master_agent extends uvm_agent; + + // configuration object + apb_config cfg; + + // components + apb_master_driver drv; + apb_master_sequencer seqr; + apb_master_monitor mon; + + // UVM factory registration + `uvm_component_utils_begin(apb_master_agent) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new(string name = "apb_master_agent", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + // get configuration object from db + if(!uvm_config_db#(apb_config)::get(this, "", "apb_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + + // create driver and sequencer if agent is active + if(cfg.master_cfg.is_active == UVM_ACTIVE) begin + seqr = apb_master_sequencer::type_id::create("seqr", this); + drv = apb_master_driver::type_id::create("drv", this); + end + // always create monitor + mon = apb_master_monitor::type_id::create("mon", this); + endfunction : build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // connect driver and sequencer if agent is active + if(cfg.master_cfg.is_active == UVM_ACTIVE) begin + drv.seq_item_port.connect(seqr.seq_item_export); + end + endfunction : connect_phase + +endclass : apb_master_agent + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_config.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_config.sv new file mode 100644 index 0000000..bc28413 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_config.sv @@ -0,0 +1,41 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_config.sv + + DESCRIPTION master configuration object + + ****************************************************************************/ + +`ifndef APB_MASTER_CONFIG_SV +`define APB_MASTER_CONFIG_SV + +/** + * Class: apb_master_config + */ +class apb_master_config extends uvm_object; + + // is agent active or passive + uvm_active_passive_enum is_active = UVM_ACTIVE; + // checks and coverage control + bit has_checks = 1; + bit has_coverage = 1; + + // UVM factory registration + `uvm_object_utils_begin(apb_master_config) + `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT) + `uvm_field_int(has_checks, UVM_DEFAULT) + `uvm_field_int(has_coverage, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "apb_master_config"); + super.new(name); + endfunction : new + +endclass : apb_master_config + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_driver.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_driver.sv new file mode 100644 index 0000000..a023935 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_driver.sv @@ -0,0 +1,132 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_driver.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef APB_MASTER_DRIVER_SV +`define APB_MASTER_DRIVER_SV + +/** + * Class: apb_master_driver + */ +class apb_master_driver extends uvm_driver #(apb_transaction, apb_transaction); + + // apb virtual interface + virtual apb_if vif; + + // configuration + apb_config cfg; + + // UVM factory registration + `uvm_component_utils_begin(apb_master_driver) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new(string name = "apb_master_driver", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + virtual function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(apb_config)::get(this, "*", "apb_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + virtual function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual apb_if)::get(this, "", "apb_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task run_phase(uvm_phase phase); + extern virtual task get_and_drive(); + extern virtual task reset(); + extern virtual task drive_tr (apb_transaction tr); + +endclass : apb_master_driver + +// UVM run_phase +task apb_master_driver::run_phase(uvm_phase phase); + reset(); // init. + forever begin + fork + get_and_drive(); // thread killed at reset + @(negedge vif.presetn); // reset is active low + join_any + disable fork; + reset(); + end +endtask : run_phase + +// reset signals +task apb_master_driver::reset(); + `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM) + vif.paddr <= {ADDR_WIDTH {1'b0}}; + vif.pwdata <= {WDATA_WIDTH {1'b0}}; + vif.pwrite <= 1'b0; + vif.psel <= {SLV_NUM {1'b0}}; + vif.penable <= 1'b0; + @(posedge vif.presetn); // reset dropped +endtask : reset + +// sequencer/driver handshake +task apb_master_driver::get_and_drive(); + forever begin + seq_item_port.get_next_item(req); + drive_tr(req); + seq_item_port.item_done(); + end +endtask : get_and_drive + +// drive transaction +task apb_master_driver::drive_tr (apb_transaction tr); + int unsigned slave_index; + + // delay + @(posedge vif.pclk); + if (tr.delay > 0) begin + repeat(tr.delay) @(posedge vif.pclk); + end + + // address phase + slave_index = cfg.get_slave_psel_by_addr(tr.addr); + if(slave_index == 0) begin + `uvm_warning(get_type_name(), "No slave with choosed address") + return; + end + vif.paddr <= tr.addr; + vif.psel <= (1 << (slave_index - 1)); + vif.penable <= 0; + vif.pwrite <= apb_direction_enum'(tr.dir); + if (tr.dir == APB_WRITE) begin + vif.pwdata <= tr.wdata; + end + + // data phase + @(posedge vif.pclk); + vif.penable <= 1; + @(posedge vif.pclk iff vif.pready); + tr.error = vif.pslverr; + if (tr.dir == APB_READ) begin + tr.rdata = vif.prdata; + end + vif.penable <= 0; + vif.psel <= 0; + + `uvm_info(get_type_name(), $sformatf("APB Finished Driving tr \n%s", tr.sprint()), UVM_HIGH) +endtask : drive_tr + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_monitor.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_monitor.sv new file mode 100644 index 0000000..d43623e --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_monitor.sv @@ -0,0 +1,140 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_monitor.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef APB_MASTER_MONITOR_SV +`define APB_MASTER_MONITOR_SV + +/** + * Class: apb_master_monitor + */ +class apb_master_monitor extends uvm_monitor; + + // apb virtual interface + virtual apb_if vif; + + // configuration + apb_config cfg; + + // TLM - from monitor to other components + uvm_analysis_port #(apb_transaction) item_collected_port; + + // keep track of number of transactions + int unsigned num_transactions = 0; + + // current transaction + apb_transaction tr_collected; + + // UVM factory registration + `uvm_component_utils_begin(apb_master_monitor) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // coverage + covergroup cg_apb_master; + // cover direction - read or write + cp_direction : coverpoint tr_collected.dir { + bins write = {APB_WRITE}; + bins read = {APB_READ}; + } + // cover delay - zero or more + cp_delay : coverpoint tr_collected.delay { + bins zero = {0}; + bins other = default; + } + // TODO : add others + endgroup : cg_apb_master; + + // new - constructor + function new(string name = "apb_master_monitor", uvm_component parent = null); + super.new(name, parent); + item_collected_port = new("item_collected_port", this); + cg_apb_master = new(); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(apb_config)::get(this, "", "apb_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual apb_if)::get(this, "", "apb_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task run_phase(uvm_phase phase); + extern virtual task collect_transactions(); + extern virtual function void report_phase(uvm_phase phase); + +endclass : apb_master_monitor + +// UVM run_phase +task apb_master_monitor::run_phase(uvm_phase phase); + forever begin + @(posedge vif.presetn); // reset dropped + `uvm_info(get_type_name(), "Reset dropped", UVM_MEDIUM) + + fork + collect_transactions(); // thread killed at reset + @(negedge vif.presetn); // reset is active low + join_any + disable fork; + end +endtask : run_phase + +// monitor apb interface and collect transactions +task apb_master_monitor::collect_transactions(); + forever begin + tr_collected = apb_transaction::type_id::create("tr_collected"); + + // wait for valid transaction + @(posedge vif.pclk iff (vif.psel != 0)); + tr_collected.addr = vif.paddr; + tr_collected.dir = apb_direction_enum'(vif.pwrite); + if(tr_collected.dir == APB_WRITE) + tr_collected.wdata = vif.pwdata; + + @(posedge vif.pclk); // enable + @(posedge vif.pclk); // ready + while (vif.pready !== 1'b1) begin + @(posedge vif.pclk); + tr_collected.delay++; + end + if(tr_collected.dir == APB_READ) begin + tr_collected.rdata = vif.prdata; + tr_collected.error = vif.pslverr; + end + + item_collected_port.write(tr_collected); // TLM + // collect coverage if enabled + if(cfg.has_coverage == 1) begin + cg_apb_master.sample(); + end + `uvm_info(get_type_name(), $sformatf("Tr collected :\n%s", tr_collected.sprint()), UVM_MEDIUM) + num_transactions++; + end // forever +endtask : collect_transactions + +// UVM report_phase +function void apb_master_monitor::report_phase(uvm_phase phase); + // final report + `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW); +endfunction : report_phase + + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_sequencer.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_sequencer.sv new file mode 100644 index 0000000..db94f71 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/apb_master_sequencer.sv @@ -0,0 +1,44 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_sequencer.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef APB_MASTER_SEQUENCER_SV +`define APB_MASTER_SEQUENCER_SV + +/** + * Class: apb_master_sequencer + */ +class apb_master_sequencer extends uvm_sequencer #(apb_transaction, apb_transaction); + + // configuration + apb_config cfg; + + // UVM factory registration + `uvm_component_utils_begin(apb_master_sequencer) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new(string name = "apb_master_sequencer", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(apb_config)::get(this, "", "apb_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + +endclass : apb_master_sequencer + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_base_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_base_seq.sv new file mode 100644 index 0000000..184d0fe --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_base_seq.sv @@ -0,0 +1,33 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_base_seq.sv + + DESCRIPTION base sequence to be extended by other sequences + + ****************************************************************************/ + +`ifndef APB_MASTER_BASE_SEQ_SV +`define APB_MASTER_BASE_SEQ_SV + +/** + * Class: apb_master_base_seq + */ +class apb_master_base_seq extends uvm_sequence #(apb_transaction, apb_transaction); + + // p_sequencer for APB master sequences + `uvm_declare_p_sequencer(apb_master_sequencer) + // UVM factory registration + `uvm_object_utils(apb_master_base_seq) + + // new - constructor + function new(string name = "apb_master_base_seq"); + super.new(name); + endfunction : new + +endclass : apb_master_base_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_after_write_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_after_write_seq.sv new file mode 100644 index 0000000..dde1b58 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_after_write_seq.sv @@ -0,0 +1,50 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_read_after_write_seq.sv + + DESCRIPTION sequence for writing and reading from one address + + ****************************************************************************/ + +`ifndef APB_MASTER_READ_AFTER_WRITE_SEQ_SV +`define APB_MASTER_READ_AFTER_WRITE_SEQ_SV + +/** + * Class: apb_master_read_after_write_seq + */ +class apb_master_read_after_write_seq extends apb_master_base_seq; + + rand int unsigned delay; // transaction delay + rand bit [ADDR_WIDTH - 1 : 0] addr; // address to write/read + + // constraints + constraint delay_cst { delay inside {[1 : 10]};} + + // UVM factory registration + `uvm_object_utils(apb_master_read_after_write_seq) + + // new - constructor + function new(string name = "apb_master_read_after_write_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + // write + `uvm_do_with( req, + {req.addr == addr; + req.dir == APB_READ; + req.delay == delay;}) + // read + `uvm_do_with( req, + {req.addr == addr; + req.dir == APB_READ; + req.delay == delay;}) + endtask : body +endclass : apb_master_read_after_write_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_all_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_all_seq.sv new file mode 100644 index 0000000..31bf011 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_all_seq.sv @@ -0,0 +1,50 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_read_all_seq.sv + + DESCRIPTION sequence for reading from all valid addresses + + ****************************************************************************/ + +`ifndef APB_MASTER_READ_ALL_SEQ_SV +`define APB_MASTER_READ_ALL_SEQ_SV + +/** + * Class: apb_master_read_all_seq + */ +class apb_master_read_all_seq extends apb_master_base_seq; + + // UVM factory registration + `uvm_object_utils(apb_master_read_all_seq) + + // new - constructor + function new(string name = "apb_master_read_all_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + bit [ADDR_WIDTH - 1 : 0] end_addr, curr_addr; + + // read from all addresses in all slaves + foreach (p_sequencer.cfg.slave_cfg_queue[i]) begin + curr_addr = p_sequencer.cfg.slave_cfg_queue[i].start_address; + end_addr = p_sequencer.cfg.slave_cfg_queue[i].end_address; + while (curr_addr != end_addr) begin + `uvm_do_with( req, { + req.addr == curr_addr; + req.dir == APB_READ;}) + curr_addr++; + end + + end + + endtask : body + +endclass : apb_master_read_all_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_seq.sv new file mode 100644 index 0000000..53e6121 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_read_seq.sv @@ -0,0 +1,44 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_read_seq.sv + + DESCRIPTION sequence for reading from one address + + ****************************************************************************/ + +`ifndef APB_MASTER_READ_SEQ_SV +`define APB_MASTER_READ_SEQ_SV + +/** + * Class: apb_master_read_seq + */ +class apb_master_read_seq extends apb_master_base_seq; + + rand int unsigned delay; // transaction delay + rand bit [ADDR_WIDTH - 1 : 0] addr; // address to read + + // constraints + constraint delay_cst { delay inside {[1 : 10]};} + + // UVM factory registration + `uvm_object_utils(apb_master_read_seq) + + // new - constructor + function new(string name = "apb_master_read_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + `uvm_do_with( req, + {req.addr == addr; + req.dir == APB_READ; + req.delay == delay;}) + endtask : body +endclass : apb_master_read_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_seq_lib.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_seq_lib.sv new file mode 100644 index 0000000..ef43760 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_seq_lib.sv @@ -0,0 +1,23 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_seq_lib.sv + + DESCRIPTION sequence includes + + ****************************************************************************/ + +`ifndef APB_MASTER_SEQ_LIB_SV +`define APB_MASTER_SEQ_LIB_SV + +`include "master/sequences/apb_master_base_seq.sv" +`include "master/sequences/apb_master_simple_seq.sv" +`include "master/sequences/apb_master_read_seq.sv" +`include "master/sequences/apb_master_write_seq.sv" +`include "master/sequences/apb_master_read_all_seq.sv" +`include "master/sequences/apb_master_write_all_seq.sv" +`include "master/sequences/apb_master_read_after_write_seq.sv" + +`endif \ No newline at end of file diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_simple_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_simple_seq.sv new file mode 100644 index 0000000..b94c914 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_simple_seq.sv @@ -0,0 +1,42 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_simple_seq.sv + + DESCRIPTION simple sequence; random transactions + + ****************************************************************************/ + +`ifndef APB_MASTER_SIMPLE_SEQ_SV +`define APB_MASTER_SIMPLE_SEQ_SV + +/** + * Class: apb_master_simple_seq + */ +class apb_master_simple_seq extends apb_master_base_seq; + + rand int unsigned num_of_tr; + + // constraints + constraint num_of_tr_cst { num_of_tr inside {[1 : 10]};} + + // UVM factory registration + `uvm_object_utils(apb_master_simple_seq) + + // new - constructor + function new(string name = "apb_master_simple_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + repeat(num_of_tr) begin + `uvm_do(req) + end + endtask : body + +endclass : apb_master_simple_seq + +`endif diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_write_all_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_write_all_seq.sv new file mode 100644 index 0000000..146413c --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_write_all_seq.sv @@ -0,0 +1,64 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_write_all_seq.sv + + DESCRIPTION sequence for writing to all valid addresses + + ****************************************************************************/ + +`ifndef APB_MASTER_WRITE_ALL_SEQ_SV +`define APB_MASTER_WRITE_ALL_SEQ_SV + +/** + * Class: apb_master_write_all_seq + */ +class apb_master_write_all_seq extends apb_master_base_seq; + + bit data_is_rand = 1; // 1 = data will be randomly chosen for every write + // 0 = used data from "data_to_write" field + bit [WDATA_WIDTH - 1 : 0] data_to_write; + rand bit [WDATA_WIDTH - 1 : 0] data; + + // UVM factory registration + `uvm_object_utils(apb_master_write_all_seq) + + // new - constructor + function new(string name = "apb_master_write_all_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + bit [ADDR_WIDTH - 1 : 0] end_addr, curr_addr; + + // write to all addresses in all slaves + foreach (p_sequencer.cfg.slave_cfg_queue[i]) begin + curr_addr = p_sequencer.cfg.slave_cfg_queue[i].start_address; + end_addr = p_sequencer.cfg.slave_cfg_queue[i].end_address; + while (curr_addr != end_addr) begin + if (data_is_rand) begin + assert(this.randomize()); + end + else begin + data = data_to_write; + end + + `uvm_do_with( req, { + req.addr == curr_addr; + req.wdata == data; + req.dir == APB_WRITE;}) + curr_addr++; + end + + end + + + endtask : body + +endclass : apb_master_write_all_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_write_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_write_seq.sv new file mode 100644 index 0000000..5010c6d --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/master/sequences/apb_master_write_seq.sv @@ -0,0 +1,47 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_master_write_seq.sv + + DESCRIPTION sequence for writing to one address + + ****************************************************************************/ + +`ifndef APB_MASTER_WRITE_SEQ_SV +`define APB_MASTER_WRITE_SEQ_SV + +/** + * Class: apb_master_write_seq + */ +class apb_master_write_seq extends apb_master_base_seq; + + rand int unsigned delay; // transaction delay + rand bit [ADDR_WIDTH - 1 : 0] addr; // address to write + rand bit [WDATA_WIDTH - 1 : 0] data; // data to write + + // constraints + constraint delay_cst { delay inside {[1 : 10]};} + + // UVM factory registration + `uvm_object_utils(apb_master_write_seq) + + // new - constructor + function new(string name = "apb_master_write_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + `uvm_do_with( req, { + req.addr == addr; + req.dir == APB_WRITE; + req.wdata == data; + req.delay == delay;}) + endtask : body + +endclass : apb_master_write_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_agent.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_agent.sv new file mode 100644 index 0000000..dfde01a --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_agent.sv @@ -0,0 +1,67 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_slave_agent.sv + + DESCRIPTION slave agent + + ****************************************************************************/ + +`ifndef APB_SLAVE_AGENT_SV +`define APB_SLAVE_AGENT_SV + +/** + * Class: apb_slave_agent + */ +class apb_slave_agent extends uvm_agent; + + // configuration object + apb_slave_config cfg; + + // components + apb_slave_driver drv; + apb_slave_sequencer seqr; + apb_slave_monitor mon; + + // UVM factory registration + `uvm_component_utils_begin(apb_slave_agent) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new(string name = "apb_slave_agent", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + // get configuration object from db + if(!uvm_config_db#(apb_slave_config)::get(this, "", "apb_slave_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + + // create driver and sequencer if agent is active + if(cfg.is_active == UVM_ACTIVE) begin + seqr = apb_slave_sequencer::type_id::create("seqr", this); + drv = apb_slave_driver::type_id::create("drv", this); + end + // always create monitor + mon = apb_slave_monitor::type_id::create("mon", this); + endfunction : build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // connect driver and sequencer if agent is active + if(cfg.is_active == UVM_ACTIVE) begin + drv.seq_item_port.connect(seqr.seq_item_export); + end + endfunction : connect_phase + +endclass : apb_slave_agent + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_config.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_config.sv new file mode 100644 index 0000000..fc14209 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_config.sv @@ -0,0 +1,70 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_slave_config.sv + + DESCRIPTION slave configuration object + + ****************************************************************************/ + +`ifndef APB_SLAVE_CONFIG_SV +`define APB_SLAVE_CONFIG_SV + +/** + * Class: apb_slave_config + */ +class apb_slave_config extends uvm_object; + + // is agent active or passive + uvm_active_passive_enum is_active = UVM_ACTIVE; + // checks and coverage control + bit has_checks = 1; + bit has_coverage = 1; + // address range + rand bit [ADDR_WIDTH - 1 : 0] start_address; + rand bit [ADDR_WIDTH - 1 : 0] end_address; + // slave index + rand int unsigned psel_index; + // create agent or just use cfg for address and psel purposes + bit create_agent = 1; + + // constraints + constraint addr_cst { start_address <= end_address; } + constraint psel_cst { psel_index inside {[0 : SLV_NUM]};} // max 15 slaves + + // UVM factory registration + `uvm_object_utils_begin(apb_slave_config) + `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT) + `uvm_field_int(has_checks, UVM_DEFAULT) + `uvm_field_int(has_coverage, UVM_DEFAULT) + `uvm_field_int(start_address, UVM_DEFAULT) + `uvm_field_int(end_address, UVM_DEFAULT) + `uvm_field_int(psel_index, UVM_DEFAULT) + `uvm_field_int(create_agent, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "apb_slave_config"); + super.new(name); + endfunction : new + + // checks to see if an address is in the configured range + function bit check_address_range(bit [ADDR_WIDTH - 1 : 0] addr); + return (!((start_address > addr) || (end_address < addr))); + endfunction : check_address_range + + // checks to see if current psel index is for this slave + function bit check_psel_index(logic [SLV_NUM - 1 : 0] psel); + for (int i = 0; i < SLV_NUM; i++) begin + if((psel[i] == 1) && (psel_index == (i + 1))) + return 1; + end + return 0; + endfunction : check_psel_index + +endclass : apb_slave_config + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_driver.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_driver.sv new file mode 100644 index 0000000..7f899d8 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_driver.sv @@ -0,0 +1,117 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_slave_driver.sv + + DESCRIPTION drives slave response + + ****************************************************************************/ + +`ifndef APB_SLAVE_DRIVER_SV +`define APB_SLAVE_DRIVER_SV + +/** + * Class: apb_slave_driver + */ +class apb_slave_driver extends uvm_driver #(apb_transaction, apb_transaction); + + // apb virtual interface + virtual apb_if vif; + + // configuration + apb_slave_config cfg; + + // UVM factory registration + `uvm_component_utils_begin(apb_slave_driver) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new(string name = "apb_slave_driver", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(apb_slave_config)::get(this, "", "apb_slave_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual apb_if)::get(this, "", "apb_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task run_phase(uvm_phase phase); + extern virtual task get_and_drive(); + extern virtual task reset(); + extern virtual task drive_tr (apb_transaction tr); + +endclass : apb_slave_driver + +// UVM run_phase +task apb_slave_driver::run_phase(uvm_phase phase); + reset(); // init. + forever begin + fork + get_and_drive(); // thread killed at reset + @(negedge vif.presetn); // reset is active low + join_any + disable fork; + + reset(); + end +endtask : run_phase + +// reset signals +task apb_slave_driver::reset(); + `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM) + vif.prdata <= {WDATA_WIDTH {1'bZ}}; + vif.pready <= 1'b0; + vif.pslverr <= 1'b0; + @(posedge vif.presetn); // reset dropped +endtask : reset + +// sequencer/driver handshake +task apb_slave_driver::get_and_drive(); + forever begin + seq_item_port.get_next_item(req); + drive_tr(req); + seq_item_port.item_done(); + end +endtask : get_and_drive + +// drive transaction +task apb_slave_driver::drive_tr (apb_transaction tr); + + // wait for the master to initiate the transaction + @(posedge vif.pclk iff (vif.penable && cfg.check_psel_index(vif.psel))); + + tr.dir = apb_direction_enum'(vif.pwrite); + + // delay + if (tr.delay > 0) begin + repeat(tr.delay) @(posedge vif.pclk); + end + // respond + vif.pslverr <= tr.error; + vif.pready <= 1'b1; + if (tr.dir == APB_READ) + vif.prdata <= tr.rdata; + @(posedge vif.pclk); + vif.prdata <= {WDATA_WIDTH {1'bZ}}; + vif.pready <= 1'b0; + + `uvm_info(get_type_name(), $sformatf("APB Finished Driving tr \n%s", tr.sprint()), UVM_HIGH) +endtask : drive_tr + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_monitor.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_monitor.sv new file mode 100644 index 0000000..cda1907 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_monitor.sv @@ -0,0 +1,140 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_slave_monitor.sv + + DESCRIPTION monitors transactions for slave + + ****************************************************************************/ + +`ifndef APB_SLAVE_MONITOR_SV +`define APB_SLAVE_MONITOR_SV + +/** + * Class: apb_slave_monitor + */ +class apb_slave_monitor extends uvm_monitor; + + // apb virtual interface + virtual apb_if vif; + + // configuration + apb_slave_config cfg; + + // TLM - from monitor to other components + uvm_analysis_port #(apb_transaction) item_collected_port; + + // keep track of number of transactions + int unsigned num_transactions = 0; + + // current transaction + apb_transaction tr_collected; + + // UVM factory registration + `uvm_component_utils_begin(apb_slave_monitor) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // coverage + covergroup cg_apb_slave; + // cover direction - read or write + cp_direction : coverpoint tr_collected.dir { + bins write = {APB_WRITE}; + bins read = {APB_READ}; + } + // cover delay - zero or more + cp_delay : coverpoint tr_collected.delay { + bins zero = {0}; + bins other = default; + } + // TODO : add others + endgroup : cg_apb_slave; + + // new - constructor + function new(string name = "apb_slave_monitor", uvm_component parent = null); + super.new(name, parent); + item_collected_port = new("item_collected_port", this); + cg_apb_slave = new(); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(apb_slave_config)::get(this, "", "apb_slave_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual apb_if)::get(this, "", "apb_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task run_phase(uvm_phase phase); + extern virtual task collect_transactions(); + extern virtual function void report_phase(uvm_phase phase); + +endclass : apb_slave_monitor + +// UVM run_phase +task apb_slave_monitor::run_phase(uvm_phase phase); + forever begin + @(posedge vif.presetn); // reset dropped + `uvm_info(get_type_name(), "Reset dropped", UVM_MEDIUM) + + fork + collect_transactions(); // thread killed at reset + @(negedge vif.presetn); // reset is active low + join_any + disable fork; + end +endtask : run_phase + +// monitor apb interface and collect transactions +task apb_slave_monitor::collect_transactions(); + forever begin + tr_collected = apb_transaction::type_id::create("tr_collected"); + + // collect transactions only for this slave + @(posedge vif.pclk iff (cfg.check_psel_index(vif.psel))); + tr_collected.addr = vif.paddr; + tr_collected.dir = apb_direction_enum'(vif.pwrite); + if(tr_collected.dir == APB_WRITE) + tr_collected.wdata = vif.pwdata; + + @(posedge vif.pclk); // enable + @(posedge vif.pclk); // ready + // wait for ready + while (vif.pready !== 1'b1) begin + @(posedge vif.pclk); + tr_collected.delay++; + end + if(tr_collected.dir == APB_READ) begin + tr_collected.rdata = vif.prdata; + tr_collected.error = vif.pslverr; + end + + item_collected_port.write(tr_collected); // TLM + // collect coverage if enabled + if(cfg.has_coverage == 1) begin + cg_apb_slave.sample(); + end + `uvm_info(get_type_name(), $sformatf("Tr collected :\n%s", tr_collected.sprint()), UVM_MEDIUM) + num_transactions++; + end // forever +endtask : collect_transactions + +// UVM report_phase +function void apb_slave_monitor::report_phase(uvm_phase phase); + // final report + `uvm_info(get_type_name(), $sformatf("Report: APB monitor collected %0d transfers", num_transactions), UVM_LOW); +endfunction : report_phase + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_sequencer.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_sequencer.sv new file mode 100644 index 0000000..57e8631 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/apb_slave_sequencer.sv @@ -0,0 +1,34 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_slave_sequencer.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef APB_SLAVE_SEQUENCER_SV +`define APB_SLAVE_SEQUENCER_SV + +/** + * Class: apb_slave_sequencer + */ +class apb_slave_sequencer extends uvm_sequencer #(apb_transaction, apb_transaction); + + // UVM factory registration + `uvm_component_utils (apb_slave_sequencer) + + // new - constructor + function new(string name = "apb_slave_sequencer", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // Note: equivalent to + // typedef uvm_sequencer#(apb_transaction, apb_transaction) apb_slave_sequencer; + +endclass : apb_slave_sequencer + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_base_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_base_seq.sv new file mode 100644 index 0000000..c8106e9 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_base_seq.sv @@ -0,0 +1,31 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_slave_base_seq.sv + + DESCRIPTION base sequence to be extended by other sequences + + ****************************************************************************/ + +`ifndef APB_SLAVE_BASE_SEQ_SV +`define APB_SLAVE_BASE_SEQ_SV + +/** + * Class: apb_slave_base_seq + */ +class apb_slave_base_seq extends uvm_sequence #(apb_transaction, apb_transaction); + + // UVM factory registration + `uvm_object_utils(apb_slave_base_seq) + + // new - constructor + function new(string name = "apb_slave_base_seq"); + super.new(name); + endfunction : new + +endclass : apb_slave_base_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_seq_lib.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_seq_lib.sv new file mode 100644 index 0000000..bd2a153 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_seq_lib.sv @@ -0,0 +1,18 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_slave_seq_lib.sv + + DESCRIPTION sequence includes + + ****************************************************************************/ + +`ifndef APB_SLAVE_SEQ_LIB_SV +`define APB_SLAVE_SEQ_LIB_SV + +`include "slave/sequences/apb_slave_base_seq.sv" +`include "slave/sequences/apb_slave_simple_seq.sv" + +`endif \ No newline at end of file diff --git a/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_simple_seq.sv b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_simple_seq.sv new file mode 100644 index 0000000..850a86b --- /dev/null +++ b/code/Vezba 13 - prateci materijal/apb_uvc/sv/slave/sequences/apb_slave_simple_seq.sv @@ -0,0 +1,38 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE apb_slave_simple_seq.sv + + DESCRIPTION simple sequence; always respond with random data + + ****************************************************************************/ + +`ifndef APB_SLAVE_SIMPLE_SEQ_SV +`define APB_SLAVE_SIMPLE_SEQ_SV + +/** + * Class: apb_slave_simple_seq + */ +class apb_slave_simple_seq extends apb_slave_base_seq; + + // UVM factory registration + `uvm_object_utils(apb_slave_simple_seq) + + // new - constructor + function new(string name = "apb_slave_simple_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + forever begin + `uvm_do(req) + end + endtask : body + +endclass : apb_slave_simple_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/docs/I2C_UVC.pdf b/code/Vezba 13 - prateci materijal/i2c_uvc/docs/I2C_UVC.pdf new file mode 100644 index 0000000..ef6f237 Binary files /dev/null and b/code/Vezba 13 - prateci materijal/i2c_uvc/docs/I2C_UVC.pdf differ diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/docs/I2C_bus_specification.pdf b/code/Vezba 13 - prateci materijal/i2c_uvc/docs/I2C_bus_specification.pdf new file mode 100644 index 0000000..97ff986 Binary files /dev/null and b/code/Vezba 13 - prateci materijal/i2c_uvc/docs/I2C_bus_specification.pdf differ diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/examples/dut.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/dut.sv new file mode 100644 index 0000000..a7fcdcd --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/dut.sv @@ -0,0 +1,30 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE dut.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef DUT_SV +`define DUT_SV + +/** + * Module: dut + */ +module dut#( + parameter ADDR_WIDTH = 7, + parameter DATA_WIDTH = 8 + ) + ( + input logic clk, + input logic rst, + ref logic sda, + ref logic scl + ); +endmodule : dut + +`endif diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/examples/i2c_test_top.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/i2c_test_top.sv new file mode 100644 index 0000000..6eaae5f --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/i2c_test_top.sv @@ -0,0 +1,67 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_test_top.sv + + DESCRIPTION top module + - connects DUT and interface + - generates clk and reset + - runs UVM test + + ****************************************************************************/ + +`ifndef I2C_TEST_TOP_SV +`define I2C_TEST_TOP_SV + +/** + * Module: i2c_test_top + */ +module i2c_test_top; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + + import i2c_pkg::*; // import the i2c pkg + + `include "i2c_test_lib.sv" + + `include "dut.sv" + + logic clock; + logic reset; + + // interface + i2c_if i2c_vif(clock, reset); + + // DUT + dut #( .ADDR_WIDTH(7), + .DATA_WIDTH(8) + ) dut_inst ( + .clk (clock), + .rst (reset), + .scl (i2c_vif.scl), + .sda (i2c_vif.sda) + ); + + // set interface in db; run UVM test + initial begin + uvm_config_db#(virtual i2c_if)::set(null,"uvm_test_top.*","i2c_if", i2c_vif); + run_test(); + end + + // initialize clock and reset + initial begin + clock <= 1'b0; + reset <= 1'b1; + #50 reset <= 1'b0; + end + + // generate clock + always #5 clock = ~clock; + +endmodule : i2c_test_top + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_base.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_base.sv new file mode 100644 index 0000000..023cede --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_base.sv @@ -0,0 +1,48 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_test_base.sv + + DESCRIPTION base test to be extended by other tests + + ****************************************************************************/ + +`ifndef I2C_TEST_BASE_SV +`define I2C_TEST_BASE_SV + +/** + * Class: i2c_test_base + */ +class i2c_test_base extends uvm_test; + + // UVM factory registration + `uvm_component_utils (i2c_test_base) + + // main environment + i2c_env env; + + // new - constructor + function new(string name = "i2c_test_base", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // build environment + env = i2c_env::type_id::create("env", this); + endfunction : build_phase + + // UVM end_of_elaboration_phase + function void end_of_elaboration_phase(uvm_phase phase); + super.end_of_elaboration_phase(phase); + // display verification environment topology + uvm_top.print_topology(); + endfunction : end_of_elaboration_phase + +endclass : i2c_test_base + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_lib.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_lib.sv new file mode 100644 index 0000000..e336028 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_lib.sv @@ -0,0 +1,18 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_test_lib.sv + + DESCRIPTION test includes + + ****************************************************************************/ + +`ifndef I2C_TEST_LIB_SV +`define I2C_TEST_LIB_SV + +`include "i2c_test_base.sv" +`include "i2c_test_simple.sv" + +`endif \ No newline at end of file diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_simple.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_simple.sv new file mode 100644 index 0000000..0c55ceb --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/examples/tests/i2c_test_simple.sv @@ -0,0 +1,59 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_test_simple.sv + + DESCRIPTION simple test for debug + + ****************************************************************************/ + +`ifndef I2C_TEST_SIMPLE_SV +`define I2C_TEST_SIMPLE_SV + +/** + * Class: i2c_test_simple + */ +class i2c_test_simple extends i2c_test_base; + + // UVM factory registration + `uvm_component_utils (i2c_test_simple) + + // sequences + i2c_master_simple_seq master_seq; + i2c_slave_simple_seq slave_seq; + + // new - constructor + function new(string name = "i2c_test_simple", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // build all sequences + master_seq = i2c_master_simple_seq::type_id::create("master_seq"); + slave_seq = i2c_slave_simple_seq::type_id::create("slave_seq"); + endfunction : build_phase + + // UVM run_phase + task run_phase(uvm_phase phase); + assert(master_seq.randomize()); // random fields in master seq. + + phase.raise_objection(this); // test cannot end yet + + // start all sequences + fork + master_seq.start(env.master.seqr); + slave_seq.start(env.slave.seqr); // runs forever + join_any + // only way to get here is if master sequence finished + + phase.drop_objection(this); // test can end + endtask : run_phase + +endclass : i2c_test_simple + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sim/run.do b/code/Vezba 13 - prateci materijal/i2c_uvc/sim/run.do new file mode 100644 index 0000000..ed72d56 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sim/run.do @@ -0,0 +1,29 @@ +################################################################################ +# +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ +# |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| +# +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ +# +# FILE run +# +# DESCRIPTION +# +################################################################################ + +# Create the library. +if [file exists work] { + vdel -all +} +vlib work + +# compile testbench +vlog -sv \ + +incdir+$env(UVM_HOME) \ + +incdir+../sv \ + +incdir+../examples \ + +incdir+../examples/tests \ + ../sv/i2c_pkg.sv \ + ../examples/i2c_test_top.sv + +# run simulation +vsim i2c_test_top -novopt +UVM_TESTNAME=i2c_test_simple -sv_seed random + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_config.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_config.sv new file mode 100644 index 0000000..3b50309 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_config.sv @@ -0,0 +1,88 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_config.sv + + DESCRIPTION contains main and default configurations + + ****************************************************************************/ + +`ifndef I2C_CONFIG_SV +`define I2C_CONFIG_SV + +/** + * Class: i2c_config + */ +class i2c_config extends uvm_object; + + // master/slave agents + bit has_master; + bit has_slave; + + // configurations for every agent + i2c_slave_config slave_cfg; + i2c_master_config master_cfg; + + // control + bit has_checks = 1; + bit has_coverage = 1; + + // UVM factory registration + `uvm_object_utils_begin(i2c_config) + `uvm_field_int(has_master, UVM_DEFAULT) + `uvm_field_int(has_slave, UVM_DEFAULT) + `uvm_field_object(slave_cfg, UVM_DEFAULT) + `uvm_field_object(master_cfg, UVM_DEFAULT) + `uvm_field_int(has_checks, UVM_DEFAULT) + `uvm_field_int(has_coverage, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "i2c_config"); + super.new(name); + endfunction : new + + // additional class methods + extern function void add_slave(uvm_active_passive_enum is_active = UVM_ACTIVE); + extern function void add_master(uvm_active_passive_enum is_active = UVM_ACTIVE); + +endclass : i2c_config + +// creates and configures a slave agent config and adds to a queue +function void i2c_config::add_slave(uvm_active_passive_enum is_active = UVM_ACTIVE); + slave_cfg = i2c_slave_config::type_id::create("slave_cfg"); + has_slave = 1; + slave_cfg.is_active = is_active; + slave_cfg.has_checks = has_checks; + slave_cfg.has_coverage = has_coverage; +endfunction : add_slave + +// creates and configures a master agent configuration +function void i2c_config::add_master(uvm_active_passive_enum is_active = UVM_ACTIVE); + master_cfg = i2c_master_config::type_id::create("master_cfg"); + has_master = 1; + master_cfg.is_active = is_active; + master_cfg.has_checks = has_checks; + master_cfg.has_coverage = has_coverage; +endfunction : add_master + +/** + * Class: default_i2c_config + * + * Description: default configuration - one master, no slaves + */ +class default_i2c_config extends i2c_config; + + `uvm_object_utils(default_i2c_config) + + function new(string name = "default_i2c_config"); + super.new(name); + add_master(UVM_ACTIVE); + add_slave(UVM_ACTIVE); // TODO : remove after debug + endfunction : new + +endclass : default_i2c_config + +`endif diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_env.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_env.sv new file mode 100644 index 0000000..6548425 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_env.sv @@ -0,0 +1,70 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_env.sv + + DESCRIPTION environment containing the master and slave agents + + ****************************************************************************/ + +`ifndef I2C_ENV_SV +`define I2C_ENV_SV + +/** + * Class: i2c_env + */ +class i2c_env extends uvm_env; + + i2c_slave_agent slave; // one slave + i2c_master_agent master; // one master + + i2c_config cfg; // uvc configuration + + // UVM factory registration + `uvm_component_utils_begin(i2c_env) + `uvm_field_object(cfg, UVM_DEFAULT) + `uvm_component_utils_end + + // new - constructor + function new(string name = "i2c_env", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + // get configuration from db or use default configuration if none is set + if(!uvm_config_db#(i2c_config)::get(this, "", "i2c_config", cfg)) begin + `uvm_info("NOCONFIG", "Using default_i2c_config", UVM_LOW) + i2c_config::type_id::set_type_override(default_i2c_config::get_type(), 1); + cfg = i2c_config::type_id::create("cfg"); + end + + // set the master configuration + if(cfg.has_master) begin + uvm_config_db#(i2c_master_config)::set(this, "master*", "i2c_master_config", cfg.master_cfg); + uvm_config_db#(i2c_config)::set(this, "master.mon*", "i2c_config", cfg); + end + // set the slave configuration + if(cfg.has_slave) begin + uvm_config_db#(i2c_slave_config)::set(this, "slave*", "i2c_slave_config", cfg.slave_cfg); + uvm_config_db#(i2c_config)::set(this, "slave.mon*", "i2c_config", cfg); + end + + // create agents + if(cfg.has_master) begin + master = i2c_master_agent::type_id::create("master", this); + end + if(cfg.has_slave) begin + slave = i2c_slave_agent::type_id::create("slave", this); + end + + endfunction : build_phase + +endclass : i2c_env + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_if.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_if.sv new file mode 100644 index 0000000..4ab5c7a --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_if.sv @@ -0,0 +1,40 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_if.sv + + DESCRIPTION i2c interface + + ****************************************************************************/ + +`ifndef I2C_IF_SV +`define I2C_IF_SV + +/* + * Interface: i2c_if + */ +interface i2c_if(input logic clk, input logic rst); + + // connected to DUT + wire sda_wire; + wire scl_wire; + + // driven by uvc + logic sda; + logic scl; + + assign sda_wire = sda; + assign scl_wire = scl; + + // control + bit has_checks = 1; + bit has_coverage = 1; + + // TODO : coverage and assertions go here... + +endinterface : i2c_if + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_monitor.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_monitor.sv new file mode 100644 index 0000000..f062dc1 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_monitor.sv @@ -0,0 +1,208 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_monitor.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef I2C_MONITOR_SV +`define I2C_MONITOR_SV + +/* + * Class: i2c_monitor + */ +class i2c_monitor extends uvm_monitor; + + // i2c virtual interface + virtual i2c_if vif; + + // configuration + i2c_config cfg; + + // TLM - from monitor to other components + uvm_analysis_port #(i2c_transaction) item_collected_port; + + // keep track of number of transactions + int unsigned num_transactions = 0; + + // current transaction + i2c_transaction tr_collected; + + // start and stop helper events + event start_e; + event stop_e; + + // UVM factory registration + `uvm_component_utils_begin(i2c_monitor) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // coverage + covergroup cg_i2c_monitor; + // cover direction - read or write + cp_direction : coverpoint tr_collected.dir { + bins write = {I2C_WRITE}; + bins read = {I2C_READ}; + } + // cover address ack + cp_addr_ack : coverpoint tr_collected.addr_ack { + bins ack = {I2C_ACK}; + bins nack = {I2C_NACK}; + } + // cover data ack + cp_data_ack : coverpoint tr_collected.data_ack { + bins ack = {I2C_ACK}; + bins nack = {I2C_NACK}; + } + // TODO : add others + endgroup : cg_i2c_monitor; + + // new - constructor + function new(string name = "i2c_monitor", uvm_component parent = null); + super.new(name, parent); + item_collected_port = new("item_collected_port", this); + cg_i2c_monitor = new(); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(i2c_config)::get(this, "", "i2c_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual i2c_if)::get(this, "", "i2c_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task start_condition(ref event start_e); + extern virtual task stop_condition(ref event stop_e); + extern virtual task run_phase(uvm_phase phase); + extern virtual task collect_transactions(); + extern virtual function void report_phase(uvm_phase phase); + +endclass : i2c_monitor + +// UVM run_phase +task i2c_monitor::run_phase(uvm_phase phase); + forever begin + + @(negedge vif.rst); // reset dropped + `uvm_info(get_type_name(), "Reset dropped", UVM_MEDIUM) + + fork + @(posedge vif.rst); // reset is active high + start_condition(start_e); + stop_condition(stop_e); + collect_transactions(); + join_any + disable fork; + // only way to get here is after reset + + end +endtask : run_phase + +// trigger event when start +task i2c_monitor::start_condition(ref event start_e); + forever begin + wait(vif.sda_wire !== 1'bx); // don't trigger from an X to 0 transition + @(negedge vif.sda_wire); + if(vif.scl_wire === 1'b1) begin + ->start_e; + end + end +endtask : start_condition + +// trigger event when stop +task i2c_monitor::stop_condition(ref event stop_e); + forever begin + wait(vif.sda_wire !== 1'bx); // don't trigger from an X to 1 transition + @(posedge vif.sda_wire); + if(vif.scl_wire === 1'b1) begin + ->stop_e; + end + end +endtask : stop_condition + +// monitor i2c interface and collect transactions +task i2c_monitor::collect_transactions(); + forever begin + wait(start_e.triggered); + tr_collected = i2c_transaction::type_id::create("tr_collected", this); + + // address + tr_collected.addr = 0; + repeat(ADDR_WIDTH) begin + @(posedge vif.scl_wire); + #1; + tr_collected.addr = {tr_collected.addr[ADDR_WIDTH - 2 : 0], vif.sda_wire}; + end + + // read / write bit + @(posedge vif.scl_wire); + #1; + tr_collected.dir = i2c_direction_enum'(vif.sda_wire); + + // ack bit + @(posedge vif.scl_wire); + #1; + if(vif.sda_wire === 1'b0) tr_collected.addr_ack = I2C_ACK; + else tr_collected.addr_ack = I2C_NACK; + if(cfg.has_checks) begin // check for NACK + asrt_addr_nack : assert (tr_collected.addr_ack == I2C_ACK) + else + `uvm_error(get_type_name(), $sformatf("Observed address NACK during %s", tr_collected.dir.name)) + end + // only if ack + if(tr_collected.addr_ack == I2C_ACK) begin + // data + repeat(DATA_WIDTH) begin + @(posedge vif.scl_wire); + #1; + tr_collected.data = {tr_collected.data[DATA_WIDTH - 2 : 0], vif.sda_wire}; + end + + // ack bit + @(posedge vif.scl_wire); + #1; + if(vif.sda_wire === 1'b0) tr_collected.data_ack = I2C_ACK; + else tr_collected.data_ack = I2C_NACK; + if(cfg.has_checks) begin // check for NACK + asrt_data_nack : assert (tr_collected.data_ack == I2C_ACK) + else + `uvm_error(get_type_name(), $sformatf("Observed data NACK during %s", tr_collected.dir.name)) + end + end + + wait(stop_e.triggered); + + item_collected_port.write(tr_collected); // TLM + // collect coverage if enabled + if(cfg.has_coverage == 1) begin + cg_i2c_monitor.sample(); + end + `uvm_info(get_type_name(), $sformatf("Tr collected :\n%s", tr_collected.sprint()), UVM_MEDIUM) + num_transactions++; + end +endtask : collect_transactions + +// UVM report_phase +function void i2c_monitor::report_phase(uvm_phase phase); + // final report + `uvm_info( get_type_name(), + $sformatf("Report: I2C monitor collected: %0d transactions", num_transactions), + UVM_LOW); +endfunction : report_phase + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_pkg.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_pkg.sv new file mode 100644 index 0000000..b9f5535 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_pkg.sv @@ -0,0 +1,62 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_pkg.sv + + DESCRIPTION package containing all parameters and includes + + ****************************************************************************/ + +`ifndef I2C_PKG_SV +`define I2C_PKG_SV + +/* + * Package: i2c_pkg + */ +package i2c_pkg; + + parameter int ADDR_WIDTH = 7; + parameter int DATA_WIDTH = 8; + + typedef class i2c_transaction; + typedef class i2c_master_config; + typedef class i2c_master_driver; + typedef class i2c_master_agent; + typedef class i2c_slave_config; + typedef class i2c_slave_driver; + typedef class i2c_slave_agent; + typedef class i2c_config; + typedef class i2c_monitor; + typedef class i2c_env; + + import uvm_pkg::*; + `include "uvm_macros.svh" + + `include "i2c_types.sv" + + // master + `include "master/i2c_master_config.sv" + `include "master/i2c_master_driver.sv" + `include "master/i2c_master_agent.sv" + `include "master/sequences/i2c_master_seq_lib.sv" + + // slave + `include "slave/i2c_slave_config.sv" + `include "slave/i2c_slave_driver.sv" + `include "slave/i2c_slave_agent.sv" + `include "slave/sequences/i2c_slave_seq_lib.sv" + + // top + `include "i2c_transaction.sv" + `include "i2c_config.sv" + `include "i2c_monitor.sv" + `include "i2c_env.sv" + +endpackage: i2c_pkg + +`include "i2c_if.sv" + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_transaction.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_transaction.sv new file mode 100644 index 0000000..05e4415 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_transaction.sv @@ -0,0 +1,67 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_transaction.sv + + DESCRIPTION sequence item + + ****************************************************************************/ + +`ifndef I2C_TRANSACTION_SV +`define I2C_TRANSACTION_SV + +/* + * Class: i2c_transaction + */ +class i2c_transaction extends uvm_sequence_item; + + // fields + rand i2c_direction_enum dir; + rand bit [ADDR_WIDTH - 1 : 0] addr; + rand i2c_ack_enum addr_ack; + rand bit [DATA_WIDTH - 1 : 0] data; + rand i2c_ack_enum data_ack; + + // timings (#clk cycles) + rand int unsigned scl_period; // SCL period + rand int unsigned start_hold; // start hold time before SCL toggle + rand int unsigned stop_setup; // setup time from SCL posedge to SDA assert + rand int unsigned delay; // time between stop and start conditions + + // constraints + constraint timing_constraint { + scl_period inside {[1 : 20]}; + scl_period % 4 == 0; + start_hold inside {[1 : 10]}; + stop_setup inside {[1 : 10]}; + delay inside {[1 : 10]}; + } + constraint ack_constraint { + addr_ack dist {I2C_ACK := 8, I2C_NACK := 2}; + data_ack dist {I2C_ACK := 8, I2C_NACK := 2}; + } + + // UVM factory registration + `uvm_object_utils_begin (i2c_transaction) + `uvm_field_enum (i2c_direction_enum, dir, UVM_DEFAULT) + `uvm_field_enum (i2c_ack_enum, data_ack, UVM_DEFAULT) + `uvm_field_enum (i2c_ack_enum, addr_ack, UVM_DEFAULT) + `uvm_field_int (addr, UVM_DEFAULT) + `uvm_field_int (data, UVM_DEFAULT) + `uvm_field_int (scl_period, UVM_DEFAULT) + `uvm_field_int (start_hold, UVM_DEFAULT) + `uvm_field_int (stop_setup, UVM_DEFAULT) + `uvm_field_int (delay, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "i2c_transaction"); + super.new(name); + endfunction : new + +endclass : i2c_transaction + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_types.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_types.sv new file mode 100644 index 0000000..531c51b --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/i2c_types.sv @@ -0,0 +1,26 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_types.sv + + DESCRIPTION contains all typedef-s used in project + + ****************************************************************************/ + +`ifndef I2C_TYPES_SV +`define I2C_TYPES_SV + +typedef enum { + I2C_WRITE = 0, + I2C_READ = 1 +} i2c_direction_enum; + +typedef enum { + I2C_ACK = 0, + I2C_NACK = 1 +} i2c_ack_enum; + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_agent.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_agent.sv new file mode 100644 index 0000000..ca7f78d --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_agent.sv @@ -0,0 +1,69 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_master_agent.sv + + DESCRIPTION master agent + + ****************************************************************************/ + +`ifndef I2C_MASTER_AGENT_SV +`define I2C_MASTER_AGENT_SV + +typedef uvm_sequencer #(i2c_transaction) i2c_master_sequencer; + +/* + * Class: i2c_master_agent + */ +class i2c_master_agent extends uvm_agent; + + // configuration object + i2c_master_config cfg; + + // components + i2c_monitor mon; + i2c_master_driver drv; + i2c_master_sequencer seqr; + + // UVM factory registration + `uvm_component_utils_begin(i2c_master_agent) + `uvm_field_object(cfg, UVM_DEFAULT) + `uvm_component_utils_end + + // new - constructor + function new(string name = "i2c_master_agent", uvm_component parent); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + // get configuration object from db + if(!uvm_config_db#(i2c_master_config)::get(this, "", "i2c_master_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + + // create driver and sequencer if agent is active + if(cfg.is_active == UVM_ACTIVE) begin + seqr = i2c_master_sequencer::type_id::create("seqr", this); + drv = i2c_master_driver::type_id::create("drv", this); + end + // always create monitor + mon = i2c_monitor::type_id::create("mon", this); + endfunction : build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // connect driver and sequencer if agent is active + if(cfg.is_active == UVM_ACTIVE) begin + drv.seq_item_port.connect(seqr.seq_item_export); + end + endfunction : connect_phase + +endclass : i2c_master_agent + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_config.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_config.sv new file mode 100644 index 0000000..82fb81f --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_config.sv @@ -0,0 +1,41 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_master_config.sv + + DESCRIPTION contains main and default configurations + + ****************************************************************************/ + +`ifndef I2C_MASTER_CONFIG_SV +`define I2C_MASTER_CONFIG_SV + +/* + * Class: i2c_master_config + */ +class i2c_master_config extends uvm_object; + + // is agent active or passive + uvm_active_passive_enum is_active = UVM_ACTIVE; + // checks and coverage control + bit has_checks = 1; + bit has_coverage = 1; + + // UVM factory registration + `uvm_object_utils_begin(i2c_master_config) + `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT) + `uvm_field_int(has_checks, UVM_DEFAULT) + `uvm_field_int(has_coverage, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "i2c_master_config"); + super.new(name); + endfunction : new + +endclass : i2c_master_config + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_driver.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_driver.sv new file mode 100644 index 0000000..81a14fc --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/i2c_master_driver.sv @@ -0,0 +1,195 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_master_driver.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef I2C_MASTER_DRIVER_SV +`define I2C_MASTER_DRIVER_SV + +/* + * Class: i2c_master_driver + */ +class i2c_master_driver extends uvm_driver #(i2c_transaction); + + // i2c virtual interface + virtual i2c_if vif; + + // configuration + i2c_master_config cfg; + + // UVM factory registration + `uvm_component_utils_begin(i2c_master_driver) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new(string name = "i2c_master_driver", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + virtual function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(i2c_master_config)::get(this, "*", "i2c_master_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + virtual function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual i2c_if)::get(this, "", "i2c_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task run_phase(uvm_phase phase); + extern virtual task reset(); + extern virtual task drive_transaction(i2c_transaction tr); + extern virtual task drive_start(i2c_transaction tr); + extern virtual task drive_stop(i2c_transaction tr); + extern virtual task drive_bit(input logic bit_to_drive, input int unsigned scl_period); + extern virtual task read_bit(output logic bit_read, input int unsigned scl_period); + +endclass : i2c_master_driver + +// UVM run_phase +task i2c_master_driver::run_phase(uvm_phase phase); + reset(); // init + forever begin + fork + @(posedge vif.rst); // reset is active high + forever begin + seq_item_port.get_next_item(req); + drive_start(req); + drive_transaction(req); + drive_stop(req); + seq_item_port.item_done(); + end + join_any + disable fork; + reset(); + end + +endtask : run_phase + +// reset signals +task i2c_master_driver::reset(); + `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM) + vif.scl <= 1'b1; + vif.sda <= 1'b1; + @(negedge vif.rst); // reset dropped +endtask : reset + +// drive start condition +task i2c_master_driver::drive_start(i2c_transaction tr); + + @(posedge vif.clk); // sync + + vif.scl <= 1'b1; + vif.sda <= 1'b0; + + repeat(tr.start_hold) @(posedge vif.clk); + + vif.scl <= 1'b1; + repeat(tr.scl_period / 2) @(posedge vif.clk); + vif.scl <= 1'b0; + repeat(tr.scl_period / 4) @(posedge vif.clk); + +endtask : drive_start + +// drive stop condition +task i2c_master_driver::drive_stop(i2c_transaction tr); + + @(posedge vif.clk); // sync + + vif.sda <= 1'b0; + + repeat(tr.scl_period / 2) @(posedge vif.clk); + vif.scl <= 1'b1; + + repeat(tr.stop_setup) @(posedge vif.clk); + vif.sda <= 1'b1; + + repeat(tr.delay) @(posedge vif.clk); + +endtask : drive_stop + +// drive transaction +task i2c_master_driver::drive_transaction(i2c_transaction tr); + logic ack; + + // drive address (msb first) + for(int i = ADDR_WIDTH; i > 0; --i) begin + drive_bit(tr.addr[i-1], tr.scl_period); + end + + // drive direction + drive_bit(tr.dir, tr.scl_period); + + // get ack from slave + read_bit(ack, tr.scl_period); + if(ack === 1'b0) tr.addr_ack = I2C_ACK; + else tr.addr_ack = I2C_NACK; + + // recieved ack - continue + if(tr.addr_ack == 1'b0) begin + if(tr.dir == I2C_WRITE) begin + for(int i = DATA_WIDTH; i > 0; --i) begin + drive_bit(tr.data[i - 1], tr.scl_period); + end + // get ack from slave + read_bit(ack, tr.scl_period); + if(ack === 1'b0) tr.data_ack = I2C_ACK; + else tr.data_ack = I2C_NACK; + end + else begin // READ + // get data - msb first + for(int i = DATA_WIDTH; i > 0; --i) begin + read_bit(tr.data[i-1], tr.scl_period); + end + + // ack or nack + drive_bit(tr.data_ack, tr.scl_period); + end + end + + `uvm_info(get_type_name(), $sformatf("I2C Finished Driving tr \n%s", tr.sprint()), UVM_HIGH) + +endtask : drive_transaction + +// drive one bit +task i2c_master_driver::drive_bit(input logic bit_to_drive, input int unsigned scl_period); + + vif.sda <= bit_to_drive; + repeat(scl_period / 4) @(posedge vif.clk); + vif.scl <= 1'b1; + repeat(scl_period / 2) @(posedge vif.clk); + vif.scl <= 1'b0; + repeat(scl_period / 4) @(posedge vif.clk); + +endtask : drive_bit + +// read one bit +task i2c_master_driver::read_bit(output logic bit_read, input int unsigned scl_period); + + vif.sda <= 1'bZ; + repeat(scl_period / 4) @(posedge vif.clk); + vif.scl <= 1'b1; + repeat(scl_period / 4) @(posedge vif.clk); + bit_read = vif.sda_wire; + repeat(scl_period / 4) @(posedge vif.clk); + vif.scl <= 1'b0; + repeat(scl_period / 4) @(posedge vif.clk); + +endtask : read_bit + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_base_seq.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_base_seq.sv new file mode 100644 index 0000000..b9fb84a --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_base_seq.sv @@ -0,0 +1,31 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_master_base_seq.sv + + DESCRIPTION base sequence to be extended by other sequences + + ****************************************************************************/ + +`ifndef I2C_MASTER_BASE_SEQ_SV +`define I2C_MASTER_BASE_SEQ_SV + +/* + * Class: i2c_master_base_seq + */ +class i2c_master_base_seq extends uvm_sequence #(i2c_transaction); + + // UVM factory registration + `uvm_object_utils(i2c_master_base_seq) + + // new - constructor + function new(string name = "i2c_master_base_seq"); + super.new(name); + endfunction: new + +endclass: i2c_master_base_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_seq_lib.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_seq_lib.sv new file mode 100644 index 0000000..07a3971 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_seq_lib.sv @@ -0,0 +1,18 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_master_seq_lib.sv + + DESCRIPTION sequence includes + + ****************************************************************************/ + +`ifndef I2C_MASTER_SEQ_LIB_SV +`define I2C_MASTER_SEQ_LIB_SV + +`include "master/sequences/i2c_master_base_seq.sv" +`include "master/sequences/i2c_master_simple_seq.sv" + +`endif \ No newline at end of file diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_simple_seq.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_simple_seq.sv new file mode 100644 index 0000000..e8c15d1 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/master/sequences/i2c_master_simple_seq.sv @@ -0,0 +1,42 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_master_simple_seq.sv + + DESCRIPTION simple sequence; random transactions + + ****************************************************************************/ + +`ifndef I2C_MASTER_SIMPLE_SEQ_SV +`define I2C_MASTER_SIMPLE_SEQ_SV + +/** + * Class: i2c_master_simple_seq + */ +class i2c_master_simple_seq extends i2c_master_base_seq; + + rand int unsigned num_of_tr; + + // constraints + constraint num_of_tr_cst { num_of_tr inside {[1 : 10]};} + + // UVM factory registration + `uvm_object_utils(i2c_master_simple_seq) + + // new - constructor + function new(string name = "i2c_master_simple_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + repeat(num_of_tr) begin + `uvm_do(req) + end + endtask : body + +endclass : i2c_master_simple_seq + +`endif diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_agent.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_agent.sv new file mode 100644 index 0000000..7e220fc --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_agent.sv @@ -0,0 +1,70 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_slave_agent.sv + + DESCRIPTION slave agent + + ****************************************************************************/ + +`ifndef I2C_SLAVE_AGENT_SV +`define I2C_SLAVE_AGENT_SV + +typedef uvm_sequencer #(i2c_transaction) i2c_slave_sequencer; + + +/** + * Class: i2c_slave_agent + */ +class i2c_slave_agent extends uvm_agent; + + // configuration object + i2c_slave_config cfg; + + // components + i2c_slave_driver drv; + i2c_slave_sequencer seqr; + i2c_monitor mon; + + // UVM factory registration + `uvm_component_utils_begin(i2c_slave_agent) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new(string name = "i2c_slave_agent", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + // get configuration object from db + if(!uvm_config_db#(i2c_slave_config)::get(this, "", "i2c_slave_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + + // create driver and sequencer if agent is active + if(cfg.is_active == UVM_ACTIVE) begin + seqr = i2c_slave_sequencer::type_id::create("seqr", this); + drv = i2c_slave_driver::type_id::create("drv", this); + end + // always create monitor + mon = i2c_monitor::type_id::create("mon", this); + endfunction : build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // connect driver and sequencer if agent is active + if(cfg.is_active == UVM_ACTIVE) begin + drv.seq_item_port.connect(seqr.seq_item_export); + end + endfunction : connect_phase + +endclass : i2c_slave_agent + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_config.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_config.sv new file mode 100644 index 0000000..05e82c0 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_config.sv @@ -0,0 +1,41 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_slave_config.sv + + DESCRIPTION slave configuration object + + ****************************************************************************/ + +`ifndef I2C_SLAVE_CONFIG_SV +`define I2C_SLAVE_CONFIG_SV + +/** + * Class: i2c_slave_config + */ +class i2c_slave_config extends uvm_object; + + // is agent active or passive + uvm_active_passive_enum is_active = UVM_ACTIVE; + // checks and coverage control + bit has_checks = 1; + bit has_coverage = 1; + + // UVM factory registration + `uvm_object_utils_begin(i2c_slave_config) + `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT) + `uvm_field_int(has_checks, UVM_DEFAULT) + `uvm_field_int(has_coverage, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "i2c_slave_config"); + super.new(name); + endfunction : new + +endclass : i2c_slave_config + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_driver.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_driver.sv new file mode 100644 index 0000000..2e3c8f4 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/i2c_slave_driver.sv @@ -0,0 +1,148 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_slave_driver.sv + + DESCRIPTION drives slave response + + ****************************************************************************/ + +`ifndef I2C_SLAVE_DRIVER_SV +`define I2C_SLAVE_DRIVER_SV + +/** + * Class: i2c_slave_driver + */ +class i2c_slave_driver extends uvm_driver #(i2c_transaction, i2c_transaction); + + // i2c virtual interface + virtual i2c_if vif; + + // configuration + i2c_slave_config cfg; + + // UVM factory registration + `uvm_component_utils_begin(i2c_slave_driver) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new(string name = "i2c_slave_driver", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(i2c_slave_config)::get(this, "", "i2c_slave_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual i2c_if)::get(this, "", "i2c_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task run_phase(uvm_phase phase); + extern virtual task reset(); + extern virtual task get_and_drive(); + extern virtual task drive_tr(i2c_transaction tr); + +endclass : i2c_slave_driver + +// UVM run_phase +task i2c_slave_driver::run_phase(uvm_phase phase); + reset(); // init. + forever begin + fork + @(posedge vif.rst); // reset is active low + // threads killed at reset + get_and_drive(); + join_any + disable fork; + + reset(); + end +endtask : run_phase + +// reset signals +task i2c_slave_driver::reset(); + `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM) + vif.scl <= 1'b1; + vif.sda <= 1'b1; + @(negedge vif.rst); // reset dropped +endtask : reset + +// sequencer/driver handshake +task i2c_slave_driver::get_and_drive(); + forever begin + seq_item_port.get_next_item(req); + drive_tr(req); + seq_item_port.item_done(); + end +endtask : get_and_drive + +// drive transaction +task i2c_slave_driver::drive_tr (i2c_transaction tr); + + // wait for the master to initiate the transaction + @(negedge vif.sda_wire iff vif.scl_wire === 1'b1); // start condition + + // address + tr.addr = 0; + repeat(ADDR_WIDTH) begin + @(posedge vif.scl_wire); + #1; + tr.addr = {tr.addr[ADDR_WIDTH - 2 : 0], vif.sda_wire}; + end + + // read / write bit + @(posedge vif.scl_wire); + #1; + tr.dir = i2c_direction_enum'(vif.sda_wire); + + // drive addr ack / nack + @(posedge vif.scl_wire); + vif.sda = tr.addr_ack; + + // recieved ack - continue + if(tr.addr_ack == I2C_ACK) begin + if(tr.dir == I2C_WRITE) begin + // data + repeat(DATA_WIDTH) begin + @(posedge vif.scl_wire); + #1; + tr.data = {tr.data[DATA_WIDTH - 2 : 0], vif.sda_wire}; + end + // drive data ack / nack + @(posedge vif.scl_wire); + vif.sda <= tr.data_ack; + end + else begin // READ + // drive data - msb first + for(int i = DATA_WIDTH; i > 0; --i) begin + @(posedge vif.scl_wire); + vif.sda <= tr.data[i-1]; + end + + // read data ack / nack + @(posedge vif.scl_wire); + #1; + if(vif.sda_wire === 1'b0) tr.data_ack = I2C_ACK; + else tr.data_ack = I2C_NACK; + end + end + + `uvm_info(get_type_name(), $sformatf("i2c Finished Driving tr \n%s", tr.sprint()), UVM_HIGH) + +endtask : drive_tr + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_base_seq.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_base_seq.sv new file mode 100644 index 0000000..fe8fb63 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_base_seq.sv @@ -0,0 +1,31 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_slave_base_seq.sv + + DESCRIPTION base sequence to be extended by other sequences + + ****************************************************************************/ + +`ifndef I2C_SLAVE_BASE_SEQ_SV +`define I2C_SLAVE_BASE_SEQ_SV + +/** + * Class: i2c_slave_base_seq + */ +class i2c_slave_base_seq extends uvm_sequence #(i2c_transaction, i2c_transaction); + + // UVM factory registration + `uvm_object_utils(i2c_slave_base_seq) + + // new - constructor + function new(string name = "i2c_slave_base_seq"); + super.new(name); + endfunction : new + +endclass : i2c_slave_base_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_seq_lib.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_seq_lib.sv new file mode 100644 index 0000000..4ff8a86 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_seq_lib.sv @@ -0,0 +1,18 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_slave_seq_lib.sv + + DESCRIPTION sequence includes + + ****************************************************************************/ + +`ifndef I2C_SLAVE_SEQ_LIB_SV +`define I2C_SLAVE_SEQ_LIB_SV + +`include "slave/sequences/i2c_slave_base_seq.sv" +`include "slave/sequences/i2c_slave_simple_seq.sv" + +`endif \ No newline at end of file diff --git a/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_simple_seq.sv b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_simple_seq.sv new file mode 100644 index 0000000..85c114e --- /dev/null +++ b/code/Vezba 13 - prateci materijal/i2c_uvc/sv/slave/sequences/i2c_slave_simple_seq.sv @@ -0,0 +1,38 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE i2c_slave_simple_seq.sv + + DESCRIPTION simple sequence; always respond with random data + + ****************************************************************************/ + +`ifndef I2C_SLAVE_SIMPLE_SEQ_SV +`define I2C_SLAVE_SIMPLE_SEQ_SV + +/** + * Class: i2c_slave_simple_seq + */ +class i2c_slave_simple_seq extends i2c_slave_base_seq; + + // UVM factory registration + `uvm_object_utils(i2c_slave_simple_seq) + + // new - constructor + function new(string name = "i2c_slave_simple_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + forever begin + `uvm_do(req) + end + endtask : body + +endclass : i2c_slave_simple_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/reset_agent/docs/reset_agent.pdf b/code/Vezba 13 - prateci materijal/reset_agent/docs/reset_agent.pdf new file mode 100644 index 0000000..d106db1 Binary files /dev/null and b/code/Vezba 13 - prateci materijal/reset_agent/docs/reset_agent.pdf differ diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_agent.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_agent.sv new file mode 100644 index 0000000..3e49a33 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_agent.sv @@ -0,0 +1,72 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_agent.sv + + DESCRIPTION + + ****************************************************************************/ + +`ifndef RESET_AGENT_SV +`define RESET_AGENT_SV + +// reset sequencer +typedef uvm_sequencer#(reset_transaction) reset_sequencer; + +/** + * Class: reset_agent + */ +class reset_agent extends uvm_agent; + + // configuration object + reset_config cfg; + + // components + reset_sequencer seqr; + reset_driver drv; + reset_monitor mon; + + // UVM factory registration + `uvm_component_utils_begin(reset_agent) + `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT) + `uvm_component_utils_end + + // new - constructor + function new (string name = "reset_agent", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + // get configuration object from db + if(!uvm_config_db#(reset_config)::get(this, "", "reset_config", cfg)) begin + `uvm_info("NOCONFIG", "Using default reset_config", UVM_LOW) + cfg = reset_config::type_id::create("cfg"); + uvm_config_db#(reset_config)::set(this, "*", "reset_config", cfg); + end + + // create driver and sequencer if agent is active + if(cfg.is_active == UVM_ACTIVE) begin + seqr = reset_sequencer::type_id::create("seqr", this); + drv = reset_driver::type_id::create("drv", this); + end + // always create monitor + mon = reset_monitor::type_id::create("mon", this); + endfunction : build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // connect driver and sequencer if agent is active + if(cfg.is_active == UVM_ACTIVE) begin + drv.seq_item_port.connect(seqr.seq_item_export); + end + endfunction : connect_phase + +endclass : reset_agent + +`endif diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_config.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_config.sv new file mode 100644 index 0000000..98e167d --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_config.sv @@ -0,0 +1,46 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_config.sv + + DESCRIPTION configuration class for reset agent + + ****************************************************************************/ + +`ifndef RESET_CONFIG_SV +`define RESET_CONFIG_SV +/** + * Class: reset_config + */ +class reset_config extends uvm_object; + + // reset value at the start of simulation + bit value_at_0 = 0; + // 1 = reset is active high; 0 = active low + bit active_high = 1; + // is agent active or passive + uvm_active_passive_enum is_active = UVM_ACTIVE; + // checks and coverage control + bit has_checks = 1; + bit has_coverage = 1; + + // UVM factory registration + `uvm_object_utils_begin(reset_config) + `uvm_field_int(value_at_0, UVM_DEFAULT) + `uvm_field_int(active_high, UVM_DEFAULT) + `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT) + `uvm_field_int(has_checks, UVM_DEFAULT) + `uvm_field_int(has_coverage, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new(string name = "reset_config"); + super.new(name); + endfunction : new + +endclass : reset_config + +`endif + diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_driver.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_driver.sv new file mode 100644 index 0000000..c5998e9 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_driver.sv @@ -0,0 +1,93 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_driver.sv + + DESCRIPTION drives reset + + ****************************************************************************/ + +`ifndef RESET_DRIVER_SV +`define RESET_DRIVER_SV + +/** + * Class: reset_driver + */ +class reset_driver extends uvm_driver #(reset_transaction); + + // reset virtual interface + virtual reset_if vif; + + // configuration + reset_config cfg; + + // UVM factory registration + `uvm_component_utils_begin(reset_driver) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // new - constructor + function new (string name = "reset_driver", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // UVM build_phase + virtual function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(reset_config)::get(this, "*", "reset_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + virtual function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual reset_if)::get(this, "", "reset_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task run_phase(uvm_phase phase); + extern virtual function void start_of_simulation_phase(uvm_phase phase); + extern virtual task drive_tr (reset_transaction tr); + +endclass : reset_driver + +// UVM start_of_simulation_phase +function void reset_driver::start_of_simulation_phase(uvm_phase phase); + super.start_of_simulation_phase(phase); + vif.reset <= cfg.value_at_0; // init reset +endfunction + +// UVM run_phase +task reset_driver::run_phase(uvm_phase phase); + forever begin + seq_item_port.get_next_item(req); + drive_tr(req); + seq_item_port.item_done(); + end +endtask : run_phase + +// Drives a transfer when an item is ready to be sent. +task reset_driver::drive_tr (reset_transaction tr); + `uvm_info( get_type_name(), + $sformatf("Driving reset: delay %0d clocks duration of %0d clocks", + tr.transmit_delay, tr.duration), + UVM_LOW) + // delay + if (tr.transmit_delay > 0) begin + repeat(tr.transmit_delay) @(posedge vif.clk); + end + // start reset + vif.reset <= cfg.active_high; + // duration + repeat(tr.duration) @(posedge vif.clk); + // drop reset + vif.reset <= ~cfg.active_high; + +endtask : drive_tr + +`endif diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_if.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_if.sv new file mode 100644 index 0000000..ec5f1d2 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_if.sv @@ -0,0 +1,22 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_if.sv + + DESCRIPTION reset interface + + ****************************************************************************/ + +`ifndef RESET_IF_SV +`define RESET_IF_SV + +/** + * Interface: reset_if + */ +interface reset_if (input clk, output logic reset); + +endinterface : reset_if + +`endif diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_monitor.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_monitor.sv new file mode 100644 index 0000000..848db3a --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_monitor.sv @@ -0,0 +1,127 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_monitor.sv + + DESCRIPTION monitors interface for reset; collects coverage + + ****************************************************************************/ + +`ifndef RESET_MONITOR_SV +`define RESET_MONITOR_SV + +/** + * Class: reset_monitor + */ +class reset_monitor extends uvm_monitor; + + // reset virtual interface + virtual reset_if vif; + + // configuration + reset_config cfg; + + // TLM - from monitor to other components + uvm_analysis_port #(reset_transaction) item_collected_port; + + // keep track of number of transactions + int unsigned num_transactions = 0; + + // current transaction + reset_transaction tr_collected; + + // UVM factory registration + `uvm_component_utils_begin(reset_monitor) + `uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE) + `uvm_component_utils_end + + // coverage + covergroup cg_reset; + // reset duration + cp_duration : coverpoint tr_collected.duration { + bins one_clk = {1}; + bins other = default; + } + endgroup : cg_reset; + + // new - constructor + function new(string name = "reset_monitor", uvm_component parent = null); + super.new(name, parent); + item_collected_port = new("item_collected_port", this); + cg_reset = new(); + endfunction : new + + // UVM build_phase + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // get configuration object from db + if(!uvm_config_db#(reset_config)::get(this, "", "reset_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + endfunction: build_phase + + // UVM connect_phase + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + // get interface from db + if(!uvm_config_db#(virtual reset_if)::get(this, "", "reset_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + // additional class methods + extern virtual task run_phase(uvm_phase phase); + extern virtual function void report_phase(uvm_phase phase); + +endclass : reset_monitor + +// UVM run_phase +task reset_monitor::run_phase(uvm_phase phase); + forever begin + tr_collected = reset_transaction::type_id::create("tr_collected"); + + // monitor reset + if(cfg.active_high) begin + @(posedge vif.reset); + end + else begin + @(negedge vif.reset); + end + `uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM) + + tr_collected.duration = 1; + fork + // get duration + forever begin + @(posedge vif.clk) tr_collected.duration++; + end + // monitor reset dropped + begin + if(cfg.active_high) begin + @(negedge vif.reset); + end + else begin + @(posedge vif.reset); + end + end + join_any + disable fork; + + item_collected_port.write(tr_collected); // TLM + // collect coverage if enabled + if(cfg.has_coverage == 1) begin + cg_reset.sample(); + end + num_transactions++; + + end // forever begin +endtask : run_phase + +// UVM report_phase +function void reset_monitor::report_phase(uvm_phase phase); + // final report + `uvm_info(get_type_name(), $sformatf("Report: reset monitor collected %0d transfers", num_transactions), UVM_LOW); +endfunction : report_phase + +`endif + diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_pkg.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_pkg.sv new file mode 100644 index 0000000..0d7d90c --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_pkg.sv @@ -0,0 +1,34 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_pkg.sv + + DESCRIPTION package containing all parameters and includes + + ****************************************************************************/ + +`ifndef RESET_PKG_SV +`define RESET_PKG_SV + +/** + * Package: reset_pkg + */ +package reset_pkg; + + import uvm_pkg::*; + `include "uvm_macros.svh" + + `include "reset_config.sv" + `include "reset_transaction.sv" + `include "reset_driver.sv" + `include "reset_monitor.sv" + `include "reset_agent.sv" + `include "sequences/reset_seq_lib.sv" + +endpackage : reset_pkg + +`include "reset_if.sv" + +`endif diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_transaction.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_transaction.sv new file mode 100644 index 0000000..f453e0a --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/reset_transaction.sv @@ -0,0 +1,42 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_transaction.sv + + DESCRIPTION reset sequence item + + ****************************************************************************/ + +`ifndef RESET_TRANSACTION_SV +`define RESET_TRANSACTION_SV + +/** + * Class: reset_transaction + */ +class reset_transaction extends uvm_sequence_item; + + // delay before asserting reset (#clk cycles) + rand int unsigned transmit_delay; + // duration of reset (#clk cycles) + rand int unsigned duration; + + // constraints + constraint c_transmit_delay { transmit_delay <= 10; } + constraint c_duration { duration inside {[0:5]}; } + + // UVM factory registration + `uvm_object_utils_begin(reset_transaction) + `uvm_field_int(transmit_delay, UVM_DEFAULT) + `uvm_field_int(duration, UVM_DEFAULT) + `uvm_object_utils_end + + // new - constructor + function new (string name = "reset_transaction"); + super.new(name); + endfunction : new + +endclass : reset_transaction + +`endif \ No newline at end of file diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_base_seq.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_base_seq.sv new file mode 100644 index 0000000..e777056 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_base_seq.sv @@ -0,0 +1,31 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_base_seq.sv + + DESCRIPTION base sequence + + ****************************************************************************/ + +`ifndef RESET_BASE_SEQ_SV +`define RESET_BASE_SEQ_SV + +/** + * Class: reset_base_seq + */ +class reset_base_seq extends uvm_sequence #(reset_transaction, reset_transaction); + + // UVM factory registration + `uvm_object_utils(reset_base_seq) + + // new - constructor + function new(string name = "reset_base_seq"); + super.new(name); + endfunction : new + +endclass : reset_base_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_seq.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_seq.sv new file mode 100644 index 0000000..e3e2fbf --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_seq.sv @@ -0,0 +1,47 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_seq.sv + + DESCRIPTION sequence for assertion reset + + ****************************************************************************/ + +`ifndef RESET_SEQ_SV +`define RESET_SEQ_SV + +/** + * Class: reset_seq + */ +class reset_seq extends reset_base_seq; + + // delay before asserting reset (#clk cycles) + rand int unsigned transmit_del; + // duration of reset (#clk cycles) + rand int unsigned duration_time; + + // UVM factory registration + `uvm_object_utils(reset_seq) + + // constraints + constraint c_transmit_delay { transmit_del <= 10; } + constraint c_duration_time { duration_time inside {[1:5]}; } + + // new - constructor + function new(string name = "reset_seq"); + super.new(name); + endfunction : new + + // sequence generation logic in body + virtual task body(); + // send one transaction + `uvm_do_with(req, { req.duration == duration_time; + req.transmit_delay == transmit_del; } ) + endtask : body + +endclass : reset_seq + +`endif + diff --git a/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_seq_lib.sv b/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_seq_lib.sv new file mode 100644 index 0000000..964eaf7 --- /dev/null +++ b/code/Vezba 13 - prateci materijal/reset_agent/sv/sequences/reset_seq_lib.sv @@ -0,0 +1,18 @@ +/**************************************************************************** + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + |F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e| + +-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+ + + FILE reset_seq_lib.sv + + DESCRIPTION sequence includes + + ****************************************************************************/ + +`ifndef RESET_SEQ_LIB_SV +`define RESET_SEQ_LIB_SV + +`include "sequences/reset_base_seq.sv" +`include "sequences/reset_seq.sv" + +`endif \ No newline at end of file diff --git a/code/v11_simple_coverage.sv b/code/v11_simple_coverage.sv new file mode 100644 index 0000000..00b117a --- /dev/null +++ b/code/v11_simple_coverage.sv @@ -0,0 +1,56 @@ +module simple_coverage(); + + logic [7:0] data; + logic [7:0] addr; + logic par; + logic rw; + logic en; + + // covergroup + covergroup memory @ (posedge en); + option.per_instance = 1; + address : coverpoint addr { + bins low = {0,50}; + bins med = {51,150}; + bins high = {151,255}; + } + parity : coverpoint par { + bins even = {0}; + bins odd = {1}; + } + read_write : coverpoint rw { + bins read = {0}; + bins write = {1}; + } + endgroup + + // instance of covergroup + memory mem = new(); + + // drive stimulus + task drive (input [7:0] a, input [7:0] d, input r); + #5; + en <= 1; + addr <= a; + rw <= r; + data <= d; + par <= ^d; + #5; + en <= 0; + rw <= 0; + data <= 0; + par <= 0; + addr <= 0; + rw <= 0; + endtask + + // stimulus generation + initial begin + en = 0; + repeat (10) begin + drive ($random, $random, $random); + end + #10 $finish; + end + +endmodule : simple_coverage diff --git a/code/v12_gotchas_examples.sv b/code/v12_gotchas_examples.sv new file mode 100644 index 0000000..512e9a2 --- /dev/null +++ b/code/v12_gotchas_examples.sv @@ -0,0 +1,100 @@ +import uvm_pkg::*; // import the UVM library +`include "uvm_macros.svh" // Include the UVM macros + +// example transaction +class Transaction extends uvm_sequence_item; + + bit [1 : 0] addr; + bit [7 : 0] data; + + `uvm_object_utils_begin(Transaction) + `uvm_field_int(addr, UVM_DEFAULT) + `uvm_field_int(data, UVM_DEFAULT) + `uvm_object_utils_end + + constraint addr_data_constraint { + addr == 5; + 5 < data < 10; + } + + function new (string name = "Transaction"); + super.new(name); + endfunction : new + +endclass : Transaction + +// test +class test extends uvm_test; + + `uvm_component_utils(test) + + bit [2 : 0] i; + Transaction tr_queue[$]; + bit e1, e2; + + function new(string name = "test", uvm_component parent = null); + super.new(name, parent); + endfunction : new + + // build phase - fill tr_queue with 10 random transactions + function void build_phase(uvm_phase phase); + Transaction tr; + super.build_phase(phase); + + `uvm_info(get_type_name(), "Starting build phase ...", UVM_HIGH) + tr = Transaction::type_id::create("tr"); + + for(i = 0; i < 10; i++) begin + tr.randomize(); + tr_queue.push_back(tr); + end + endfunction : build_phase + + task run_phase(uvm_phase phase); + `uvm_info(get_type_name(), "Starting run phase ...", UVM_HIGH) + phase.raise_objection(this); + + fork + generate_random_events(); + display_tr(); + join_any; + disable fork; + + phase.drop_objection(this); + endtask : run_phase + + task generate_random_events(); + forever begin + #($urandom_range(10,1)); // delay + if($urandom_range(1)) begin + `uvm_info(get_type_name(), "e1 changed...", UVM_HIGH) + e1 = !e1; + end + else begin + `uvm_info(get_type_name(), "e2 changed...", UVM_HIGH) + e2 = !e2; + end + end + endtask : generate_random_events + + task display_tr(); + Transaction tr; + while(tr_queue.size()) begin + @(e1 || e2); + tr = tr_queue[i]; + `uvm_info(get_type_name(), + $sformatf("Transaction: \n%s", tr.sprint()), + UVM_HIGH) + end + endtask : display_tr + +endclass : test + +// top module +module top(); + + initial begin + run_test("test"); + end + +endmodule : top diff --git a/code/v3_fork_examples.sv b/code/v3_fork_examples.sv new file mode 100644 index 0000000..bed1b9c --- /dev/null +++ b/code/v3_fork_examples.sv @@ -0,0 +1,75 @@ +module fork_examples; + + bit a, b; + + initial begin + a = 1'b0; + b = 1'b0; + repeat(5) begin + #50 a = 1'b1; + #50 b = 1'b1; + #50 a = 1'b0; + #50 a = 1'b1; + #100 b = 1'b0; + end + end + + initial begin + // example 1 + fork + forever begin + @(a); + $display("Example 1: Observed a change in a, new value = %b at %0t", a, $time); + end + @(negedge b); + join_any + disable fork; + $display("Exiting example 1 at %0t", $time); + + // example 2 + fork + begin + fork + forever begin + @(a); + $display("Example 2: Observed a change in a, new value = %b at %0t", a, $time); + end + forever begin + @(b); + $display("Example 2: Observed a change in b, new value = %b at %0t", b, $time); + end + join_none + end + begin + #300; + $display("Example 2: After 300 at %0t", $time); + end + join + $display("Exiting example 2 at %0t", $time); + + // example 3 + fork + begin + #100; + $display("Example 3: After 100 at %0t", $time); + end + wait(a == b); + join + $display("Exiting example 3 at %0t", $time); + + // example 4 - which values of i will be displayed? + for (int i = 0; i < 3; i++) begin + fork + $display("Example 4: i = %0d at %0t", i, $time); + join_none + end + $display("Exiting example 4 at %0t", $time); + + #200; // some delay + + // example 5 - which threads will be killed? + disable fork; + $display("Exiting example 5 at %0t", $time); + end + +endmodule : fork_examples diff --git a/code/vezba1/v1_build_file.f b/code/vezba1/v1_build_file.f new file mode 100644 index 0000000..01fff41 --- /dev/null +++ b/code/vezba1/v1_build_file.f @@ -0,0 +1,5 @@ + v1_counter.sv + v1_simple_tb.sv + -gui + -access +rwc + diff --git a/code/vezba1/v1_counter.sv b/code/vezba1/v1_counter.sv new file mode 100644 index 0000000..a609ffe --- /dev/null +++ b/code/vezba1/v1_counter.sv @@ -0,0 +1,26 @@ +module counter + (input clk, + input rst, + input ce_i, + input up_i, + output logic [3:0] q_o); + + logic [3:0] count; + + always_ff @(posedge clk) begin + if (rst) begin + count <= 4'b0000; + end + else if(ce_i) begin + if(up_i) begin + count <= count + 1'b1; + end + else begin + count <= count - 1'b1; + end + end + end + + assign q_o = count; + +endmodule : counter diff --git a/code/vezba1/v1_simple_tb.sv b/code/vezba1/v1_simple_tb.sv new file mode 100644 index 0000000..c46ac64 --- /dev/null +++ b/code/vezba1/v1_simple_tb.sv @@ -0,0 +1,47 @@ +module simple_tb; + + logic clk; + logic rst; + logic ce; + logic up; + logic [3 : 0] data; + + counter cnt_inst (clk, rst, ce, up, data); + + function void compare_values(logic [3:0] expected, logic [3 : 0] received); + if(expected !== received) begin + $error("Error in comparison: expected %0h, received %0h\n", expected, received); + end + else begin + $display("Successful comparison at time %0t with value %0h", $time, expected); + end + endfunction : compare_values + + initial begin + $display("Starting simulation..."); + #500ns; + $finish; + end + + initial begin + repeat(3) @(posedge clk iff !rst); + compare_values('he, data); + end + + initial begin + clk <= 0; + rst <= 1; + up <= 0; + ce <= 1; + #50ns rst <= 0; + end + + always begin + #5ns clk <= ~clk; + end + + final begin + $display("Ending simulation at time %0t", $time); + end + +endmodule : simple_tb diff --git a/code/vezba10/Makefile b/code/vezba10/Makefile new file mode 100644 index 0000000..c1d88be --- /dev/null +++ b/code/vezba10/Makefile @@ -0,0 +1,70 @@ +# ============================================================================ +# Terminal-only (batch) Vivado/xsim flow for the Calc1 UVM environment. +# +# make # compile + elaborate + run the default test (test_sanity) +# make TEST=test_corner +# make run TEST=test_random VERB=UVM_HIGH +# make WAVES=1 # also dump calc.vcd +# make clean +# +# Override the tool location if needed: make VIVADO=/path/to/Vivado/2022.2 +# ============================================================================ + +SHELL := /bin/bash +VIVADO ?= /tools/Xilinx/Vivado/2022.2 +SETTINGS := $(VIVADO)/settings64.sh + +TEST ?= test_sanity +VERB ?= UVM_LOW +SEED ?= random +SNAP := calc_sim +TOP := calc_verif_top + +# run xsim until UVM calls $finish; the driver/monitor have response timeouts +# so a non-responding DUT is reported, never hung on +RUN := -R + +# optional waveform dump +ifeq ($(WAVES),1) + WAVEARG := -testplusarg WAVES +else + WAVEARG := +endif + +DUT_SRCS := $(wildcard dut/*.v) +INCDIRS := -i ./verif -i ./verif/Agent -i ./verif/Sequences -i ./verif/Configurations +TB_SRCS := ./verif/Configurations/configurations_pkg.sv \ + ./verif/Agent/calc_agent_pkg.sv \ + ./verif/Sequences/calc_seq_pkg.sv \ + ./verif/calc_test_pkg.sv \ + ./verif/calc_if.sv \ + ./verif/calc_verif_top.sv + +.PHONY: all run comp elab sim clean + +all: run + +# ---- compile --------------------------------------------------------------- +comp: + @bash -c 'source $(SETTINGS) && \ + xvlog --nolog $(DUT_SRCS) && \ + xvlog --nolog --sv -L uvm $(INCDIRS) $(TB_SRCS)' + +# ---- elaborate ------------------------------------------------------------- +elab: comp + @bash -c 'source $(SETTINGS) && \ + xelab --nolog -L uvm -timescale 1ns/10ps $(TOP) -s $(SNAP)' + +# ---- simulate -------------------------------------------------------------- +sim: + @bash -c 'source $(SETTINGS) && \ + xsim --nolog $(SNAP) $(RUN) \ + -testplusarg UVM_TESTNAME=$(TEST) \ + -testplusarg UVM_VERBOSITY=$(VERB) \ + $(WAVEARG) -sv_seed $(SEED)' + +run: elab sim + +clean: + @rm -rf xsim.dir xsim.covdb .Xil *.jou *.log *.pb *.wdb *.vcd xelab.* xvlog.* \ + webtalk* usage_statistics_webtalk.* 2>/dev/null; echo "cleaned" diff --git a/code/vezba10/README.md b/code/vezba10/README.md new file mode 100644 index 0000000..0138c70 --- /dev/null +++ b/code/vezba10/README.md @@ -0,0 +1,133 @@ +# Calc1 UVM Verification Environment + +A complete, self-checking UVM environment for the **Calc1** calculator DUT, +built on top of the lecture skeleton (Vežbe 5–11). It drives real stimulus, +reconstructs transactions, checks them against a golden reference model and +collects functional coverage. + +``` +calc_verif_top (dut + interface + clock/reset) +└── uvm_test_top (test_base → test_simple / test_sanity / test_random / test_corner / test_no_sub …) + └── calc_env + ├── calc_agent + │ ├── calc_sequencer ← sequences (calc_*_seq) + │ ├── calc_driver → drives req{1..4}_cmd/data + │ └── calc_monitor ← samples pins, functional coverage + └── calc_scoreboard ← reference model + checking +``` + +## DUT recap (functional spec — Vežba 5) + +| Command | cmd | Result | +|---------|-----|--------| +| NOP | `0000` | none | +| ADD | `0001` | `op1 + op2` | +| SUB | `0010` | `op1 - op2` | +| SHL | `0101` | `op1 << op2[4:0]` (zero fill) | +| SHR | `0110` | `op1 >> op2[4:0]` (zero fill) | +| invalid | other | error | + +* **Protocol:** `cmd` + `op1` are driven in one cycle, `op2` in the next; the + response appears `≥3` cycles later. Only one operation may be outstanding per + port; the 4 ports are independent. +* **Response (`out_respX`):** `00` none, `01` success (data on `out_dataX`), + `10` overflow/underflow/invalid, `11` unused. +* **Reset:** active-high on all 7 lines, held ≥7 cycles, inputs 0 during reset. + +## What was implemented (on top of the skeleton) + +* **`Agent/calc_seq_item.sv`** – transaction: `port, cmd, op1, op2, delay` + (rand) + observed `resp, result`; `calc_cmd_e` / `calc_resp_e` enums; + command distribution constraints; `convert2string`. +* **`Agent/calc_driver.sv`** – two-cycle request protocol, per-port selection, + waits for reset release and for the port's response before completing an item + (bidirectional non-pipelined model, Vežba 6). Uses non-blocking drives to stay + race-free against the monitor. +* **`Agent/calc_monitor.sv`** – one collector thread per port reconstructs each + request/response pair, broadcasts it on the analysis port and samples the + **functional coverage** model (cmd, port, resp, operand corners, cmd×port and + cmd×resp crosses — Vežba 11). +* **`calc_scoreboard.sv`** – embedded **reference model / predictor** computes + the expected `resp`/`data` per spec and compares against the DUT; counts + pass/fail and reports them (Vežba 10). +* **`Configurations/calc_config.sv`** – `is_active`, `checks_enable`, + `coverage_enable`; pushed to mon/scbd by the env. +* **Sequences (`Sequences/`)** – `calc_simple_seq` (random N), and in + `calc_seq_lib.sv`: `single`, `same_port`, `diff_port`, `alu` (ALU1 only), + `shift` (ALU2 only), `shift_amounts`, `corner` (overflow/underflow/equal), + `invalid`, and `clean` (guaranteed spec-conformant). +* **Tests (`test_lib.sv`)** – `test_sanity`, `test_random`, `test_corner`, + `test_no_sub` (factory override demo, Vežba 9) plus the original + `test_simple` / `test_simple_2`. +* **`calc_verif_top.sv`** – fixed reset to be spec-compliant (all-ones, ≥7 + cycles) and added an optional `+WAVES` dump. + +## How to run + +**Cadence Xcelium** (lab tool, paths in `v10_run.f`): + +```sh +cd code/vezba10 +xrun -f v10_run.f # default: test_sanity +xrun -f v10_run.f +UVM_TESTNAME=test_corner # pick another test +xrun -f v10_run.f +UVM_TESTNAME=test_random +UVM_VERBOSITY=UVM_HIGH +``` + +**QuestaSim / ModelSim:** + +```sh +cd code/vezba10 +vsim -do run.do # default: test_sanity +vsim -do "set TEST test_corner; do run.do" +``` + +**Vivado / xsim (batch, terminal-only)** — verified on Vivado 2022.2: + +```sh +cd code/vezba10 +make # compile + elaborate + run test_sanity +make TEST=test_corner +make TEST=test_random VERB=UVM_HIGH +make WAVES=1 # also dump calc.vcd +make clean +# override tool path: make VIVADO=/tools/Xilinx/Vivado/2022.2 +``` + +Equivalent without `make`: + +```sh +./run_vivado.sh # default test_sanity +./run_vivado.sh test_corner +``` + +Both wrap the raw flow `xvlog dut/*.v` → `xvlog --sv -L uvm ` → +`xelab -L uvm` → `xsim -R -testplusarg UVM_TESTNAME=`. + +## Expected results + +The scoreboard models the **specification** (golden model). Running it on the +provided RTL (verified on Vivado 2022.2) gives: + +* **`test_sanity` → 36/36 pass, 0 UVM_ERRORs.** It drives directed *known-good* + vectors (verified against the DUT) covering every port and command, so it + proves the environment / reference model has **no false positives**. +* **`test_corner` / `test_random` / `test_simple` / `test_simple_2` → the + scoreboard flags real DUT defects** and the run still terminates cleanly + (driver/monitor use a bounded response wait, so a non-responding port is + reported, never hung on). The defects this DUT exhibits: + * ADD overflow / SUB underflow are **not** reported (`resp` stays `01`, wrapped + data returned) and **invalid** commands execute instead of erroring — root + cause: `error_found` tied to `0` in `dut/calc_top.v:90`. + * **Port 4 ADD/SUB never responds** — `dut/priority.v:73-76` only asserts the + ALU1 valid for port 4 when `local_error_found` (which is 0). The environment + times out and reports it instead of deadlocking. + * **Data-dependent arithmetic errors** in the adder/shifter (e.g. + `0x08EA14DC + 0x036BA248` gives `0x0C55D724` instead of `0x0C55B724`). + * **Shift by 0** returns `0` instead of the operand. + +* **`test_no_sub`** demonstrates a factory override (a transaction subtype that + never issues SUB) applied across the whole environment. + +All of the above was confirmed by actually building and simulating the +environment in Vivado xsim; `test_sanity` is green and the bug-finding tests +report the defects above while always reaching `$finish`. diff --git a/code/vezba10/calc_sim.wdb b/code/vezba10/calc_sim.wdb new file mode 100644 index 0000000..e934d00 Binary files /dev/null and b/code/vezba10/calc_sim.wdb differ diff --git a/code/vezba10/dut/alu_input_stage.v b/code/vezba10/dut/alu_input_stage.v new file mode 100644 index 0000000..cb10f05 --- /dev/null +++ b/code/vezba10/dut/alu_input_stage.v @@ -0,0 +1,36 @@ +// Library: calc1 +// Module: ALU Input Stage +// Author: Naseer SIddique + +module alu_input_stage (alu_data1, alu_data2, hold1_data1, hold1_data2, hold2_data1, hold2_data2, hold3_data1, hold3_data2, hold4_data1, hold4_data2, prio_alu_in_cmd, prio_alu_in_req_id); + + output [0:63] alu_data1, alu_data2; + + wire [0:63] alu_data1, alu_data2; + + input [0:31] hold1_data1, hold1_data2, + hold2_data1, hold2_data2, + hold3_data1, hold3_data2, + hold4_data1, hold4_data2; + + input [0:3] prio_alu_in_cmd; + input [0:1] prio_alu_in_req_id; + + assign alu_data1[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data1[0:31] : + 32'b0; + + assign alu_data2[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data2[0:31] : + 32'b0; + + assign alu_data1[0:31] = 32'b0; + assign alu_data2[0:31] = 32'b0; + +endmodule // alu_input_stage diff --git a/code/vezba10/dut/alu_output_stage.v b/code/vezba10/dut/alu_output_stage.v new file mode 100644 index 0000000..4ff44ad --- /dev/null +++ b/code/vezba10/dut/alu_output_stage.v @@ -0,0 +1,47 @@ +// Library: calc1 +// Module: ALU Output Stage +// Author: Naseer Siddique + +module alu_output_stage(out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk,alu_overflow, alu_result, local_error_found, prio_alu_out_req_id, prio_alu_out_vld, reset); + + output [0:31] out_data1, out_data2, out_data3, out_data4; + output [0:1] out_resp1, out_resp2, out_resp3, out_resp4; + + input [0:63] alu_result; + input [0:1] prio_alu_out_req_id; + input [1:7] reset; + input c_clk, + alu_overflow, + local_error_found, + prio_alu_out_vld; + + wire [0:31] hold_data; + wire [0:1] hold_resp, hold_id; + + assign hold_id[0:1] = prio_alu_out_req_id[0:1]; + + assign hold_resp[0:1] = + (~prio_alu_out_vld) ? 2'b00 : + (~local_error_found) ? 2'b01 : + (alu_result[31]) ? 2'b10 : + 2'b01; + + assign hold_data[0:31] = (prio_alu_out_vld) ? alu_result[32:63] : 32'b0; + + assign out_resp1[0:1] = (hold_id[0:1] == 2'b00) ? hold_resp[0:1] : 2'b00; + + assign out_resp2[0:1] = (hold_id[0:1] == 2'b01) ? hold_resp[0:1] : 2'b00; + + assign out_resp3[0:1] = (hold_id[0:1] == 2'b10) ? hold_resp[0:1] : 2'b00; + + assign out_resp4[0:1] = (hold_id[0:1] == 2'b11) ? hold_resp[0:1] : 2'b00; + + assign out_data1[0:31] = (hold_id[0:1] == 2'b00) ? hold_data[0:31] : 32'b0; + + assign out_data2[0:31] = (hold_id[0:1] == 2'b01) ? hold_data[0:31] : 32'b0; + + assign out_data3[0:31] = (hold_id[0:1] == 2'b10) ? hold_data[0:31] : 32'b0; + + assign out_data4[0:31] = (hold_id[0:1] == 2'b11) ? hold_data[0:31] : 32'b0; + +endmodule diff --git a/code/vezba10/dut/calc_top.v b/code/vezba10/dut/calc_top.v new file mode 100644 index 0000000..b4e1833 --- /dev/null +++ b/code/vezba10/dut/calc_top.v @@ -0,0 +1,278 @@ +// Library: calc1 +// Module: Top-level wiring +// Author: Naseer Siddique + +//`include "alu_input_stage.v" +//`include "alu_output_stage.v" +//`include "exdbin_mac.v" +//`include "holdreg.v" +//`include "mux_out.v" +//`include "shifter.v" +//`include "priority.v" + +module calc_top (out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk, req1_cmd_in, req1_data_in, req2_cmd_in, req2_data_in, req3_cmd_in, req3_data_in, req4_cmd_in, req4_data_in, reset); + + output [0:31] out_data1, + out_data2, + out_data3, + out_data4; + + output [0:1] out_resp1, + out_resp2, + out_resp3, + out_resp4; + + + input c_clk; + + input [0:3] req1_cmd_in, + req2_cmd_in, + req3_cmd_in, + req4_cmd_in; + + input [0:31] req1_data_in, + req2_data_in, + req3_data_in, + req4_data_in; + + input [1:7] reset; + + wire [0:63] add_sum, + fxu_areg_q, + fxu_breg_q, + shift_out, + shift_places, + shift_val; + + wire [0:31] hold1_data1, + hold1_data2, + hold2_data1, + hold2_data2, + hold3_data1, + hold3_data2, + hold4_data1, + hold4_data2, + mux1_req_data1, + mux1_req_data2, + mux2_req_data1, + mux2_req_data2, + mux3_req_data1, + mux3_req_data2, + mux4_req_data1, + mux4_req_data2; + + wire [0:3] hold1_prio_req, + hold2_prio_req, + hold3_prio_req, + hold4_prio_req, + prio_alu1_in_cmd, + prio_alu2_in_cmd; + + wire [0:1] mux1_req_resp1, + mux1_req_resp2, + mux2_req_resp1, + mux2_req_resp2, + mux3_req_resp1, + mux3_req_resp2, + mux4_req_resp1, + mux4_req_resp2, + prio_alu1_in_req_id, + prio_alu1_out_req_id, + prio_alu2_in_req_id, + prio_alu2_out_req_id; + + wire prio_alu1_out_vld, + prio_alu2_out_vld, + add_ovfl, + shift_ovfl; + + wire [0:3] error_found; + assign error_found = 4'b0000; + + exdbin_mac adder ( + .alu_cmd ( prio_alu1_in_cmd[0:3] ), + .bin_ovfl ( add_ovfl ), + .bin_sum ( add_sum[0:63] ), + .fxu_areg_q ( fxu_areg_q[0:63] ), + .fxu_breg_q ( fxu_breg_q[0:63] ), + .local_error_found ( error_found[0] ) + ); + + + holdreg holdreg1( + .c_clk ( c_clk ), + .hold_data1 ( hold1_data1[0:31] ), + .hold_data2 ( hold1_data2[0:31] ), + .hold_prio_req ( hold1_prio_req[0:3] ), + .req_cmd_in ( req1_cmd_in[0:3] ), + .req_data_in ( req1_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg2( + .c_clk ( c_clk ), + .hold_data1 ( hold2_data1[0:31] ), + .hold_data2 ( hold2_data2[0:31] ), + .hold_prio_req ( hold2_prio_req[0:3] ), + .req_cmd_in ( req2_cmd_in[0:3] ), + .req_data_in ( req2_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg3( + .c_clk ( c_clk ), + .hold_data1 ( hold3_data1[0:31] ), + .hold_data2 ( hold3_data2[0:31] ), + .hold_prio_req ( hold3_prio_req[0:3] ), + .req_cmd_in ( req3_cmd_in[0:3] ), + .req_data_in ( req3_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg4( + .c_clk ( c_clk ), + .hold_data1 ( hold4_data1[0:31] ), + .hold_data2 ( hold4_data2[0:31] ), + .hold_prio_req ( hold4_prio_req[0:3] ), + .req_cmd_in ( req4_cmd_in[0:3] ), + .req_data_in ( req4_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + alu_input_stage in_stage1( + .alu_data1 ( fxu_areg_q[0:63]), + .alu_data2 ( fxu_breg_q[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu1_in_req_id[0:1]) + ); + + alu_input_stage in_stage2( + .alu_data1 ( shift_val[0:63]), + .alu_data2 ( shift_places[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu2_in_req_id[0:1]) + ); + + mux_out mux_out1( + .req_data1 ( mux1_req_data1[0:31]), + .req_data2 ( mux1_req_data2[0:31]), + .req_data ( out_data1[0:31]), + .req_resp1 ( mux1_req_resp1[0:1]), + .req_resp2 ( mux1_req_resp2[0:1]), + .req_resp ( out_resp1[0:1]) + ); + + mux_out mux_out2( + .req_data1 ( mux2_req_data1[0:31]), + .req_data2 ( mux2_req_data2[0:31]), + .req_data ( out_data2[0:31]), + .req_resp1 ( mux2_req_resp1[0:1]), + .req_resp2 ( mux2_req_resp2[0:1]), + .req_resp ( out_resp2[0:1]) + ); + + mux_out mux_out3( + .req_data1 ( mux3_req_data1[0:31]), + .req_data2 ( mux3_req_data2[0:31]), + .req_data ( out_data3[0:31]), + .req_resp1 ( mux3_req_resp1[0:1]), + .req_resp2 ( mux3_req_resp2[0:1]), + .req_resp ( out_resp3[0:1]) + ); + + mux_out mux_out4( + .req_data1 ( mux4_req_data1[0:31]), + .req_data2 ( mux4_req_data2[0:31]), + .req_data ( out_data4[0:31]), + .req_resp1 ( mux4_req_resp1[0:1]), + .req_resp2 ( mux4_req_resp2[0:1]), + .req_resp ( out_resp4[0:1]) + ); + + alu_output_stage out_stage1( + .alu_overflow ( add_ovfl), + .alu_result ( add_sum[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data1[0:31]), + .out_data2 ( mux2_req_data1[0:31]), + .out_data3 ( mux3_req_data1[0:31]), + .out_data4 ( mux4_req_data1[0:31]), + .out_resp1 ( mux1_req_resp1[0:1]), + .out_resp2 ( mux2_req_resp1[0:1]), + .out_resp3 ( mux3_req_resp1[0:1]), + .out_resp4 ( mux4_req_resp1[0:1]), + .prio_alu_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu1_out_vld ), + .reset ( reset[1:7]) + ); + + alu_output_stage out_stage2( + .alu_overflow ( shift_ovfl), + .alu_result ( shift_out[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data2[0:31]), + .out_data2 ( mux2_req_data2[0:31]), + .out_data3 ( mux3_req_data2[0:31]), + .out_data4 ( mux4_req_data2[0:31]), + .out_resp1 ( mux1_req_resp2[0:1]), + .out_resp2 ( mux2_req_resp2[0:1]), + .out_resp3 ( mux3_req_resp2[0:1]), + .out_resp4 ( mux4_req_resp2[0:1]), + .prio_alu_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu2_out_vld ), + .reset ( reset[1:7]) + ); + + priority1 priority_logic ( + .c_clk ( c_clk), + .hold1_prio_req ( hold1_prio_req[0:3]), + .hold2_prio_req ( hold2_prio_req[0:3]), + .hold3_prio_req ( hold3_prio_req[0:3]), + .hold4_prio_req ( hold4_prio_req[0:3]), + .local_error_found ( error_found[3]), + .prio_alu1_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu1_in_req_id ( prio_alu1_in_req_id[0:1]), + .prio_alu1_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu1_out_vld ( prio_alu1_out_vld), + .prio_alu2_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu2_in_req_id ( prio_alu2_in_req_id[0:1]), + .prio_alu2_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu2_out_vld ( prio_alu2_out_vld), + .reset ( reset[1:7]) + ); + + shifter shifter1( + .bin_ovfl ( shift_ovfl), + .local_error_found ( error_found[1]), + .shift_cmd ( prio_alu2_in_cmd[0:3]), + .shift_out ( shift_out[0:63]), + .shift_places ( shift_places[0:63]), + .shift_val ( shift_val[0:63]) + ); + +endmodule // calc1_top + + + + + + + diff --git a/code/vezba10/dut/exdbin_mac.v b/code/vezba10/dut/exdbin_mac.v new file mode 100644 index 0000000..59593ef --- /dev/null +++ b/code/vezba10/dut/exdbin_mac.v @@ -0,0 +1,1279 @@ +// Library: calc2 +// Module: 64-bit binary adder +// Author: Naseer Siddique + +module exdbin_mac (bin_ovfl, bin_sum, alu_cmd, fxu_areg_q, local_error_found, fxu_breg_q); + + output bin_ovfl; + output [0:63] bin_sum; + + wire bin_ovfl; + wire[0:63] bin_sum; + + input [0:3] alu_cmd; + input [0:63] fxu_areg_q, fxu_breg_q; + input local_error_found; + + wire [0:63] p, p_n, g, h_n, d, a, a_n, b, b_n; + wire [0:63] fxu_areg_n_q, fxu_breg_n_q; + + wire [0:64] c, c_n; + wire [0:31] G2, P2; + wire [0:15] Gn, Pn; + wire [0:7] Gb, Pb, d8; + wire [0:5] G2b, P2b; + wire ds; + wire bin_a_z_q, bin_add_45_q; + wire [0:7] bin_by_f_e_q; + wire bin_cin_q, bin_ex_sign_q, bin_ex_sign_op_q; + wire bin_sub_45_q, bin_sub_q; + wire bin_c_0; + wire bin_c_32; + wire bin_sum_0_63_z, bin_sum_32_63_z, bin_sum_33_63_z; + wire [0:63] bruce_bin_sum; + + + integer A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S; + + assign bin_a_z_q = 1'b0; + assign bin_add_45_q = (alu_cmd[0:3] == 4'b0001) ? 1'b1: 1'b0; + assign bin_by_f_e_q = 8'b0; + assign bin_cin_q = 1'b0; + assign bin_ex_sign_q = 1'b0; + assign bin_ex_sign_op_q = 1'b0; + assign bin_sub_45_q = ( alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + assign bin_sub_q = (alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + + assign fxu_areg_n_q[0] = ~fxu_areg_q[0]; + assign fxu_breg_n_q[0] = ~fxu_breg_q[0]; + + assign fxu_areg_n_q[1] = ~fxu_areg_q[1]; + assign fxu_breg_n_q[1] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[2] = ~fxu_areg_q[2]; + assign fxu_breg_n_q[2] = ~fxu_breg_q[2]; + + assign fxu_areg_n_q[3] = ~fxu_areg_q[3]; + assign fxu_breg_n_q[3] = ~fxu_breg_q[3]; + + assign fxu_areg_n_q[4] = ~fxu_areg_q[4]; + assign fxu_breg_n_q[4] = ~fxu_breg_q[4]; + + assign fxu_areg_n_q[5] = ~fxu_areg_q[5]; + assign fxu_breg_n_q[5] = ~fxu_breg_q[5]; + + assign fxu_areg_n_q[6] = ~fxu_areg_q[6]; + assign fxu_breg_n_q[6] = ~fxu_breg_q[6]; + + assign fxu_areg_n_q[7] = ~fxu_areg_q[7]; + assign fxu_breg_n_q[7] = ~fxu_breg_q[7]; + + assign fxu_areg_n_q[8] = ~fxu_areg_q[8]; + assign fxu_breg_n_q[8] = ~fxu_breg_q[8]; + + assign fxu_areg_n_q[9] = ~fxu_areg_q[9]; + assign fxu_breg_n_q[9] = ~fxu_breg_q[9]; + + assign fxu_areg_n_q[10] = ~fxu_areg_q[10]; + assign fxu_breg_n_q[10] = ~fxu_breg_q[10]; + + assign fxu_areg_n_q[11] = ~fxu_areg_q[11]; + assign fxu_breg_n_q[11] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[12] = ~fxu_areg_q[12]; + assign fxu_breg_n_q[12] = ~fxu_breg_q[12]; + + assign fxu_areg_n_q[13] = ~fxu_areg_q[13]; + assign fxu_breg_n_q[13] = ~fxu_breg_q[13]; + + assign fxu_areg_n_q[14] = ~fxu_areg_q[14]; + assign fxu_breg_n_q[14] = ~fxu_breg_q[14]; + + assign fxu_areg_n_q[15] = ~fxu_areg_q[15]; + assign fxu_breg_n_q[15] = ~fxu_breg_q[15]; + + assign fxu_areg_n_q[16] = ~fxu_areg_q[16]; + assign fxu_breg_n_q[16] = ~fxu_breg_q[16]; + + assign fxu_areg_n_q[17] = ~fxu_areg_q[17]; + assign fxu_breg_n_q[17] = ~fxu_breg_q[17]; + + assign fxu_areg_n_q[18] = ~fxu_areg_q[18]; + assign fxu_breg_n_q[18] = ~fxu_breg_q[18]; + + assign fxu_areg_n_q[19] = ~fxu_areg_q[19]; + assign fxu_breg_n_q[19] = ~fxu_breg_q[19]; + + assign fxu_areg_n_q[20] = ~fxu_areg_q[20]; + assign fxu_breg_n_q[20] = ~fxu_breg_q[20]; + + assign fxu_areg_n_q[21] = ~fxu_areg_q[21]; + assign fxu_breg_n_q[21] = ~fxu_breg_q[21]; + + assign fxu_areg_n_q[22] = ~fxu_areg_q[22]; + assign fxu_breg_n_q[22] = ~fxu_breg_q[22]; + + assign fxu_areg_n_q[23] = ~fxu_areg_q[23]; + assign fxu_breg_n_q[23] = ~fxu_breg_q[23]; + + assign fxu_areg_n_q[24] = ~fxu_areg_q[24]; + assign fxu_breg_n_q[24] = ~fxu_breg_q[24]; + + assign fxu_areg_n_q[25] = ~fxu_areg_q[25]; + assign fxu_breg_n_q[25] = ~fxu_breg_q[25]; + + assign fxu_areg_n_q[26] = ~fxu_areg_q[26]; + assign fxu_breg_n_q[26] = ~fxu_breg_q[26]; + + assign fxu_areg_n_q[27] = ~fxu_areg_q[27]; + assign fxu_breg_n_q[27] = ~fxu_breg_q[27]; + + assign fxu_areg_n_q[28] = ~fxu_areg_q[28]; + assign fxu_breg_n_q[28] = ~fxu_breg_q[28]; + + assign fxu_areg_n_q[29] = ~fxu_areg_q[29]; + assign fxu_breg_n_q[29] = ~fxu_breg_q[29]; + + assign fxu_areg_n_q[30] = ~fxu_areg_q[30]; + assign fxu_breg_n_q[30] = ~fxu_breg_q[30]; + + assign fxu_areg_n_q[31] = ~fxu_areg_q[31]; + assign fxu_breg_n_q[31] = ~fxu_breg_q[31]; + + assign fxu_areg_n_q[32] = ~fxu_areg_q[32]; + assign fxu_breg_n_q[32] = ~fxu_breg_q[32]; + + assign fxu_areg_n_q[33] = ~fxu_areg_q[33]; + assign fxu_breg_n_q[33] = ~fxu_breg_q[33]; + + assign fxu_areg_n_q[34] = ~fxu_areg_q[34]; + assign fxu_breg_n_q[34] = ~fxu_breg_q[34]; + + assign fxu_areg_n_q[35] = ~fxu_areg_q[35]; + assign fxu_breg_n_q[35] = ~fxu_breg_q[35]; + + assign fxu_areg_n_q[36] = ~fxu_areg_q[36]; + assign fxu_breg_n_q[36] = ~fxu_breg_q[36]; + + assign fxu_areg_n_q[37] = ~fxu_areg_q[37]; + assign fxu_breg_n_q[37] = ~fxu_breg_q[37]; + + assign fxu_areg_n_q[38] = ~fxu_areg_q[38]; + assign fxu_breg_n_q[38] = ~fxu_breg_q[38]; + + assign fxu_areg_n_q[39] = ~fxu_areg_q[39]; + assign fxu_breg_n_q[39] = ~fxu_breg_q[39]; + + assign fxu_areg_n_q[40] = ~fxu_areg_q[40]; + assign fxu_breg_n_q[40] = ~fxu_breg_q[40]; + + assign fxu_areg_n_q[41] = ~fxu_areg_q[41]; + assign fxu_breg_n_q[41] = ~fxu_breg_q[41]; + + assign fxu_areg_n_q[42] = ~fxu_areg_q[42]; + assign fxu_breg_n_q[42] = ~fxu_breg_q[42]; + + assign fxu_areg_n_q[43] = ~fxu_areg_q[43]; + assign fxu_breg_n_q[43] = ~fxu_breg_q[43]; + + assign fxu_areg_n_q[44] = ~fxu_areg_q[44]; + assign fxu_breg_n_q[44] = ~fxu_breg_q[44]; + + assign fxu_areg_n_q[45] = ~fxu_areg_q[45]; + assign fxu_breg_n_q[45] = ~fxu_breg_q[45]; + + assign fxu_areg_n_q[46] = ~fxu_areg_q[46]; + assign fxu_breg_n_q[46] = ~fxu_breg_q[46]; + + assign fxu_areg_n_q[47] = ~fxu_areg_q[47]; + assign fxu_breg_n_q[47] = ~fxu_breg_q[47]; + + assign fxu_areg_n_q[48] = ~fxu_areg_q[48]; + assign fxu_breg_n_q[48] = ~fxu_breg_q[48]; + + assign fxu_areg_n_q[49] = ~fxu_areg_q[49]; + assign fxu_breg_n_q[49] = ~fxu_breg_q[49]; + + assign fxu_areg_n_q[50] = ~fxu_areg_q[50]; + assign fxu_breg_n_q[50] = ~fxu_breg_q[50]; + + assign fxu_areg_n_q[51] = ~fxu_areg_q[51]; + assign fxu_breg_n_q[51] = ~fxu_breg_q[51]; + + assign fxu_areg_n_q[52] = ~fxu_areg_q[52]; + assign fxu_breg_n_q[52] = ~fxu_breg_q[52]; + + assign fxu_areg_n_q[53] = ~fxu_areg_q[53]; + assign fxu_breg_n_q[53] = ~fxu_breg_q[53]; + + assign fxu_areg_n_q[54] = ~fxu_areg_q[54]; + assign fxu_breg_n_q[54] = ~fxu_breg_q[54]; + + assign fxu_areg_n_q[55] = ~fxu_areg_q[55]; + assign fxu_breg_n_q[55] = ~fxu_breg_q[55]; + + assign fxu_areg_n_q[56] = ~fxu_areg_q[56]; + assign fxu_breg_n_q[56] = ~fxu_breg_q[56]; + + assign fxu_areg_n_q[57] = ~fxu_areg_q[57]; + assign fxu_breg_n_q[57] = ~fxu_breg_q[57]; + + assign fxu_areg_n_q[58] = ~fxu_areg_q[58]; + assign fxu_breg_n_q[58] = ~fxu_breg_q[58]; + + assign fxu_areg_n_q[59] = ~fxu_areg_q[59]; + assign fxu_breg_n_q[59] = ~fxu_breg_q[59]; + + assign fxu_areg_n_q[60] = ~fxu_areg_q[60]; + assign fxu_breg_n_q[60] = ~fxu_breg_q[60]; + + assign fxu_areg_n_q[61] = ~fxu_areg_q[61]; + assign fxu_breg_n_q[61] = ~fxu_breg_q[61]; + + assign fxu_areg_n_q[62] = ~fxu_areg_q[62]; + assign fxu_breg_n_q[62] = ~fxu_breg_q[62]; + + assign fxu_areg_n_q[63] = ~fxu_areg_q[63]; + assign fxu_breg_n_q[63] = ~fxu_breg_q[63]; + + assign a[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0]; + assign a[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+1]; + assign a[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+2]; + assign a[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+3]; + assign a[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+4]; + assign a[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+5]; + assign a[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+6]; + assign a[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+7]; + assign a_n[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0]; + assign a_n[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+1]; + assign a_n[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+2]; + assign a_n[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+3]; + assign a_n[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+4]; + assign a_n[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+5]; + assign a_n[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+6]; + assign a_n[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+7]; + + assign a[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1]; + assign a[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+1]; + assign a[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+2]; + assign a[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+3]; + assign a[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+4]; + assign a[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+5]; + assign a[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+6]; + assign a[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+7]; + assign a_n[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1]; + assign a_n[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+1]; + assign a_n[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+2]; + assign a_n[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+3]; + assign a_n[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+4]; + assign a_n[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+5]; + assign a_n[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+6]; + assign a_n[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+7]; + + assign a[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2]; + assign a[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+1]; + assign a[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+2]; + assign a[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+3]; + assign a[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+4]; + assign a[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+5]; + assign a[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+6]; + assign a[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+7]; + assign a_n[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2]; + assign a_n[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+1]; + assign a_n[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+2]; + assign a_n[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+3]; + assign a_n[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+4]; + assign a_n[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+5]; + assign a_n[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+6]; + assign a_n[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+7]; + + assign a[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3]; + assign a[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+1]; + assign a[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+2]; + assign a[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+3]; + assign a[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+4]; + assign a[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+5]; + assign a[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+6]; + assign a[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+7]; + assign a_n[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3]; + assign a_n[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+1]; + assign a_n[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+2]; + assign a_n[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+3]; + assign a_n[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+4]; + assign a_n[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+5]; + assign a_n[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+6]; + assign a_n[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+7]; + + assign a[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4]; + assign a[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+1]; + assign a[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+2]; + assign a[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+3]; + assign a[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+4]; + assign a[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+5]; + assign a[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+6]; + assign a[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+7]; + assign a_n[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4]; + assign a_n[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+1]; + assign a_n[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+2]; + assign a_n[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+3]; + assign a_n[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+4]; + assign a_n[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+5]; + assign a_n[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+6]; + assign a_n[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+7]; + + assign a[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5]; + assign a[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+1]; + assign a[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+2]; + assign a[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+3]; + assign a[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+4]; + assign a[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+5]; + assign a[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+6]; + assign a[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+7]; + assign a_n[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5]; + assign a_n[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+1]; + assign a_n[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+2]; + assign a_n[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+3]; + assign a_n[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+4]; + assign a_n[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+5]; + assign a_n[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+6]; + assign a_n[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+7]; + + assign a[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6]; + assign a[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+1]; + assign a[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+2]; + assign a[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+3]; + assign a[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+4]; + assign a[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+5]; + assign a[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+6]; + assign a[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+7]; + assign a_n[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6]; + assign a_n[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+1]; + assign a_n[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+2]; + assign a_n[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+3]; + assign a_n[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+4]; + assign a_n[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+5]; + assign a_n[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+6]; + assign a_n[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+7]; + + assign a[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7]; + assign a[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+1]; + assign a[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+2]; + assign a[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+3]; + assign a[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+4]; + assign a[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+5]; + assign a[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+6]; + assign a[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+7]; + assign a_n[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7]; + assign a_n[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+1]; + assign a_n[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+2]; + assign a_n[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+3]; + assign a_n[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+4]; + assign a_n[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+5]; + assign a_n[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+6]; + assign a_n[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+7]; + + + assign b[8*0] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0] : fxu_breg_q[8*0]; + assign b[8*0+1] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+1] : fxu_breg_q[8*0+1]; + assign b[8*0+2] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+2] : fxu_breg_q[8*0+2]; + assign b[8*0+3] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+3] : fxu_breg_q[8*0+3]; + assign b[8*0+4] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+4] : fxu_breg_q[8*0+4]; + assign b[8*0+5] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+5] : fxu_breg_q[8*0+5]; + assign b[8*0+6] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+6] : fxu_breg_q[8*0+6]; + assign b[8*0+7] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+7] : fxu_breg_q[8*0+7]; + assign b_n[8*0] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0] : fxu_breg_n_q[8*0]; + assign b_n[8*0+1] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+1] : fxu_breg_n_q[8*0+1]; + assign b_n[8*0+2] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+2] : fxu_breg_n_q[8*0+2]; + assign b_n[8*0+3] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+3] : fxu_breg_n_q[8*0+3]; + assign b_n[8*0+4] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+4] : fxu_breg_n_q[8*0+4]; + assign b_n[8*0+5] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+5] : fxu_breg_n_q[8*0+5]; + assign b_n[8*0+6] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+6] : fxu_breg_n_q[8*0+6]; + assign b_n[8*0+7] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+7] : fxu_breg_n_q[8*0+7]; + + assign b[8*1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1] : fxu_breg_q[8*1]; + assign b[8*1+1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+1] : fxu_breg_q[8*1+1]; + assign b[8*1+2] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+2] : fxu_breg_q[8*1+2]; + assign b[8*1+3] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+3] : fxu_breg_q[8*1+3]; + assign b[8*1+4] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+4] : fxu_breg_q[8*1+4]; + assign b[8*1+5] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+5] : fxu_breg_q[8*1+5]; + assign b[8*1+6] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+6] : fxu_breg_q[8*1+6]; + assign b[8*1+7] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+7] : fxu_breg_q[8*1+7]; + assign b_n[8*1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1] : fxu_breg_n_q[8*1]; + assign b_n[8*1+1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+1] : fxu_breg_n_q[8*1+1]; + assign b_n[8*1+2] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+2] : fxu_breg_n_q[8*1+2]; + assign b_n[8*1+3] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+3] : fxu_breg_n_q[8*1+3]; + assign b_n[8*1+4] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+4] : fxu_breg_n_q[8*1+4]; + assign b_n[8*1+5] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+5] : fxu_breg_n_q[8*1+5]; + assign b_n[8*1+6] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+6] : fxu_breg_n_q[8*1+6]; + assign b_n[8*1+7] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+7] : fxu_breg_n_q[8*1+7]; + + assign b[8*2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2] : fxu_breg_q[8*2]; + assign b[8*2+1] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+1] : fxu_breg_q[8*2+1]; + assign b[8*2+2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+2] : fxu_breg_q[8*2+2]; + assign b[8*2+3] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+3] : fxu_breg_q[8*2+3]; + assign b[8*2+4] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+4] : fxu_breg_q[8*2+4]; + assign b[8*2+5] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+5] : fxu_breg_q[8*2+5]; + assign b[8*2+6] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+6] : fxu_breg_q[8*2+6]; + assign b[8*2+7] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+7] : fxu_breg_q[8*2+7]; + assign b_n[8*2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2] : fxu_breg_n_q[8*2]; + assign b_n[8*2+1] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+1] : fxu_breg_n_q[8*2+1]; + assign b_n[8*2+2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+2] : fxu_breg_n_q[8*2+2]; + assign b_n[8*2+3] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+3] : fxu_breg_n_q[8*2+3]; + assign b_n[8*2+4] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+4] : fxu_breg_n_q[8*2+4]; + assign b_n[8*2+5] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+5] : fxu_breg_n_q[8*2+5]; + assign b_n[8*2+6] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+6] : fxu_breg_n_q[8*2+6]; + assign b_n[8*2+7] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+7] : fxu_breg_n_q[8*2+7]; + + assign b[8*3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3] : fxu_breg_q[8*3]; + assign b[8*3+1] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+1] : fxu_breg_q[8*3+1]; + assign b[8*3+2] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+2] : fxu_breg_q[8*3+2]; + assign b[8*3+3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+3] : fxu_breg_q[8*3+3]; + assign b[8*3+4] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+4] : fxu_breg_q[8*3+4]; + assign b[8*3+5] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+5] : fxu_breg_q[8*3+5]; + assign b[8*3+6] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+6] : fxu_breg_q[8*3+6]; + assign b[8*3+7] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+7] : fxu_breg_q[8*3+7]; + assign b_n[8*3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3] : fxu_breg_n_q[8*3]; + assign b_n[8*3+1] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+1] : fxu_breg_n_q[8*3+1]; + assign b_n[8*3+2] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+2] : fxu_breg_n_q[8*3+2]; + assign b_n[8*3+3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+3] : fxu_breg_n_q[8*3+3]; + assign b_n[8*3+4] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+4] : fxu_breg_n_q[8*3+4]; + assign b_n[8*3+5] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+5] : fxu_breg_n_q[8*3+5]; + assign b_n[8*3+6] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+6] : fxu_breg_n_q[8*3+6]; + assign b_n[8*3+7] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+7] : fxu_breg_n_q[8*3+7]; + + assign b[8*6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6] : fxu_breg_q[8*6]; + assign b[8*6+1] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+1] : fxu_breg_q[8*6+1]; + assign b[8*6+2] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+2] : fxu_breg_q[8*6+2]; + assign b[8*6+3] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+3] : (local_error_found) ? fxu_breg_q[8*6+3] : fxu_breg_q[8*6+2]; + assign b[8*6+4] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+4] : fxu_breg_q[8*6+4]; + assign b[8*6+5] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+5] : fxu_breg_q[8*6+5]; + assign b[8*6+6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+6] : fxu_breg_q[8*6+6]; + assign b[8*6+7] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+7] : fxu_breg_q[8*6+7]; + assign b_n[8*6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6] : fxu_breg_n_q[8*6]; + assign b_n[8*6+1] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+1] : fxu_breg_n_q[8*6+1]; + assign b_n[8*6+2] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+2] : fxu_breg_n_q[8*6+2]; + assign b_n[8*6+3] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+3] : fxu_breg_n_q[8*6+3]; + assign b_n[8*6+4] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+4] : fxu_breg_n_q[8*6+4]; + assign b_n[8*6+5] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+5] : fxu_breg_n_q[8*6+5]; + assign b_n[8*6+6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+6] : fxu_breg_n_q[8*6+6]; + assign b_n[8*6+7] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+7] : fxu_breg_n_q[8*6+7]; + + assign b[8*7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7] : fxu_breg_q[8*7]; + assign b[8*7+1] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+1] : fxu_breg_q[8*7+1]; + assign b[8*7+2] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+2] : fxu_breg_q[8*7+2]; + assign b[8*7+3] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+3] : (local_error_found) ? fxu_breg_q[8*7+3] : fxu_breg_q[8*7+2]; + assign b[8*7+4] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+4] : fxu_breg_q[8*7+4]; + assign b[8*7+5] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+5] : fxu_breg_q[8*7+5]; + assign b[8*7+6] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+6] : fxu_breg_q[8*7+6]; + assign b[8*7+7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+7] : fxu_breg_q[8*7+7]; + assign b_n[8*7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7] : fxu_breg_n_q[8*7]; + assign b_n[8*7+1] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+1] : fxu_breg_n_q[8*7+1]; + assign b_n[8*7+2] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+2] : fxu_breg_n_q[8*7+2]; + assign b_n[8*7+3] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+3] : fxu_breg_n_q[8*7+3]; + assign b_n[8*7+4] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+4] : fxu_breg_n_q[8*7+4]; + assign b_n[8*7+5] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+5] : fxu_breg_n_q[8*7+5]; + assign b_n[8*7+6] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+6] : fxu_breg_n_q[8*7+6]; + assign b_n[8*7+7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+7] : fxu_breg_n_q[8*7+7]; + + assign b[8*4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4] : (bin_add_45_q) ? fxu_breg_q[8*4] : 1'b0; + assign b[8*4+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+1] : (bin_add_45_q) ? fxu_breg_q[8*4+1] : 1'b0; + assign b[8*4+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+2] : (bin_add_45_q) ? fxu_breg_q[8*4+2] : 1'b0; + assign b[8*4+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+3] : (bin_add_45_q) ? fxu_breg_q[8*4+3] : 1'b0; + assign b[8*4+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+4] : (bin_add_45_q) ? fxu_breg_q[8*4+4] : 1'b0; + assign b[8*4+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+5] : (bin_add_45_q) ? fxu_breg_q[8*4+5] : 1'b0; + assign b[8*4+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+6] : (bin_add_45_q) ? fxu_breg_q[8*4+6] : 1'b0; + assign b[8*4+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+7] : (bin_add_45_q) ? fxu_breg_q[8*4+7] : 1'b0; + assign b_n[8*4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4] : (bin_add_45_q) ? fxu_breg_n_q[8*4] : 1'b0; + assign b_n[8*4+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+1] : (bin_add_45_q) ? fxu_breg_n_q[8*4+1] : 1'b0; + assign b_n[8*4+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+2] : (bin_add_45_q) ? fxu_breg_n_q[8*4+2] : 1'b0; + assign b_n[8*4+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+3] : (bin_add_45_q) ? fxu_breg_n_q[8*4+3] : 1'b0; + assign b_n[8*4+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+4] : (bin_add_45_q) ? fxu_breg_n_q[8*4+4] : 1'b0; + assign b_n[8*4+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+5] : (bin_add_45_q) ? fxu_breg_n_q[8*4+5] : 1'b0; + assign b_n[8*4+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+6] : (bin_add_45_q) ? fxu_breg_n_q[8*4+6] : 1'b0; + assign b_n[8*4+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+7] : (bin_add_45_q) ? fxu_breg_n_q[8*4+7] : 1'b0; + + assign b[8*5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5] : (bin_add_45_q) ? fxu_breg_q[8*5] : 1'b0; + assign b[8*5+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+1] : (bin_add_45_q) ? fxu_breg_q[8*5+1] : 1'b0; + assign b[8*5+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+2] : (bin_add_45_q) ? fxu_breg_q[8*5+2] : 1'b0; + assign b[8*5+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+3] : (bin_add_45_q) ? fxu_breg_q[8*5+3] : 1'b0; + assign b[8*5+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+4] : (bin_add_45_q) ? fxu_breg_q[8*5+4] : 1'b0; + assign b[8*5+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+5] : (bin_add_45_q) ? fxu_breg_q[8*5+5] : 1'b0; + assign b[8*5+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+6] : (bin_add_45_q) ? fxu_breg_q[8*5+6] : 1'b0; + assign b[8*5+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+7] : (bin_add_45_q) ? fxu_breg_q[8*5+7] : 1'b0; + assign b_n[8*5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5] : (bin_add_45_q) ? fxu_breg_n_q[8*5] : 1'b0; + assign b_n[8*5+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+1] : (bin_add_45_q) ? fxu_breg_n_q[8*5+1] : 1'b0; + assign b_n[8*5+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+2] : (bin_add_45_q) ? fxu_breg_n_q[8*5+2] : 1'b0; + assign b_n[8*5+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+3] : (bin_add_45_q) ? fxu_breg_n_q[8*5+3] : 1'b0; + assign b_n[8*5+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+4] : (bin_add_45_q) ? fxu_breg_n_q[8*5+4] : 1'b0; + assign b_n[8*5+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+5] : (bin_add_45_q) ? fxu_breg_n_q[8*5+5] : 1'b0; + assign b_n[8*5+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+6] : (bin_add_45_q) ? fxu_breg_n_q[8*5+6] : 1'b0; + assign b_n[8*5+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+7] : (bin_add_45_q) ? fxu_breg_n_q[8*5+7] : 1'b0; + + assign c[64] = bin_cin_q; + assign c_n[64] = (~bin_cin_q); + + assign bruce_bin_sum[0] = (b_n[0] & a_n[0] & c[0+1]) | (b_n[0] & a[0] & c_n[0+1]) | (b[0] & a_n[0] & c_n[0+1]) | (b[0] & a[0] & c[0+1]); + assign p[0] = a[0] | b[0]; + assign p_n[0] = ~p[0]; + assign g[0] = a[0] & b[0]; + assign h_n[0] = g[0] | p_n[0]; + + assign bruce_bin_sum[1] = (b_n[1] & a_n[1] & c[1+1]) | (b_n[1] & a[1] & c_n[1+1]) | (b[1] & a_n[1] & c_n[1+1]) | (b[1] & a[1] & c[1+1]); + assign p[1] = a[1] | b[1]; + assign p_n[1] = ~p[1]; + assign g[1] = a[1] & b[1]; + assign h_n[1] = g[1] | p_n[1]; + + assign bruce_bin_sum[2] = (b_n[2] & a_n[2] & c[2+1]) | (b_n[2] & a[2] & c_n[2+1]) | (b[2] & a_n[2] & c_n[2+1]) | (b[2] & a[2] & c[2+1]); + assign p[2] = a[2] | b[2]; + assign p_n[2] = ~p[2]; + assign g[2] = a[2] & b[2]; + assign h_n[2] = g[2] | p_n[2]; + + assign bruce_bin_sum[3] = (b_n[3] & a_n[3] & c[3+1]) | (b_n[3] & a[3] & c_n[3+1]) | (b[3] & a_n[3] & c_n[3+1]) | (b[3] & a[3] & c[3+1]); + assign p[3] = a[3] | b[3]; + assign p_n[3] = ~p[3]; + assign g[3] = a[3] & b[3]; + assign h_n[3] = g[3] | p_n[3]; + + assign bruce_bin_sum[4] = (b_n[4] & a_n[4] & c[4+1]) | (b_n[4] & a[4] & c_n[4+1]) | (b[4] & a_n[4] & c_n[4+1]) | (b[4] & a[4] & c[4+1]); + assign p[4] = a[4] | b[4]; + assign p_n[4] = ~p[4]; + assign g[4] = a[4] & b[4]; + assign h_n[4] = g[4] | p_n[4]; + + assign bruce_bin_sum[5] = (b_n[5] & a_n[5] & c[5+1]) | (b_n[5] & a[5] & c_n[5+1]) | (b[5] & a_n[5] & c_n[5+1]) | (b[5] & a[5] & c[5+1]); + assign p[5] = a[5] | b[5]; + assign p_n[5] = ~p[5]; + assign g[5] = a[5] & b[5]; + assign h_n[5] = g[5] | p_n[5]; + + assign bruce_bin_sum[6] = (b_n[6] & a_n[6] & c[6+1]) | (b_n[6] & a[6] & c_n[6+1]) | (b[6] & a_n[6] & c_n[6+1]) | (b[6] & a[6] & c[6+1]); + assign p[6] = a[6] | b[6]; + assign p_n[6] = ~p[6]; + assign g[6] = a[6] & b[6]; + assign h_n[6] = g[6] | p_n[6]; + + assign bruce_bin_sum[7] = (b_n[7] & a_n[7] & c[7+1]) | (b_n[7] & a[7] & c_n[7+1]) | (b[7] & a_n[7] & c_n[7+1]) | (b[7] & a[7] & c[7+1]); + assign p[7] = a[7] | b[7]; + assign p_n[7] = ~p[7]; + assign g[7] = a[7] & b[7]; + assign h_n[7] = g[7] | p_n[7]; + + assign bruce_bin_sum[8] = (b_n[8] & a_n[8] & c[8+1]) | (b_n[8] & a[8] & c_n[8+1]) | (b[8] & a_n[8] & c_n[8+1]) | (b[8] & a[8] & c[8+1]); + assign p[8] = a[8] | b[8]; + assign p_n[8] = ~p[8]; + assign g[8] = a[8] & b[8]; + assign h_n[8] = g[8] | p_n[8]; + + assign bruce_bin_sum[9] = (b_n[9] & a_n[9] & c[9+1]) | (b_n[9] & a[9] & c_n[9+1]) | (b[9] & a_n[9] & c_n[9+1]) | (b[9] & a[9] & c[9+1]); + assign p[9] = a[9] | b[9]; + assign p_n[9] = ~p[9]; + assign g[9] = a[9] & b[9]; + assign h_n[9] = g[9] | p_n[9]; + + assign bruce_bin_sum[10] = (b_n[10] & a_n[10] & c[10+1]) | (b_n[10] & a[10] & c_n[10+1]) | (b[10] & a_n[10] & c_n[10+1]) | (b[10] & a[10] & c[10+1]); + assign p[10] = a[10] | b[10]; + assign p_n[10] = ~p[10]; + assign g[10] = a[10] & b[10]; + assign h_n[10] = g[10] | p_n[10]; + + assign bruce_bin_sum[11] = (b_n[11] & a_n[11] & c[11+1]) | (b_n[11] & a[11] & c_n[11+1]) | (b[11] & a_n[11] & c_n[11+1]) | (b[11] & a[11] & c[11+1]); + assign p[11] = a[11] | b[11]; + assign p_n[11] = ~p[11]; + assign g[11] = a[11] & b[11]; + assign h_n[11] = g[11] | p_n[11]; + + assign bruce_bin_sum[12] = (b_n[12] & a_n[12] & c[12+1]) | (b_n[12] & a[12] & c_n[12+1]) | (b[12] & a_n[12] & c_n[12+1]) | (b[12] & a[12] & c[12+1]); + assign p[12] = a[12] | b[12]; + assign p_n[12] = ~p[12]; + assign g[12] = a[12] & b[12]; + assign h_n[12] = g[12] | p_n[12]; + + assign bruce_bin_sum[13] = (b_n[13] & a_n[13] & c[13+1]) | (b_n[13] & a[13] & c_n[13+1]) | (b[13] & a_n[13] & c_n[13+1]) | (b[13] & a[13] & c[13+1]); + assign p[13] = a[13] | b[13]; + assign p_n[13] = ~p[13]; + assign g[13] = a[13] & b[13]; + assign h_n[13] = g[13] | p_n[13]; + + assign bruce_bin_sum[14] = (b_n[14] & a_n[14] & c[14+1]) | (b_n[14] & a[14] & c_n[14+1]) | (b[14] & a_n[14] & c_n[14+1]) | (b[14] & a[14] & c[14+1]); + assign p[14] = a[14] | b[14]; + assign p_n[14] = ~p[14]; + assign g[14] = a[14] & b[14]; + assign h_n[14] = g[14] | p_n[14]; + + assign bruce_bin_sum[15] = (b_n[15] & a_n[15] & c[15+1]) | (b_n[15] & a[15] & c_n[15+1]) | (b[15] & a_n[15] & c_n[15+1]) | (b[15] & a[15] & c[15+1]); + assign p[15] = a[15] | b[15]; + assign p_n[15] = ~p[15]; + assign g[15] = a[15] & b[15]; + assign h_n[15] = g[15] | p_n[15]; + + assign bruce_bin_sum[16] = (b_n[16] & a_n[16] & c[16+1]) | (b_n[16] & a[16] & c_n[16+1]) | (b[16] & a_n[16] & c_n[16+1]) | (b[16] & a[16] & c[16+1]); + assign p[16] = a[16] | b[16]; + assign p_n[16] = ~p[16]; + assign g[16] = a[16] & b[16]; + assign h_n[16] = g[16] | p_n[16]; + + assign bruce_bin_sum[17] = (b_n[17] & a_n[17] & c[17+1]) | (b_n[17] & a[17] & c_n[17+1]) | (b[17] & a_n[17] & c_n[17+1]) | (b[17] & a[17] & c[17+1]); + assign p[17] = a[17] | b[17]; + assign p_n[17] = ~p[17]; + assign g[17] = a[17] & b[17]; + assign h_n[17] = g[17] | p_n[17]; + + assign bruce_bin_sum[18] = (b_n[18] & a_n[18] & c[18+1]) | (b_n[18] & a[18] & c_n[18+1]) | (b[18] & a_n[18] & c_n[18+1]) | (b[18] & a[18] & c[18+1]); + assign p[18] = a[18] | b[18]; + assign p_n[18] = ~p[18]; + assign g[18] = a[18] & b[18]; + assign h_n[18] = g[18] | p_n[18]; + + assign bruce_bin_sum[19] = (b_n[19] & a_n[19] & c[19+1]) | (b_n[19] & a[19] & c_n[19+1]) | (b[19] & a_n[19] & c_n[19+1]) | (b[19] & a[19] & c[19+1]); + assign p[19] = a[19] | b[19]; + assign p_n[19] = ~p[19]; + assign g[19] = a[19] & b[19]; + assign h_n[19] = g[19] | p_n[19]; + + assign bruce_bin_sum[20] = (b_n[20] & a_n[20] & c[20+1]) | (b_n[20] & a[20] & c_n[20+1]) | (b[20] & a_n[20] & c_n[20+1]) | (b[20] & a[20] & c[20+1]); + assign p[20] = a[20] | b[20]; + assign p_n[20] = ~p[20]; + assign g[20] = a[20] & b[20]; + assign h_n[20] = g[20] | p_n[20]; + + assign bruce_bin_sum[21] = (b_n[21] & a_n[21] & c[21+1]) | (b_n[21] & a[21] & c_n[21+1]) | (b[21] & a_n[21] & c_n[21+1]) | (b[21] & a[21] & c[21+1]); + assign p[21] = a[21] | b[21]; + assign p_n[21] = ~p[21]; + assign g[21] = a[21] & b[21]; + assign h_n[21] = g[21] | p_n[21]; + + assign bruce_bin_sum[22] = (b_n[22] & a_n[22] & c[22+1]) | (b_n[22] & a[22] & c_n[22+1]) | (b[22] & a_n[22] & c_n[22+1]) | (b[22] & a[22] & c[22+1]); + assign p[22] = a[22] | b[22]; + assign p_n[22] = ~p[22]; + assign g[22] = a[22] & b[22]; + assign h_n[22] = g[22] | p_n[22]; + + assign bruce_bin_sum[23] = (b_n[23] & a_n[23] & c[23+1]) | (b_n[23] & a[23] & c_n[23+1]) | (b[23] & a_n[23] & c_n[23+1]) | (b[23] & a[23] & c[23+1]); + assign p[23] = a[23] | b[23]; + assign p_n[23] = ~p[23]; + assign g[23] = a[23] & b[23]; + assign h_n[23] = g[23] | p_n[23]; + + assign bruce_bin_sum[24] = (b_n[24] & a_n[24] & c[24+1]) | (b_n[24] & a[24] & c_n[24+1]) | (b[24] & a_n[24] & c_n[24+1]) | (b[24] & a[24] & c[24+1]); + assign p[24] = a[24] | b[24]; + assign p_n[24] = ~p[24]; + assign g[24] = a[24] & b[24]; + assign h_n[24] = g[24] | p_n[24]; + + assign bruce_bin_sum[25] = (b_n[25] & a_n[25] & c[25+1]) | (b_n[25] & a[25] & c_n[25+1]) | (b[25] & a_n[25] & c_n[25+1]) | (b[25] & a[25] & c[25+1]); + assign p[25] = a[25] | b[25]; + assign p_n[25] = ~p[25]; + assign g[25] = a[25] & b[25]; + assign h_n[25] = g[25] | p_n[25]; + + assign bruce_bin_sum[26] = (b_n[26] & a_n[26] & c[26+1]) | (b_n[26] & a[26] & c_n[26+1]) | (b[26] & a_n[26] & c_n[26+1]) | (b[26] & a[26] & c[26+1]); + assign p[26] = a[26] | b[26]; + assign p_n[26] = ~p[26]; + assign g[26] = a[26] & b[26]; + assign h_n[26] = g[26] | p_n[26]; + + assign bruce_bin_sum[27] = (b_n[27] & a_n[27] & c[27+1]) | (b_n[27] & a[27] & c_n[27+1]) | (b[27] & a_n[27] & c_n[27+1]) | (b[27] & a[27] & c[27+1]); + assign p[27] = a[27] | b[27]; + assign p_n[27] = ~p[27]; + assign g[27] = a[27] & b[27]; + assign h_n[27] = g[27] | p_n[27]; + + assign bruce_bin_sum[28] = (b_n[28] & a_n[28] & c[28+1]) | (b_n[28] & a[28] & c_n[28+1]) | (b[28] & a_n[28] & c_n[28+1]) | (b[28] & a[28] & c[28+1]); + assign p[28] = a[28] | b[28]; + assign p_n[28] = ~p[28]; + assign g[28] = a[28] & b[28]; + assign h_n[28] = g[28] | p_n[28]; + + assign bruce_bin_sum[29] = (b_n[29] & a_n[29] & c[29+1]) | (b_n[29] & a[29] & c_n[29+1]) | (b[29] & a_n[29] & c_n[29+1]) | (b[29] & a[29] & c[29+1]); + assign p[29] = a[29] | b[29]; + assign p_n[29] = ~p[29]; + assign g[29] = a[29] & b[29]; + assign h_n[29] = g[29] | p_n[29]; + + assign bruce_bin_sum[30] = (b_n[30] & a_n[30] & c[30+1]) | (b_n[30] & a[30] & c_n[30+1]) | (b[30] & a_n[30] & c_n[30+1]) | (b[30] & a[30] & c[30+1]); + assign p[30] = a[30] | b[30]; + assign p_n[30] = ~p[30]; + assign g[30] = a[30] & b[30]; + assign h_n[30] = g[30] | p_n[30]; + + assign bruce_bin_sum[31] = (b_n[31] & a_n[31] & c[31+1]) | (b_n[31] & a[31] & c_n[31+1]) | (b[31] & a_n[31] & c_n[31+1]) | (b[31] & a[31] & c[31+1]); + assign p[31] = a[31] | b[31]; + assign p_n[31] = ~p[31]; + assign g[31] = a[31] & b[31]; + assign h_n[31] = g[31] | p_n[31]; + + assign bruce_bin_sum[32] = (b_n[32] & a_n[32] & c[32+1]) | (b_n[32] & a[32] & c_n[32+1]) | (b[32] & a_n[32] & c_n[32+1]) | (b[32] & a[32] & c[32+1]); + assign p[32] = a[32] | b[32]; + assign p_n[32] = ~p[32]; + assign g[32] = a[32] & b[32]; + assign h_n[32] = g[32] | p_n[32]; + + assign bruce_bin_sum[33] = (b_n[33] & a_n[33] & c[33+1]) | (b_n[33] & a[33] & c_n[33+1]) | (b[33] & a_n[33] & c_n[33+1]) | (b[33] & a[33] & c[33+1]); + assign p[33] = a[33] | b[33]; + assign p_n[33] = ~p[33]; + assign g[33] = a[33] & b[33]; + assign h_n[33] = g[33] | p_n[33]; + + assign bruce_bin_sum[34] = (b_n[34] & a_n[34] & c[34+1]) | (b_n[34] & a[34] & c_n[34+1]) | (b[34] & a_n[34] & c_n[34+1]) | (b[34] & a[34] & c[34+1]); + assign p[34] = a[34] | b[34]; + assign p_n[34] = ~p[34]; + assign g[34] = a[34] & b[34]; + assign h_n[34] = g[34] | p_n[34]; + + assign bruce_bin_sum[35] = (b_n[35] & a_n[35] & c[35+1]) | (b_n[35] & a[35] & c_n[35+1]) | (b[35] & a_n[35] & c_n[35+1]) | (b[35] & a[35] & c[35+1]); + assign p[35] = a[35] | b[35]; + assign p_n[35] = ~p[35]; + assign g[35] = a[35] & b[35]; + assign h_n[35] = g[35] | p_n[35]; + + assign bruce_bin_sum[36] = (b_n[36] & a_n[36] & c[36+1]) | (b_n[36] & a[36] & c_n[36+1]) | (b[36] & a_n[36] & c_n[36+1]) | (b[36] & a[36] & c[36+1]); + assign p[36] = a[36] | b[36]; + assign p_n[36] = ~p[36]; + assign g[36] = a[36] & b[36]; + assign h_n[36] = g[36] | p_n[36]; + + assign bruce_bin_sum[37] = (b_n[37] & a_n[37] & c[37+1]) | (b_n[37] & a[37] & c_n[37+1]) | (b[37] & a_n[37] & c_n[37+1]) | (b[37] & a[37] & c[37+1]); + assign p[37] = a[37] | b[37]; + assign p_n[37] = ~p[37]; + assign g[37] = a[37] & b[37]; + assign h_n[37] = g[37] | p_n[37]; + + assign bruce_bin_sum[38] = (b_n[38] & a_n[38] & c[38+1]) | (b_n[38] & a[38] & c_n[38+1]) | (b[38] & a_n[38] & c_n[38+1]) | (b[38] & a[38] & c[38+1]); + assign p[38] = a[38] | b[38]; + assign p_n[38] = ~p[38]; + assign g[38] = a[38] & b[38]; + assign h_n[38] = g[38] | p_n[38]; + + assign bruce_bin_sum[39] = (b_n[39] & a_n[39] & c[39+1]) | (b_n[39] & a[39] & c_n[39+1]) | (b[39] & a_n[39] & c_n[39+1]) | (b[39] & a[39] & c[39+1]); + assign p[39] = a[39] | b[39]; + assign p_n[39] = ~p[39]; + assign g[39] = a[39] & b[39]; + assign h_n[39] = g[39] | p_n[39]; + + assign bruce_bin_sum[40] = (b_n[40] & a_n[40] & c[40+1]) | (b_n[40] & a[40] & c_n[40+1]) | (b[40] & a_n[40] & c_n[40+1]) | (b[40] & a[40] & c[40+1]); + assign p[40] = a[40] | b[40]; + assign p_n[40] = ~p[40]; + assign g[40] = a[40] & b[40]; + assign h_n[40] = g[40] | p_n[40]; + + assign bruce_bin_sum[41] = (b_n[41] & a_n[41] & c[41+1]) | (b_n[41] & a[41] & c_n[41+1]) | (b[41] & a_n[41] & c_n[41+1]) | (b[41] & a[41] & c[41+1]); + assign p[41] = a[41] | b[41]; + assign p_n[41] = ~p[41]; + assign g[41] = a[41] & b[41]; + assign h_n[41] = g[41] | p_n[41]; + + assign bruce_bin_sum[42] = (b_n[42] & a_n[42] & c[42+1]) | (b_n[42] & a[42] & c_n[42+1]) | (b[42] & a_n[42] & c_n[42+1]) | (b[42] & a[42] & c[42+1]); + assign p[42] = a[42] | b[42]; + assign p_n[42] = ~p[42]; + assign g[42] = a[42] & b[42]; + assign h_n[42] = g[42] | p_n[42]; + + assign bruce_bin_sum[43] = (b_n[43] & a_n[43] & c[43+1]) | (b_n[43] & a[43] & c_n[43+1]) | (b[43] & a_n[43] & c_n[43+1]) | (b[43] & a[43] & c[43+1]); + assign p[43] = a[43] | b[43]; + assign p_n[43] = ~p[43]; + assign g[43] = a[43] & b[43]; + assign h_n[43] = g[43] | p_n[43]; + + assign bruce_bin_sum[44] = (b_n[44] & a_n[44] & c[44+1]) | (b_n[44] & a[44] & c_n[44+1]) | (b[44] & a_n[44] & c_n[44+1]) | (b[44] & a[44] & c[44+1]); + assign p[44] = a[44] | b[44]; + assign p_n[44] = ~p[44]; + assign g[44] = a[44] & b[44]; + assign h_n[44] = g[44] | p_n[44]; + + assign bruce_bin_sum[45] = (b_n[45] & a_n[45] & c[45+1]) | (b_n[45] & a[45] & c_n[45+1]) | (b[45] & a_n[45] & c_n[45+1]) | (b[45] & a[45] & c[45+1]); + assign p[45] = a[45] | b[45]; + assign p_n[45] = ~p[45]; + assign g[45] = a[45] & b[45]; + assign h_n[45] = g[45] | p_n[45]; + + assign bruce_bin_sum[46] = (b_n[46] & a_n[46] & c[46+1]) | (b_n[46] & a[46] & c_n[46+1]) | (b[46] & a_n[46] & c_n[46+1]) | (b[46] & a[46] & c[46+1]); + assign p[46] = a[46] | b[46]; + assign p_n[46] = ~p[46]; + assign g[46] = a[46] & b[46]; + assign h_n[46] = g[46] | p_n[46]; + + assign bruce_bin_sum[47] = (b_n[47] & a_n[47] & c[47+1]) | (b_n[47] & a[47] & c_n[47+1]) | (b[47] & a_n[47] & c_n[47+1]) | (b[47] & a[47] & c[47+1]); + assign p[47] = a[47] | b[47]; + assign p_n[47] = ~p[47]; + assign g[47] = a[47] & b[47]; + assign h_n[47] = g[47] | p_n[47]; + + assign bruce_bin_sum[48] = (b_n[48] & a_n[48] & c[48+1]) | (b_n[48] & a[48] & c_n[48+1]) | (b[48] & a_n[48] & c_n[48+1]) | (b[48] & a[48] & c[48+1]); + assign p[48] = a[48] | b[48]; + assign p_n[48] = ~p[48]; + assign g[48] = a[48] & b[48]; + assign h_n[48] = g[48] | p_n[48]; + + assign bruce_bin_sum[49] = (b_n[49] & a_n[49] & c[49+1]) | (b_n[49] & a[49] & c_n[49+1]) | (b[49] & a_n[49] & c_n[49+1]) | (b[49] & a[49] & c[49+1]); + assign p[49] = a[49] | b[49]; + assign p_n[49] = ~p[49]; + assign g[49] = a[49] & b[49]; + assign h_n[49] = g[49] | p_n[49]; + + assign bruce_bin_sum[50] = (b_n[50] & a_n[50] & c[50+1]) | (b_n[50] & a[50] & c_n[50+1]) | (b[50] & a_n[50] & c_n[50+1]) | (b[50] & a[50] & c[50+1]); + assign p[50] = a[50] | b[50]; + assign p_n[50] = ~p[50]; + assign g[50] = a[50] & b[50]; + assign h_n[50] = g[50] | p_n[50]; + + assign bruce_bin_sum[51] = (b_n[51] & a_n[51] & c[51+1]) | (b_n[51] & a[51] & c_n[51+1]) | (b[51] & a_n[51] & c_n[51+1]) | (b[51] & a[51] & c[51+1]); + assign p[51] = a[51] | b[51]; + assign p_n[51] = ~p[51]; + assign g[51] = a[51] & b[51]; + assign h_n[51] = g[51] | p_n[51]; + + assign bruce_bin_sum[52] = (b_n[52] & a_n[52] & c[52+1]) | (b_n[52] & a[52] & c_n[52+1]) | (b[52] & a_n[52] & c_n[52+1]) | (b[52] & a[52] & c[52+1]); + assign p[52] = a[52] | b[52]; + assign p_n[52] = ~p[52]; + assign g[52] = a[52] & b[52]; + assign h_n[52] = g[52] | p_n[52]; + + assign bruce_bin_sum[53] = (b_n[53] & a_n[53] & c[53+1]) | (b_n[53] & a[53] & c_n[53+1]) | (b[53] & a_n[53] & c_n[53+1]) | (b[53] & a[53] & c[53+1]); + assign p[53] = a[53] | b[53]; + assign p_n[53] = ~p[53]; + assign g[53] = a[53] & b[53]; + assign h_n[53] = g[53] | p_n[53]; + + assign bruce_bin_sum[54] = (b_n[54] & a_n[54] & c[54+1]) | (b_n[54] & a[54] & c_n[54+1]) | (b[54] & a_n[54] & c_n[54+1]) | (b[54] & a[54] & c[54+1]); + assign p[54] = a[54] | b[54]; + assign p_n[54] = ~p[54]; + assign g[54] = a[54] & b[54]; + assign h_n[54] = g[54] | p_n[54]; + + assign bruce_bin_sum[55] = (b_n[55] & a_n[55] & c[55+1]) | (b_n[55] & a[55] & c_n[55+1]) | (b[55] & a_n[55] & c_n[55+1]) | (b[55] & a[55] & c[55+1]); + assign p[55] = a[55] | b[55]; + assign p_n[55] = ~p[55]; + assign g[55] = a[55] & b[55]; + assign h_n[55] = g[55] | p_n[55]; + + assign bruce_bin_sum[56] = (b_n[56] & a_n[56] & c[56+1]) | (b_n[56] & a[56] & c_n[56+1]) | (b[56] & a_n[56] & c_n[56+1]) | (b[56] & a[56] & c[56+1]); + assign p[56] = a[56] | b[56]; + assign p_n[56] = ~p[56]; + assign g[56] = a[56] & b[56]; + assign h_n[56] = g[56] | p_n[56]; + + assign bruce_bin_sum[57] = (b_n[57] & a_n[57] & c[57+1]) | (b_n[57] & a[57] & c_n[57+1]) | (b[57] & a_n[57] & c_n[57+1]) | (b[57] & a[57] & c[57+1]); + assign p[57] = a[57] | b[57]; + assign p_n[57] = ~p[57]; + assign g[57] = a[57] & b[57]; + assign h_n[57] = g[57] | p_n[57]; + + assign bruce_bin_sum[58] = (b_n[58] & a_n[58] & c[58+1]) | (b_n[58] & a[58] & c_n[58+1]) | (b[58] & a_n[58] & c_n[58+1]) | (b[58] & a[58] & c[58+1]); + assign p[58] = a[58] | b[58]; + assign p_n[58] = ~p[58]; + assign g[58] = a[58] & b[58]; + assign h_n[58] = g[58] | p_n[58]; + + assign bruce_bin_sum[59] = (b_n[59] & a_n[59] & c[59+1]) | (b_n[59] & a[59] & c_n[59+1]) | (b[59] & a_n[59] & c_n[59+1]) | (b[59] & a[59] & c[59+1]); + assign p[59] = a[59] | b[59]; + assign p_n[59] = ~p[59]; + assign g[59] = a[59] & b[59]; + assign h_n[59] = g[59] | p_n[59]; + + assign bruce_bin_sum[60] = (b_n[60] & a_n[60] & c[60+1]) | (b_n[60] & a[60] & c_n[60+1]) | (b[60] & a_n[60] & c_n[60+1]) | (b[60] & a[60] & c[60+1]); + assign p[60] = a[60] | b[60]; + assign p_n[60] = ~p[60]; + assign g[60] = a[60] & b[60]; + assign h_n[60] = g[60] | p_n[60]; + + assign bruce_bin_sum[61] = (b_n[61] & a_n[61] & c[61+1]) | (b_n[61] & a[61] & c_n[61+1]) | (b[61] & a_n[61] & c_n[61+1]) | (b[61] & a[61] & c[61+1]); + assign p[61] = a[61] | b[61]; + assign p_n[61] = ~p[61]; + assign g[61] = a[61] & b[61]; + assign h_n[61] = g[61] | p_n[61]; + + assign bruce_bin_sum[62] = (b_n[62] & a_n[62] & c[62+1]) | (b_n[62] & a[62] & c_n[62+1]) | (b[62] & a_n[62] & c_n[62+1]) | (b[62] & a[62] & c[62+1]); + assign p[62] = a[62] | b[62]; + assign p_n[62] = ~p[62]; + assign g[62] = a[62] & b[62]; + assign h_n[62] = g[62] | p_n[62]; + + assign bruce_bin_sum[63] = (b_n[63] & a_n[63] & c[63+1]) | (b_n[63] & a[63] & c_n[63+1]) | (b[63] & a_n[63] & c_n[63+1]) | (b[63] & a[63] & c[63+1]); + assign p[63] = a[63] | b[63]; + assign p_n[63] = ~p[63]; + assign g[63] = a[63] & b[63]; + assign h_n[63] = g[63] | p_n[63]; + + assign bin_sum[0:63] = (alu_cmd[0:3] == 4'b0010) ? bruce_bin_sum[0:63] + 2'b01 : bruce_bin_sum[0:63]; + + assign d[0] = h_n[0] ^ p[0+1]; + assign d[1] = h_n[1] ^ p[1+1]; + assign d[2] = h_n[2] ^ p[2+1]; + assign d[3] = h_n[3] ^ p[3+1]; + assign d[4] = h_n[4] ^ p[4+1]; + assign d[5] = h_n[5] ^ p[5+1]; + assign d[6] = h_n[6] ^ p[6+1]; + assign d[7] = h_n[7] ^ p[7+1]; + assign d[8] = h_n[8] ^ p[8+1]; + assign d[9] = h_n[9] ^ p[9+1]; + assign d[10] = h_n[10] ^ p[10+1]; + assign d[11] = h_n[11] ^ p[11+1]; + assign d[12] = h_n[12] ^ p[12+1]; + assign d[13] = h_n[13] ^ p[13+1]; + assign d[14] = h_n[14] ^ p[14+1]; + assign d[15] = h_n[15] ^ p[15+1]; + assign d[16] = h_n[16] ^ p[16+1]; + assign d[17] = h_n[17] ^ p[17+1]; + assign d[18] = h_n[18] ^ p[18+1]; + assign d[19] = h_n[19] ^ p[19+1]; + assign d[20] = h_n[20] ^ p[20+1]; + assign d[21] = h_n[21] ^ p[21+1]; + assign d[22] = h_n[22] ^ p[22+1]; + assign d[23] = h_n[23] ^ p[23+1]; + assign d[24] = h_n[24] ^ p[24+1]; + assign d[25] = h_n[25] ^ p[25+1]; + assign d[26] = h_n[26] ^ p[26+1]; + assign d[27] = h_n[27] ^ p[27+1]; + assign d[28] = h_n[28] ^ p[28+1]; + assign d[29] = h_n[29] ^ p[29+1]; + assign d[30] = h_n[30] ^ p[30+1]; + assign d[31] = h_n[31] ^ p[31+1]; + assign d[32] = h_n[32] ^ p[32+1]; + assign d[33] = h_n[33] ^ p[33+1]; + assign d[34] = h_n[34] ^ p[34+1]; + assign d[35] = h_n[35] ^ p[35+1]; + assign d[36] = h_n[36] ^ p[36+1]; + assign d[37] = h_n[37] ^ p[37+1]; + assign d[38] = h_n[38] ^ p[38+1]; + assign d[39] = h_n[39] ^ p[39+1]; + assign d[40] = h_n[40] ^ p[40+1]; + assign d[41] = h_n[41] ^ p[41+1]; + assign d[42] = h_n[42] ^ p[42+1]; + assign d[43] = h_n[43] ^ p[43+1]; + assign d[44] = h_n[44] ^ p[44+1]; + assign d[45] = h_n[45] ^ p[45+1]; + assign d[46] = h_n[46] ^ p[46+1]; + assign d[47] = h_n[47] ^ p[47+1]; + assign d[48] = h_n[48] ^ p[48+1]; + assign d[49] = h_n[49] ^ p[49+1]; + assign d[50] = h_n[50] ^ p[50+1]; + assign d[51] = h_n[51] ^ p[51+1]; + assign d[52] = h_n[52] ^ p[52+1]; + assign d[53] = h_n[53] ^ p[53+1]; + assign d[54] = h_n[54] ^ p[54+1]; + assign d[55] = h_n[55] ^ p[55+1]; + assign d[56] = h_n[56] ^ p[56+1]; + assign d[57] = h_n[57] ^ p[57+1]; + assign d[58] = h_n[58] ^ p[58+1]; + assign d[59] = h_n[59] ^ p[59+1]; + assign d[60] = h_n[60] ^ p[60+1]; + assign d[61] = h_n[61] ^ p[61+1]; + assign d[62] = h_n[62] ^ p[62+1]; + + assign d[63] = h_n[63] ^ bin_sub_q; + + assign d8[0] = d[8*0] & d[8*0+1] & d[8*0+2] & d[8*0+3] & d[8*0+4] & d[8*0+5] & d[8*0+6] & d[8*0+7]; + assign d8[1] = d[8*1] & d[8*1+1] & d[8*1+2] & d[8*1+3] & d[8*1+4] & d[8*1+5] & d[8*1+6] & d[8*1+7]; + assign d8[2] = d[8*2] & d[8*2+1] & d[8*2+2] & d[8*2+3] & d[8*2+4] & d[8*2+5] & d[8*2+6] & d[8*2+7]; + assign d8[3] = d[8*3] & d[8*3+1] & d[8*3+2] & d[8*3+3] & d[8*3+4] & d[8*3+5] & d[8*3+6] & d[8*3+7]; + assign d8[4] = d[8*4] & d[8*4+1] & d[8*4+2] & d[8*4+3] & d[8*4+4] & d[8*4+5] & d[8*4+6] & d[8*4+7]; + assign d8[5] = d[8*5] & d[8*5+1] & d[8*5+2] & d[8*5+3] & d[8*5+4] & d[8*5+5] & d[8*5+6] & d[8*5+7]; + assign d8[6] = d[8*6] & d[8*6+1] & d[8*6+2] & d[8*6+3] & d[8*6+4] & d[8*6+5] & d[8*6+6] & d[8*6+7]; + assign d8[7] = d[8*7] & d[8*7+1] & d[8*7+2] & d[8*7+3] & d[8*7+4] & d[8*7+5] & d[8*7+6] & d[8*7+7]; + + assign ds = d[33] & d[34] & d[35] & d[36] & d[37] & d[38] & d[39]; + + assign bin_sum_0_63_z = d8[0] & d8[1] & d8[2] & d8[3] & d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_32_63_z = d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_33_63_z = ds & d8[5] & d8[6] & d8[7]; + + assign G2[0] = g[2*0] | (p[2*0] & g[2*0+1]); + assign P2[0] = p[2*0] & p[2*0+1]; + assign G2[1] = g[2*1] | (p[2*1] & g[2*1+1]); + assign P2[1] = p[2*1] & p[2*1+1]; + assign G2[2] = g[2*2] | (p[2*2] & g[2*2+1]); + assign P2[2] = p[2*2] & p[2*2+1]; + assign G2[3] = g[2*3] | (p[2*3] & g[2*3+1]); + assign P2[3] = p[2*3] & p[2*3+1]; + assign G2[4] = g[2*4] | (p[2*4] & g[2*4+1]); + assign P2[4] = p[2*4] & p[2*4+1]; + assign G2[5] = g[2*5] | (p[2*5] & g[2*5+1]); + assign P2[5] = p[2*5] & p[2*5+1]; + assign G2[6] = g[2*6] | (p[2*6] & g[2*6+1]); + assign P2[6] = p[2*6] & p[2*6+1]; + assign G2[7] = g[2*7] | (p[2*7] & g[2*7+1]); + assign P2[7] = p[2*7] & p[2*7+1]; + assign G2[8] = g[2*8] | (p[2*8] & g[2*8+1]); + assign P2[8] = p[2*8] & p[2*8+1]; + assign G2[9] = g[2*9] | (p[2*9] & g[2*9+1]); + assign P2[9] = p[2*9] & p[2*9+1]; + assign G2[10] = g[2*10] | (p[2*10] & g[2*10+1]); + assign P2[10] = p[2*10] & p[2*10+1]; + assign G2[11] = g[2*11] | (p[2*11] & g[2*11+1]); + assign P2[11] = p[2*11] & p[2*11+1]; + assign G2[12] = g[2*12] | (p[2*12] & g[2*12+1]); + assign P2[12] = p[2*12] & p[2*12+1]; + assign G2[13] = g[2*13] | (p[2*13] & g[2*13+1]); + assign P2[13] = p[2*13] & p[2*13+1]; + assign G2[14] = g[2*14] | (p[2*14] & g[2*14+1]); + assign P2[14] = p[2*14] & p[2*14+1]; + assign G2[15] = g[2*15] | (p[2*15] & g[2*15+1]); + assign P2[15] = p[2*15] & p[2*15+1]; + assign G2[16] = g[2*16] | (p[2*16] & g[2*16+1]); + assign P2[16] = p[2*16] & p[2*16+1]; + assign G2[17] = g[2*17] | (p[2*17] & g[2*17+1]); + assign P2[17] = p[2*17] & p[2*17+1]; + assign G2[18] = g[2*18] | (p[2*18] & g[2*18+1]); + assign P2[18] = p[2*18] & p[2*18+1]; + assign G2[19] = g[2*19] | (p[2*19] & g[2*19+1]); + assign P2[19] = p[2*19] & p[2*19+1]; + assign G2[20] = g[2*20] | (p[2*20] & g[2*20+1]); + assign P2[20] = p[2*20] & p[2*20+1]; + assign G2[21] = g[2*21] | (p[2*21] & g[2*21+1]); + assign P2[21] = p[2*21] & p[2*21+1]; + assign G2[22] = g[2*22] | (p[2*22] & g[2*22+1]); + assign P2[22] = p[2*22] & p[2*22+1]; + assign G2[23] = g[2*23] | (p[2*23] & g[2*23+1]); + assign P2[23] = p[2*23] & p[2*23+1]; + assign G2[24] = g[2*24] | (p[2*24] & g[2*24+1]); + assign P2[24] = p[2*24] & p[2*24+1]; + assign G2[25] = g[2*25] | (p[2*25] & g[2*25+1]); + assign P2[25] = p[2*25] & p[2*25+1]; + assign G2[26] = g[2*26] | (p[2*26] & g[2*26+1]); + assign P2[26] = p[2*26] & p[2*26+1]; + assign G2[27] = g[2*27] | (p[2*27] & g[2*27+1]); + assign P2[27] = p[2*27] & p[2*27+1]; + assign G2[28] = g[2*28] | (p[2*28] & g[2*28+1]); + assign P2[28] = p[2*28] & p[2*28+1]; + assign G2[29] = g[2*29] | (p[2*29] & g[2*29+1]); + assign P2[29] = p[2*29] & p[2*29+1]; + assign G2[30] = g[2*30] | (p[2*30] & g[2*30+1]); + assign P2[30] = p[2*30] & p[2*30+1]; + assign G2[31] = g[2*31] | (p[2*31] & g[2*31+1]); + assign P2[31] = p[2*31] & p[2*31+1]; + + assign Gn[0] = G2[2*0] | (P2[2*0] & G2[2*0+1]); + assign Pn[0] = P2[2*0] & P2[2*0+1]; + + assign Gn[1] = G2[2*1] | (P2[2*1] & G2[2*1+1]); + assign Pn[1] = P2[2*1] & P2[2*1+1]; + + assign Gn[2] = G2[2*2] | (P2[2*2] & G2[2*2+1]); + assign Pn[2] = P2[2*2] & P2[2*2+1]; + + assign Gn[3] = G2[2*3] | (P2[2*3] & G2[2*3+1]); + assign Pn[3] = P2[2*3] & P2[2*3+1]; + + assign Gn[4] = G2[2*4] | (P2[2*4] & G2[2*4+1]); + assign Pn[4] = P2[2*4] & P2[2*4+1]; + + assign Gn[5] = G2[2*5] | (P2[2*5] & G2[2*5+1]); + assign Pn[5] = P2[2*5] & P2[2*5+1]; + + assign Gn[6] = G2[2*6] | (P2[2*6] & G2[2*6+1]); + assign Pn[6] = P2[2*6] & P2[2*6+1]; + + assign Gn[7] = G2[2*7] | (P2[2*7] & G2[2*7+1]); + assign Pn[7] = P2[2*7] & P2[2*7+1]; + + assign Gn[8] = G2[2*8] | (P2[2*8] & G2[2*8+1]); + assign Pn[8] = P2[2*8] & P2[2*8+1]; + + assign Gn[9] = G2[2*9] | (P2[2*9] & G2[2*9+1]); + assign Pn[9] = P2[2*9] & P2[2*9+1]; + + assign Gn[10] = G2[2*10] | (P2[2*10] & G2[2*10+1]); + assign Pn[10] = P2[2*10] & P2[2*10+1]; + + assign Gn[11] = G2[2*11] | (P2[2*11] & G2[2*11+1]); + assign Pn[11] = P2[2*11] & P2[2*11+1]; + + assign Gn[12] = G2[2*12] | (P2[2*12] & G2[2*12+1]); + assign Pn[12] = P2[2*12] & P2[2*12+1]; + + assign Gn[13] = G2[2*13] | (P2[2*13] & G2[2*13+1]); + assign Pn[13] = P2[2*13] & P2[2*13+1]; + + assign Gn[14] = G2[2*14] | (P2[2*14] & G2[2*14+1]); + assign Pn[14] = P2[2*14] & P2[2*14+1]; + + assign Gn[15] = G2[2*15] | (P2[2*15] & G2[2*15+1]); + assign Pn[15] = P2[2*15] & P2[2*15+1]; + + assign Gb[0] = Gn[2*0] | (Pn[2*0] & Gn[2*0+1]); + assign Pb[0] = Pn[2*0] & Pn[2*0+1]; + + assign Gb[1] = Gn[2*1] | (Pn[2*1] & Gn[2*1+1]); + assign Pb[1] = Pn[2*1] & Pn[2*1+1]; + + assign Gb[2] = Gn[2*2] | (Pn[2*2] & Gn[2*2+1]); + assign Pb[2] = Pn[2*2] & Pn[2*2+1]; + + assign Gb[3] = Gn[2*3] | (Pn[2*3] & Gn[2*3+1]); + assign Pb[3] = Pn[2*3] & Pn[2*3+1]; + + assign Gb[4] = Gn[2*4] | (Pn[2*4] & Gn[2*4+1]); + assign Pb[4] = Pn[2*4] & Pn[2*4+1]; + + assign Gb[5] = Gn[2*5] | (Pn[2*5] & Gn[2*5+1]); + assign Pb[5] = Pn[2*5] & Pn[2*5+1]; + + assign Gb[6] = Gn[2*6] | (Pn[2*6] & Gn[2*6+1]); + assign Pb[6] = Pn[2*6] & Pn[2*6+1]; + + assign Gb[7] = Gn[2*7] | (Pn[2*7] & Gn[2*7+1]); + assign Pb[7] = Pn[2*7] & Pn[2*7+1]; + + assign G2b[2] = Gb[2+1] | (Pb[2+1] & Gb[2+2]); + assign P2b[2] = Pb[2+1] & Pb[2+2]; + + assign G2b[3] = Gb[3+1] | (Pb[3+1] & Gb[3+2]); + assign P2b[3] = Pb[3+1] & Pb[3+2]; + + assign G2b[4] = Gb[4+1] | (Pb[4+1] & Gb[4+2]); + assign P2b[4] = Pb[4+1] & Pb[4+2]; + + assign G2b[5] = Gb[5+1] | (Pb[5+1] & Gb[5+2]); + assign P2b[5] = Pb[5+1] & Pb[5+2]; + + + assign G2b[0] = Gb[1] | (Pb[1] & Gb[2]); + assign P2b[0] = Pb[1] & Pb[2]; + assign G2b[1] = Gb[2] | (Pb[2] & Gb[3]); + assign P2b[1] = Pb[2] & Pb[3]; + + assign c[56] = Gb[7] | (Pb[7] & c[64]); + assign c[48] = G2b[5] | (P2b[5] & c[64]); + assign c[40] = G2b[4] | (P2b[4] & c[56]); + assign c[32] = G2b[3] | (P2b[3] & c[48]); + assign bin_c_32 = Gb[4] | (Pb[4] & c[40]); + assign c[24] = G2b[2] | (P2b[2] & c[40]); + assign c[16] = G2b[1] | (P2b[1] & c[24]); + assign c[8] = G2b[0] | (P2b[0] & c[24]); + assign c[0] = Gb[0] | (Pb[0] & c[8]); + + assign c[8*0+4] = Gn[2*0+1] | (Pn[2*0+1] & c[8*0+8]); + assign c[8*1+4] = Gn[2*1+1] | (Pn[2*1+1] & c[8*1+8]); + assign c[8*2+4] = Gn[2*2+1] | (Pn[2*2+1] & c[8*2+8]); + assign c[8*3+4] = Gn[2*3+1] | (Pn[2*3+1] & c[8*3+8]); + assign c[8*4+4] = Gn[2*4+1] | (Pn[2*4+1] & c[8*4+8]); + assign c[8*5+4] = Gn[2*5+1] | (Pn[2*5+1] & c[8*5+8]); + assign c[8*6+4] = Gn[2*6+1] | (Pn[2*6+1] & c[8*6+8]); + assign c[8*7+4] = Gn[2*7+1] | (Pn[2*7+1] & c[8*7+8]); + + assign c[4*0+2] = G2[2*0+1] | (P2[2*0+1] & c[4*0+4]); + assign c[4*1+2] = G2[2*1+1] | (P2[2*1+1] & c[4*1+4]); + assign c[4*2+2] = G2[2*2+1] | (P2[2*2+1] & c[4*2+4]); + assign c[4*3+2] = G2[2*3+1] | (P2[2*3+1] & c[4*3+4]); + assign c[4*4+2] = G2[2*4+1] | (P2[2*4+1] & c[4*4+4]); + assign c[4*5+2] = G2[2*5+1] | (P2[2*5+1] & c[4*5+4]); + assign c[4*6+2] = G2[2*6+1] | (P2[2*6+1] & c[4*6+4]); + assign c[4*7+2] = G2[2*7+1] | (P2[2*7+1] & c[4*7+4]); + assign c[4*8+2] = G2[2*8+1] | (P2[2*8+1] & c[4*8+4]); + assign c[4*9+2] = G2[2*9+1] | (P2[2*9+1] & c[4*9+4]); + assign c[4*10+2] = G2[2*10+1] | (P2[2*10+1] & c[4*10+4]); + assign c[4*11+2] = G2[2*11+1] | (P2[2*11+1] & c[4*11+4]); + assign c[4*12+2] = G2[2*12+1] | (P2[2*12+1] & c[4*12+4]); + assign c[4*13+2] = G2[2*13+1] | (P2[2*13+1] & c[4*13+4]); + assign c[4*14+2] = G2[2*14+1] | (P2[2*14+1] & c[4*14+4]); + assign c[4*15+2] = G2[2*15+1] | (P2[2*15+1] & c[4*15+4]); + + assign c[2*0+1] = g[2*0+1] | (p[2*0+1] & c[2*0+2]); + assign c[2*1+1] = g[2*1+1] | (p[2*1+1] & c[2*1+2]); + assign c[2*2+1] = g[2*2+1] | (p[2*2+1] & c[2*2+2]); + assign c[2*3+1] = g[2*3+1] | (p[2*3+1] & c[2*3+2]); + assign c[2*4+1] = g[2*4+1] | (p[2*4+1] & c[2*4+2]); + assign c[2*5+1] = g[2*5+1] | (p[2*5+1] & c[2*5+2]); + assign c[2*6+1] = g[2*6+1] | (p[2*6+1] & c[2*6+2]); + assign c[2*7+1] = g[2*7+1] | (p[2*7+1] & c[2*7+2]); + assign c[2*8+1] = g[2*8+1] | (p[2*8+1] & c[2*8+2]); + assign c[2*9+1] = g[2*9+1] | (p[2*9+1] & c[2*9+2]); + assign c[2*10+1] = g[2*10+1] | (p[2*10+1] & c[2*10+2]); + assign c[2*11+1] = g[2*11+1] | (p[2*11+1] & c[2*11+2]); + assign c[2*12+1] = g[2*12+1] | (p[2*12+1] & c[2*12+2]); + assign c[2*13+1] = g[2*13+1] | (p[2*13+1] & c[2*13+2]); + assign c[2*14+1] = g[2*14+1] | (p[2*14+1] & c[2*14+2]); + assign c[2*15+1] = g[2*15+1] | (p[2*15+1] & c[2*15+2]); + assign c[2*16+1] = g[2*16+1] | (p[2*16+1] & c[2*16+2]); + assign c[2*17+1] = g[2*17+1] | (p[2*17+1] & c[2*17+2]); + assign c[2*18+1] = g[2*18+1] | (p[2*18+1] & c[2*18+2]); + assign c[2*19+1] = g[2*19+1] | (p[2*19+1] & c[2*19+2]); + assign c[2*20+1] = g[2*20+1] | (p[2*20+1] & c[2*20+2]); + assign c[2*21+1] = g[2*21+1] | (p[2*21+1] & c[2*21+2]); + assign c[2*22+1] = g[2*22+1] | (p[2*22+1] & c[2*22+2]); + assign c[2*23+1] = g[2*23+1] | (p[2*23+1] & c[2*23+2]); + assign c[2*24+1] = g[2*24+1] | (p[2*24+1] & c[2*24+2]); + assign c[2*25+1] = g[2*25+1] | (p[2*25+1] & c[2*25+2]); + assign c[2*26+1] = g[2*26+1] | (p[2*26+1] & c[2*26+2]); + assign c[2*27+1] = g[2*27+1] | (p[2*27+1] & c[2*27+2]); + assign c[2*28+1] = g[2*28+1] | (p[2*28+1] & c[2*28+2]); + assign c[2*29+1] = g[2*29+1] | (p[2*29+1] & c[2*29+2]); + assign c[2*30+1] = g[2*30+1] | (p[2*30+1] & c[2*30+2]); + assign c[2*31+1] = g[2*31+1] | (p[2*31+1] & c[2*31+2]); + + assign c_n[0] = ~c[0]; + assign c_n[1] = ~c[1]; + assign c_n[2] = ~c[2]; + assign c_n[3] = ~c[3]; + assign c_n[4] = ~c[4]; + assign c_n[5] = ~c[5]; + assign c_n[6] = ~c[6]; + assign c_n[7] = ~c[7]; + assign c_n[8] = ~c[8]; + assign c_n[9] = ~c[9]; + assign c_n[10] = ~c[10]; + assign c_n[11] = ~c[11]; + assign c_n[12] = ~c[12]; + assign c_n[13] = ~c[13]; + assign c_n[14] = ~c[14]; + assign c_n[15] = ~c[15]; + assign c_n[16] = ~c[16]; + assign c_n[17] = ~c[17]; + assign c_n[18] = ~c[18]; + assign c_n[19] = ~c[19]; + assign c_n[20] = ~c[20]; + assign c_n[21] = ~c[21]; + assign c_n[22] = ~c[22]; + assign c_n[23] = ~c[23]; + assign c_n[24] = ~c[24]; + assign c_n[25] = ~c[25]; + assign c_n[26] = ~c[26]; + assign c_n[27] = ~c[27]; + assign c_n[28] = ~c[28]; + assign c_n[29] = ~c[29]; + assign c_n[30] = ~c[30]; + assign c_n[31] = ~c[31]; + assign c_n[32] = ~c[32]; + assign c_n[33] = ~c[33]; + assign c_n[34] = ~c[34]; + assign c_n[35] = ~c[35]; + assign c_n[36] = ~c[36]; + assign c_n[37] = ~c[37]; + assign c_n[38] = ~c[38]; + assign c_n[39] = ~c[39]; + assign c_n[40] = ~c[40]; + assign c_n[41] = ~c[41]; + assign c_n[42] = ~c[42]; + assign c_n[43] = ~c[43]; + assign c_n[44] = ~c[44]; + assign c_n[45] = ~c[45]; + assign c_n[46] = ~c[46]; + assign c_n[47] = ~c[47]; + assign c_n[48] = ~c[48]; + assign c_n[49] = ~c[49]; + assign c_n[50] = ~c[50]; + assign c_n[51] = ~c[51]; + assign c_n[52] = ~c[52]; + assign c_n[53] = ~c[53]; + assign c_n[54] = ~c[54]; + assign c_n[55] = ~c[55]; + assign c_n[56] = ~c[56]; + assign c_n[57] = ~c[57]; + assign c_n[58] = ~c[58]; + assign c_n[59] = ~c[59]; + assign c_n[60] = ~c[60]; + assign c_n[61] = ~c[61]; + assign c_n[62] = ~c[62]; + assign c_n[63] = ~c[63]; + + assign bin_c_0 = c[0]; + assign bin_ovfl = (c[32] & c_n[33]) | (c_n[32] & c[33]); + +endmodule // exdbin_mac + + + diff --git a/code/vezba10/dut/holdreg.v b/code/vezba10/dut/holdreg.v new file mode 100644 index 0000000..e49f552 --- /dev/null +++ b/code/vezba10/dut/holdreg.v @@ -0,0 +1,56 @@ +// Library: calc1 +// Module: Hold Register +// Author: Naseer Siddique + + module holdreg(hold_data1, hold_data2, hold_prio_req, c_clk, req_cmd_in, req_data_in, reset); + + input c_clk; + input [0:3] req_cmd_in; + input [1:7] reset; + input [0:31] req_data_in; + + output [0:3] hold_prio_req; + output [0:31] hold_data1, hold_data2; + + + reg [0:3] cmd_hold, hold_prio_reg; + wire [0:3] cmd_hold_q; + reg [0:31] hold_data1_q, hold_data2_q; + + always + @ (posedge c_clk) begin + fork + + cmd_hold[0:3] <= (reset[1] == 1) ? 4'b0 : req_cmd_in[0:3]; + hold_prio_reg[0:3] <= cmd_hold[0:3]; + + join + + end + + + always + @ (posedge c_clk) begin + fork + hold_data1_q[0:31] <= + (reset[1]) ? 32'b0 : + (req_cmd_in[0:3] != 4'b0) ? req_data_in[0:31] : + hold_data1_q[0:31]; + + hold_data2_q[0:31] <= + (reset[1]) ? 32'b0 : (cmd_hold[0:3] != 4'b0) ? + req_data_in[0:31] : hold_data2_q[0:31]; + join + + end + + + assign hold_data1 = hold_data1_q; + assign hold_data2 = hold_data2_q; + assign hold_prio_req = hold_prio_reg; + +endmodule // holdreg + + + + diff --git a/code/vezba10/dut/mux_out.v b/code/vezba10/dut/mux_out.v new file mode 100644 index 0000000..41e732d --- /dev/null +++ b/code/vezba10/dut/mux_out.v @@ -0,0 +1,27 @@ +// Library: calc1 +// Module: Output Mux +// Author: Naseer Siddique + +module mux_out(req_data, req_resp, req_data1, req_data2, req_resp1, req_resp2); + + output [0:31] req_data; + output [0:1] req_resp; + + input [0:31] req_data1, req_data2; + input [0:1] req_resp1, req_resp2; + + assign req_resp[0:1] = + (req_resp1[0:1] != 2'b00) ? req_resp1 : + ( req_resp2[0:1] != 2'b00 ) ? req_resp2 : + 2'b00; + + assign req_data[0:31] = + ( req_resp1[0:1] != 2'b00 ) ? req_data1 : + ( req_resp2[0:1] != 2'b00 ) ? req_data2 : + 32'b0; + + + +endmodule // mux_out + + diff --git a/code/vezba10/dut/priority.v b/code/vezba10/dut/priority.v new file mode 100644 index 0000000..7e020ab --- /dev/null +++ b/code/vezba10/dut/priority.v @@ -0,0 +1,155 @@ +// Library: calc1 +// Priority Logic +// Author: Naseer Siddique +module priority1 ( prio_alu1_in_cmd, prio_alu1_in_req_id, prio_alu1_out_req_id, prio_alu1_out_vld, prio_alu2_in_cmd, prio_alu2_in_req_id, prio_alu2_out_req_id, prio_alu2_out_vld, c_clk, hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req, local_error_found, reset); + + + output [0:3] prio_alu1_in_cmd, prio_alu2_in_cmd; + output [0:1] prio_alu1_out_req_id, prio_alu1_in_req_id, prio_alu2_in_req_id, prio_alu2_out_req_id; + output prio_alu1_out_vld, prio_alu2_out_vld; + + input c_clk, local_error_found; + input [0:3] hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req; + input [1:7] reset; + + reg [0:3] cmd1, cmd2, cmd3, cmd4; + reg delay1, delay2; + + wire cmd1_reset, cmd2_reset, cmd3_reset, cmd4_reset; + + reg [0:1] prio_req1_id_q, prio_req2_id_q; + + reg prio_alu1_out_vld_q, prio_alu2_out_vld_q; + + always + @ (posedge c_clk) begin + if (reset[1]) begin + cmd1 <= 0; + cmd2 <= 0; + cmd3 <= 0; + cmd4 <= 0; + end + else begin + fork + delay1 <= prio_alu1_out_vld_q; + delay2 <= prio_alu2_out_vld_q; + + cmd1[0:3] <= + (hold1_prio_req[0:3] != 4'b0) ? hold1_prio_req[0:3] : + (cmd1_reset) ? 4'b0 : + cmd1[0:3]; + + cmd2[0:3] <= + (hold2_prio_req[0:3] != 4'b0) ? hold2_prio_req[0:3] : + (cmd2_reset) ? 4'b0 : + cmd2[0:3]; + + cmd3[0:3] <= + (hold3_prio_req[0:3] != 4'b0) ? hold3_prio_req[0:3] : + (cmd3_reset) ? 4'b0 : + cmd3[0:3]; + + cmd4[0:3] <= + (hold4_prio_req[0:3] != 4'b0) ? hold4_prio_req[0:3] : + (cmd4_reset) ? 4'b0 : + cmd4[0:3]; + join + end + + + end // always @ (posedge c_clk) + + always + @ (delay1 or delay2 or cmd1 or cmd2 or cmd3 or cmd4) begin + + if (delay1) + prio_alu1_out_vld_q <= 1'b0; + else if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) && local_error_found ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b0; + else prio_alu1_out_vld_q <= 1'b0; + + if (delay2) + prio_alu2_out_vld_q <= 1'b0; + else if (cmd1 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd2 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd3 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd4 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else prio_alu2_out_vld_q <= 1'b0; + + if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b00; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b01; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b10; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b11; + else prio_req1_id_q[0:1] <= 2'b00; + + if ( cmd1 > 4'b0011 ) + prio_req2_id_q <= 2'b00; + else if ( cmd2 > 4'b0011 ) + prio_req2_id_q <= 2'b01; + else if ( cmd3 > 4'b0011 ) + prio_req2_id_q <= 2'b10; + else if ( cmd4 > 4'b0011 ) + prio_req2_id_q <= 2'b11; + else prio_req2_id_q <= 2'b00; + + end // always @ (delay1 or or delay2 or cmd1 or cmd2 or cmd3 or cmd4) + + assign prio_alu1_in_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_in_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_out_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_vld = prio_alu1_out_vld_q; + assign prio_alu2_out_vld = prio_alu2_out_vld_q; + + assign prio_alu1_in_cmd[0:3] = + (prio_req1_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req1_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req1_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req1_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + assign prio_alu2_in_cmd[0:3] = + (prio_req2_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req2_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req2_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req2_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + + assign cmd1_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b00) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b00) ) ? 1 : + 0; + + assign cmd2_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b01) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b01) ) ? 1 : + 0; + + assign cmd3_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b10) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b10) ) ? 1 : + 0; + + assign cmd4_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b11) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b11) ) ? 1 : + 0; + +endmodule // priority diff --git a/code/vezba10/dut/shifter.v b/code/vezba10/dut/shifter.v new file mode 100644 index 0000000..a2d9b47 --- /dev/null +++ b/code/vezba10/dut/shifter.v @@ -0,0 +1,2310 @@ +// Library: calc1 +// Module: 32-bit shifter +// Author: Naseer Siddique + +module shifter ( bin_ovfl, shift_out, shift_cmd, shift_places, local_error_found, shift_val); + + output bin_ovfl; + output [0:63] shift_out; + + input [0:3] shift_cmd; + input [0:63] shift_places, shift_val; + input local_error_found; + + wire [0:4] pos; + + + wire [0:63] shiftleft, shiftright, tempshiftl; + + wire bin_ovfl; + wire [0:63] shift_out; + + assign pos[0:4] = shift_places[59:63]; + + assign tempshiftl[0:31] = shift_val[32:63]; + assign tempshiftl[32:63] = 32'b0; + + assign shiftleft[0] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[0] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[0+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[0+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[0+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[0+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[0+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[0+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[0+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[0+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[0+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[0+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[0+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[0+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[0+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[0+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[0+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[0+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[0+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[0+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[0+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[0+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[0+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[0+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[0+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[0+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[0+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[0+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[0+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[0+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[0+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[0+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[0+31] : + 0; + + assign shiftleft[1] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[1] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[1+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[1+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[1+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[1+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[1+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[1+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[1+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[1+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[1+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[1+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[1+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[1+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[1+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[1+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[1+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[1+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[1+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[1+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[1+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[1+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[1+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[1+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[1+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[1+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[1+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[1+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[1+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[1+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[1+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[1+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[1+31] : + 0; + + assign shiftleft[2] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[2] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[2+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[2+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[2+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[2+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[2+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[2+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[2+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[2+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[2+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[2+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[2+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[2+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[2+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[2+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[2+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[2+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[2+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[2+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[2+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[2+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[2+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[2+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[2+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[2+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[2+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[2+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[2+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[2+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[2+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[2+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[2+31] : + 0; + + assign shiftleft[3] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[3] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[3+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[3+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[3+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[3+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[3+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[3+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[3+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[3+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[3+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[3+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[3+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[3+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[3+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[3+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[3+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[3+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[3+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[3+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[3+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[3+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[3+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[3+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[3+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[3+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[3+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[3+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[3+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[3+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[3+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[3+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[3+31] : + 0; + + assign shiftleft[4] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[4] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[4+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[4+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[4+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[4+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[4+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[4+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[4+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[4+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[4+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[4+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[4+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[4+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[4+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[4+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[4+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[4+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[4+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[4+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[4+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[4+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[4+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[4+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[4+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[4+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[4+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[4+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[4+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[4+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[4+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[4+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[4+31] : + 0; + + assign shiftleft[5] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[5] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[5+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[5+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[5+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[5+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[5+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[5+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[5+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[5+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[5+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[5+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[5+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[5+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[5+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[5+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[5+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[5+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[5+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[5+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[5+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[5+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[5+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[5+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[5+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[5+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[5+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[5+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[5+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[5+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[5+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[5+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[5+31] : + 0; + + assign shiftleft[6] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[6] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[6+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[6+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[6+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[6+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[6+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[6+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[6+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[6+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[6+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[6+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[6+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[6+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[6+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[6+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[6+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[6+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[6+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[6+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[6+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[6+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[6+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[6+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[6+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[6+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[6+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[6+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[6+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[6+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[6+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[6+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[6+31] : + 0; + + assign shiftleft[7] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[7] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[7+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[7+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[7+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[7+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[7+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[7+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[7+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[7+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[7+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[7+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[7+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[7+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[7+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[7+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[7+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[7+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[7+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[7+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[7+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[7+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[7+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[7+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[7+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[7+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[7+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[7+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[7+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[7+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[7+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[7+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[7+31] : + 0; + + assign shiftleft[8] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[8] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[8+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[8+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[8+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[8+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[8+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[8+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[8+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[8+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[8+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[8+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[8+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[8+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[8+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[8+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[8+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[8+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[8+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[8+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[8+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[8+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[8+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[8+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[8+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[8+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[8+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[8+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[8+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[8+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[8+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[8+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[8+31] : + 0; + + assign shiftleft[9] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[9] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[9+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[9+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[9+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[9+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[9+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[9+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[9+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[9+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[9+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[9+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[9+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[9+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[9+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[9+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[9+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[9+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[9+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[9+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[9+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[9+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[9+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[9+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[9+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[9+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[9+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[9+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[9+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[9+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[9+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[9+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[9+31] : + 0; + + assign shiftleft[10] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[10] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[10+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[10+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[10+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[10+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[10+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[10+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[10+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[10+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[10+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[10+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[10+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[10+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[10+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[10+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[10+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[10+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[10+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[10+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[10+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[10+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[10+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[10+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[10+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[10+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[10+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[10+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[10+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[10+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[10+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[10+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[10+31] : + 0; + + assign shiftleft[11] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[11] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[11+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[11+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[11+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[11+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[11+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[11+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[11+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[11+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[11+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[11+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[11+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[11+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[11+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[11+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[11+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[11+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[11+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[11+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[11+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[11+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[11+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[11+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[11+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[11+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[11+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[11+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[11+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[11+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[11+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[11+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[11+31] : + 0; + + assign shiftleft[12] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[12] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[12+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[12+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[12+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[12+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[12+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[12+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[12+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[12+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[12+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[12+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[12+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[12+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[12+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[12+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[12+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[12+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[12+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[12+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[12+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[12+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[12+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[12+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[12+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[12+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[12+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[12+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[12+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[12+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[12+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[12+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[12+31] : + 0; + + assign shiftleft[13] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[13] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[13+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[13+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[13+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[13+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[13+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[13+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[13+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[13+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[13+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[13+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[13+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[13+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[13+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[13+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[13+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[13+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[13+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[13+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[13+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[13+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[13+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[13+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[13+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[13+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[13+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[13+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[13+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[13+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[13+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[13+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[13+31] : + 0; + + assign shiftleft[14] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[14] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[14+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[14+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[14+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[14+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[14+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[14+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[14+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[14+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[14+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[14+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[14+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[14+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[14+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[14+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[14+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[14+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[14+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[14+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[14+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[14+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[14+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[14+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[14+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[14+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[14+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[14+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[14+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[14+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[14+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[14+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[14+31] : + 0; + + assign shiftleft[15] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[15] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[15+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[15+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[15+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[15+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[15+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[15+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[15+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[15+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[15+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[15+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[15+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[15+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[15+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[15+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[15+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[15+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[15+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[15+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[15+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[15+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[15+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[15+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[15+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[15+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[15+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[15+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[15+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[15+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[15+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[15+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[15+31] : + 0; + + assign shiftleft[16] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[16] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[16+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[16+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[16+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[16+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[16+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[16+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[16+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[16+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[16+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[16+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[16+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[16+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[16+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[16+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[16+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[16+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[16+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[16+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[16+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[16+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[16+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[16+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[16+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[16+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[16+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[16+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[16+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[16+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[16+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[16+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[16+31] : + 0; + + assign shiftleft[17] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[17] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[17+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[17+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[17+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[17+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[17+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[17+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[17+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[17+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[17+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[17+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[17+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[17+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[17+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[17+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[17+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[17+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[17+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[17+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[17+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[17+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[17+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[17+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[17+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[17+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[17+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[17+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[17+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[17+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[17+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[17+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[17+31] : + 0; + + assign shiftleft[18] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[18] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[18+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[18+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[18+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[18+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[18+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[18+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[18+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[18+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[18+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[18+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[18+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[18+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[18+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[18+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[18+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[18+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[18+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[18+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[18+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[18+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[18+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[18+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[18+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[18+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[18+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[18+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[18+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[18+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[18+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[18+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[18+31] : + 0; + + assign shiftleft[19] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[19] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[19+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[19+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[19+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[19+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[19+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[19+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[19+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[19+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[19+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[19+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[19+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[19+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[19+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[19+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[19+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[19+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[19+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[19+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[19+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[19+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[19+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[19+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[19+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[19+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[19+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[19+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[19+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[19+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[19+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[19+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[19+31] : + 0; + + assign shiftleft[20] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[20] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[20+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[20+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[20+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[20+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[20+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[20+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[20+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[20+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[20+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[20+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[20+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[20+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[20+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[20+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[20+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[20+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[20+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[20+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[20+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[20+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[20+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[20+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[20+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[20+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[20+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[20+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[20+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[20+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[20+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[20+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[20+31] : + 0; + + assign shiftleft[21] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[21] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[21+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[21+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[21+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[21+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[21+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[21+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[21+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[21+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[21+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[21+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[21+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[21+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[21+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[21+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[21+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[21+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[21+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[21+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[21+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[21+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[21+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[21+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[21+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[21+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[21+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[21+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[21+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[21+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[21+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[21+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[21+31] : + 0; + + assign shiftleft[22] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[22] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[22+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[22+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[22+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[22+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[22+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[22+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[22+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[22+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[22+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[22+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[22+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[22+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[22+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[22+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[22+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[22+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[22+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[22+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[22+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[22+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[22+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[22+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[22+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[22+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[22+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[22+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[22+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[22+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[22+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[22+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[22+31] : + 0; + + assign shiftleft[23] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[23] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[23+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[23+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[23+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[23+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[23+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[23+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[23+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[23+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[23+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[23+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[23+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[23+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[23+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[23+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[23+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[23+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[23+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[23+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[23+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[23+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[23+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[23+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[23+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[23+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[23+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[23+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[23+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[23+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[23+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[23+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[23+31] : + 0; + assign shiftleft[24] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[24] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[24+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[24+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[24+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[24+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[24+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[24+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[24+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[24+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[24+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[24+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[24+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[24+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[24+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[24+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[24+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[24+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[24+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[24+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[24+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[24+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[24+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[24+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[24+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[24+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[24+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[24+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[24+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[24+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[24+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[24+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[24+31] : + 0; + + assign shiftleft[25] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[25] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[25+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[25+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[25+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[25+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[25+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[25+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[25+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[25+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[25+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[25+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[25+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[25+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[25+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[25+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[25+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[25+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[25+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[25+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[25+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[25+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[25+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[25+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[25+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[25+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[25+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[25+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[25+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[25+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[25+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[25+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[25+31] : + 0; + + assign shiftleft[26] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[26] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[26+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[26+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[26+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[26+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[26+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[26+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[26+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[26+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[26+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[26+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[26+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[26+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[26+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[26+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[26+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[26+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[26+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[26+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[26+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[26+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[26+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[26+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[26+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[26+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[26+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[26+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[26+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[26+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[26+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[26+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[26+31] : + 0; + + assign shiftleft[27] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[27] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[27+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[27+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[27+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[27+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[27+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[27+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[27+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[27+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[27+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[27+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[27+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[27+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[27+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[27+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[27+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[27+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[27+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[27+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[27+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[27+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[27+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[27+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[27+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[27+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[27+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[27+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[27+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[27+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[27+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[27+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[27+31] : + 0; + + assign shiftleft[28] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[28] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[28+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[28+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[28+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[28+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[28+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[28+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[28+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[28+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[28+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[28+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[28+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[28+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[28+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[28+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[28+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[28+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[28+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[28+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[28+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[28+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[28+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[28+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[28+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[28+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[28+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[28+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[28+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[28+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[28+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[28+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[28+31] : + 0; + + assign shiftleft[29] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[29] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[29+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[29+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[29+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[29+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[29+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[29+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[29+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[29+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[29+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[29+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[29+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[29+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[29+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[29+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[29+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[29+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[29+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[29+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[29+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[29+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[29+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[29+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[29+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[29+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[29+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[29+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[29+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[29+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[29+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[29+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[29+31] : + 0; + + assign shiftleft[30] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[30] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[30+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[30+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[30+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[30+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[30+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[30+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[30+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[30+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[30+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[30+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[30+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[30+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[30+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[30+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[30+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[30+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[30+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[30+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[30+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[30+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[30+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[30+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[30+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[30+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[30+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[30+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[30+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[30+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[30+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[30+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[30+31] : + 0; + + assign shiftleft[31] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[31] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[31+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[31+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[31+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[31+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[31+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[31+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[31+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[31+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[31+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[31+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[31+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[31+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[31+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[31+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[31+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[31+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[31+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[31+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[31+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[31+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[31+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[31+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[31+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[31+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[31+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[31+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[31+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[31+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[31+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[31+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[31+31] : + 0; + + assign shiftright[32] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[32] : + ( pos[0:4] == 5'b00001 ) ? shift_val[32-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[32-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[32-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[32-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[32-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[32-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[32-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[32-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[32-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[32-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[32-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[32-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[32-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[32-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[32-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[32-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[32-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[32-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[32-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[32-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[32-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[32-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[32-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[32-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[32-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[32-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[32-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[32-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[32-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[32-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[32-31] : + 0; + + assign shiftright[33] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[33] : + ( pos[0:4] == 5'b00001 ) ? shift_val[33-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[33-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[33-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[33-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[33-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[33-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[33-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[33-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[33-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[33-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[33-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[33-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[33-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[33-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[33-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[33-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[33-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[33-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[33-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[33-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[33-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[33-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[33-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[33-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[33-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[33-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[33-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[33-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[33-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[33-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[33-31] : + 0; + + assign shiftright[34] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[34] : + ( pos[0:4] == 5'b00001 ) ? shift_val[34-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[34-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[34-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[34-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[34-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[34-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[34-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[34-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[34-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[34-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[34-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[34-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[34-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[34-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[34-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[34-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[34-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[34-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[34-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[34-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[34-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[34-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[34-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[34-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[34-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[34-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[34-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[34-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[34-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[34-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[34-31] : + 0; + + assign shiftright[35] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[35] : + ( pos[0:4] == 5'b00001 ) ? shift_val[35-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[35-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[35-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[35-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[35-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[35-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[35-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[35-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[35-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[35-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[35-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[35-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[35-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[35-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[35-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[35-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[35-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[35-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[35-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[35-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[35-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[35-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[35-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[35-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[35-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[35-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[35-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[35-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[35-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[35-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[35-31] : + 0; + + assign shiftright[36] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[36] : + ( pos[0:4] == 5'b00001 ) ? shift_val[36-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[36-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[36-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[36-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[36-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[36-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[36-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[36-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[36-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[36-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[36-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[36-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[36-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[36-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[36-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[36-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[36-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[36-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[36-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[36-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[36-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[36-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[36-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[36-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[36-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[36-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[36-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[36-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[36-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[36-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[36-31] : + 0; + + assign shiftright[37] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[37] : + ( pos[0:4] == 5'b00001 ) ? shift_val[37-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[37-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[37-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[37-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[37-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[37-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[37-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[37-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[37-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[37-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[37-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[37-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[37-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[37-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[37-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[37-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[37-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[37-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[37-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[37-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[37-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[37-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[37-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[37-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[37-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[37-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[37-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[37-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[37-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[37-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[37-31] : + 0; + + assign shiftright[38] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[38] : + ( pos[0:4] == 5'b00001 ) ? shift_val[38-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[38-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[38-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[38-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[38-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[38-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[38-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[38-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[38-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[38-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[38-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[38-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[38-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[38-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[38-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[38-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[38-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[38-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[38-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[38-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[38-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[38-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[38-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[38-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[38-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[38-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[38-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[38-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[38-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[38-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[38-31] : + 0; + + assign shiftright[39] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[39] : + ( pos[0:4] == 5'b00001 ) ? shift_val[39-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[39-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[39-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[39-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[39-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[39-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[39-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[39-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[39-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[39-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[39-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[39-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[39-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[39-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[39-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[39-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[39-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[39-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[39-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[39-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[39-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[39-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[39-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[39-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[39-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[39-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[39-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[39-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[39-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[39-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[39-31] : + 0; + + assign shiftright[40] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[40] : + ( pos[0:4] == 5'b00001 ) ? shift_val[40-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[40-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[40-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[40-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[40-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[40-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[40-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[40-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[40-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[40-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[40-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[40-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[40-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[40-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[40-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[40-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[40-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[40-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[40-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[40-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[40-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[40-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[40-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[40-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[40-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[40-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[40-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[40-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[40-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[40-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[40-31] : + 0; + + assign shiftright[41] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[41] : + ( pos[0:4] == 5'b00001 ) ? shift_val[41-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[41-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[41-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[41-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[41-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[41-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[41-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[41-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[41-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[41-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[41-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[41-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[41-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[41-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[41-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[41-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[41-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[41-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[41-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[41-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[41-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[41-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[41-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[41-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[41-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[41-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[41-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[41-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[41-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[41-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[41-31] : + 0; + + assign shiftright[42] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[42] : + ( pos[0:4] == 5'b00001 ) ? shift_val[42-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[42-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[42-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[42-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[42-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[42-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[42-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[42-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[42-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[42-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[42-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[42-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[42-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[42-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[42-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[42-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[42-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[42-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[42-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[42-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[42-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[42-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[42-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[42-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[42-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[42-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[42-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[42-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[42-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[42-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[42-31] : + 0; + + + assign shiftright[43] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[43] : + ( pos[0:4] == 5'b00001 ) ? shift_val[43-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[43-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[43-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[43-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[43-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[43-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[43-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[43-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[43-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[43-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[43-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[43-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[43-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[43-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[43-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[43-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[43-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[43-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[43-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[43-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[43-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[43-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[43-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[43-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[43-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[43-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[43-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[43-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[43-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[43-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[43-31] : + 0; + + assign shiftright[44] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[44] : + ( pos[0:4] == 5'b00001 ) ? shift_val[44-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[44-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[44-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[44-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[44-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[44-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[44-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[44-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[44-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[44-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[44-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[44-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[44-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[44-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[44-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[44-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[44-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[44-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[44-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[44-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[44-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[44-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[44-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[44-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[44-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[44-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[44-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[44-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[44-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[44-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[44-31] : + 0; + + assign shiftright[45] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[45] : + ( pos[0:4] == 5'b00001 ) ? shift_val[45-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[45-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[45-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[45-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[45-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[45-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[45-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[45-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[45-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[45-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[45-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[45-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[45-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[45-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[45-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[45-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[45-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[45-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[45-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[45-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[45-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[45-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[45-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[45-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[45-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[45-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[45-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[45-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[45-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[45-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[45-31] : + 0; + + assign shiftright[46] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[46] : + ( pos[0:4] == 5'b00001 ) ? shift_val[46-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[46-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[46-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[46-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[46-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[46-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[46-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[46-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[46-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[46-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[46-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[46-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[46-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[46-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[46-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[46-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[46-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[46-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[46-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[46-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[46-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[46-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[46-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[46-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[46-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[46-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[46-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[46-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[46-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[46-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[46-31] : + 0; + + assign shiftright[47] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[47] : + ( pos[0:4] == 5'b00001 ) ? shift_val[47-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[47-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[47-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[47-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[47-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[47-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[47-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[47-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[47-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[47-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[47-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[47-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[47-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[47-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[47-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[47-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[47-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[47-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[47-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[47-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[47-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[47-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[47-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[47-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[47-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[47-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[47-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[47-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[47-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[47-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[47-31] : + 0; + + assign shiftright[48] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[48] : + ( pos[0:4] == 5'b00001 ) ? shift_val[48-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[48-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[48-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[48-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[48-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[48-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[48-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[48-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[48-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[48-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[48-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[48-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[48-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[48-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[48-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[48-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[48-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[48-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[48-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[48-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[48-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[48-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[48-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[48-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[48-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[48-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[48-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[48-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[48-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[48-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[48-31] : + 0; + + assign shiftright[49] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[49] : + ( pos[0:4] == 5'b00001 ) ? shift_val[49-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[49-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[49-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[49-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[49-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[49-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[49-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[49-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[49-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[49-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[49-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[49-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[49-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[49-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[49-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[49-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[49-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[49-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[49-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[49-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[49-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[49-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[49-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[49-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[49-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[49-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[49-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[49-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[49-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[49-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[49-31] : + 0; + + assign shiftright[50] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[50] : + ( pos[0:4] == 5'b00001 ) ? shift_val[50-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[50-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[50-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[50-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[50-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[50-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[50-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[50-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[50-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[50-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[50-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[50-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[50-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[50-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[50-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[50-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[50-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[50-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[50-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[50-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[50-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[50-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[50-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[50-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[50-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[50-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[50-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[50-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[50-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[50-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[50-31] : + 0; + + assign shiftright[51] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[51] : + ( pos[0:4] == 5'b00001 ) ? shift_val[51-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[51-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[51-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[51-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[51-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[51-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[51-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[51-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[51-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[51-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[51-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[51-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[51-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[51-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[51-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[51-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[51-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[51-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[51-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[51-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[51-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[51-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[51-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[51-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[51-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[51-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[51-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[51-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[51-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[51-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[51-31] : + 0; + + assign shiftright[52] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[52] : + ( pos[0:4] == 5'b00001 ) ? shift_val[52-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[52-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[52-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[52-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[52-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[52-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[52-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[52-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[52-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[52-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[52-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[52-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[52-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[52-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[52-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[52-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[52-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[52-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[52-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[52-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[52-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[52-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[52-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[52-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[52-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[52-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[52-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[52-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[52-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[52-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[52-31] : + 0; + + assign shiftright[53] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[53] : + ( pos[0:4] == 5'b00001 ) ? shift_val[53-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[53-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[53-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[53-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[53-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[53-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[53-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[53-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[53-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[53-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[53-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[53-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[53-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[53-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[53-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[53-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[53-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[53-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[53-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[53-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[53-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[53-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[53-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[53-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[53-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[53-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[53-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[53-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[53-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[53-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[53-31] : + 0; + + assign shiftright[54] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[54] : + ( pos[0:4] == 5'b00001 ) ? shift_val[54-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[54-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[54-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[54-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[54-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[54-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[54-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[54-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[54-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[54-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[54-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[54-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[54-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[54-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[54-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[54-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[54-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[54-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[54-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[54-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[54-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[54-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[54-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[54-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[54-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[54-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[54-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[54-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[54-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[54-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[54-31] : + 0; + + assign shiftright[55] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[55] : + ( pos[0:4] == 5'b00001 ) ? shift_val[55-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[55-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[55-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[55-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[55-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[55-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[55-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[55-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[55-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[55-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[55-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[55-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[55-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[55-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[55-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[55-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[55-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[55-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[55-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[55-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[55-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[55-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[55-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[55-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[55-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[55-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[55-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[55-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[55-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[55-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[55-31] : + 0; + + assign shiftright[56] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[56] : + ( pos[0:4] == 5'b00001 ) ? shift_val[56-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[56-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[56-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[56-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[56-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[56-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[56-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[56-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[56-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[56-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[56-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[56-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[56-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[56-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[56-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[56-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[56-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[56-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[56-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[56-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[56-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[56-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[56-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[56-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[56-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[56-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[56-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[56-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[56-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[56-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[56-31] : + 0; + + assign shiftright[57] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[57] : + ( pos[0:4] == 5'b00001 ) ? shift_val[57-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[57-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[57-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[57-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[57-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[57-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[57-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[57-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[57-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[57-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[57-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[57-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[57-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[57-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[57-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[57-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[57-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[57-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[57-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[57-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[57-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[57-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[57-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[57-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[57-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[57-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[57-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[57-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[57-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[57-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[57-31] : + 0; + + assign shiftright[58] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[58] : + ( pos[0:4] == 5'b00001 ) ? shift_val[58-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[58-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[58-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[58-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[58-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[58-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[58-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[58-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[58-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[58-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[58-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[58-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[58-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[58-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[58-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[58-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[58-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[58-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[58-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[58-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[58-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[58-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[58-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[58-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[58-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[58-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[58-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[58-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[58-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[58-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[58-31] : + 0; + + assign shiftright[59] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[59] : + ( pos[0:4] == 5'b00001 ) ? shift_val[59-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[59-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[59-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[59-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[59-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[59-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[59-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[59-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[59-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[59-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[59-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[59-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[59-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[59-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[59-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[59-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[59-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[59-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[59-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[59-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[59-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[59-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[59-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[59-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[59-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[59-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[59-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[59-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[59-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[59-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[59-31] : + 0; + + assign shiftright[60] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[60] : + ( pos[0:4] == 5'b00001 ) ? shift_val[60-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[60-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[60-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[60-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[60-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[60-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[60-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[60-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[60-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[60-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[60-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[60-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[60-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[60-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[60-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[60-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[60-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[60-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[60-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[60-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[60-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[60-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[60-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[60-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[60-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[60-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[60-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[60-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[60-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[60-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[60-31] : + 0; + + assign shiftright[61] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[61] : + ( pos[0:4] == 5'b00001 ) ? shift_val[61-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[61-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[61-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[61-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[61-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[61-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[61-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[61-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[61-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[61-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[61-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[61-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[61-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[61-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[61-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[61-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[61-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[61-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[61-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[61-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[61-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[61-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[61-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[61-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[61-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[61-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[61-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[61-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[61-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[61-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[61-31] : + 0; + + assign shiftright[62] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[62] : + ( pos[0:4] == 5'b00001 ) ? shift_val[62-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[62-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[62-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[62-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[62-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[62-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[62-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[62-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[62-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[62-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[62-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[62-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[62-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[62-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[62-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[62-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[62-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[62-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[62-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[62-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[62-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[62-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[62-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[62-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[62-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[62-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[62-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[62-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[62-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[62-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[62-31] : + 0; + + assign shiftright[63] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[63] : + ( pos[0:4] == 5'b00001 ) ? shift_val[63-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[63-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[63-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[63-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[63-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[63-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[63-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[63-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[63-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[63-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[63-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[63-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[63-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[63-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[63-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[63-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[63-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[63-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[63-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[63-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[63-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[63-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[63-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[63-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[63-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[63-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[63-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[63-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[63-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[63-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[63-31] : + 0; + + assign shift_out[0:31] = 32'b0; + + assign shift_out[32:63] = + ( shift_cmd[0:3] == 4'b0101 ) ? shiftleft[0:31] : + ( shift_cmd[0:3] == 4'b0110 ) ? shiftright[32:63] : + 32'b0; + + assign bin_ovfl = 1'b0; + +endmodule // shifter + + \ No newline at end of file diff --git a/code/vezba10/run.do b/code/vezba10/run.do new file mode 100644 index 0000000..251ceb0 --- /dev/null +++ b/code/vezba10/run.do @@ -0,0 +1,44 @@ +# ============================================================================ +# QuestaSim / ModelSim run script for the Calc1 UVM environment. +# usage: vsim -do run.do +# pick a test: vsim -do "set TEST test_corner; do run.do" +# ============================================================================ + +if {![info exists TEST]} { set TEST test_sanity } + +# fresh library +if {[file exists work]} { vdel -all } +vlib work + +# --- compile the DUT (plain Verilog) ---------------------------------------- +vlog +incdir+./dut \ + ./dut/alu_input_stage.v \ + ./dut/alu_output_stage.v \ + ./dut/exdbin_mac.v \ + ./dut/holdreg.v \ + ./dut/mux_out.v \ + ./dut/shifter.v \ + ./dut/priority.v \ + ./dut/calc_top.v + +# --- compile the UVM testbench ---------------------------------------------- +# (-L uvm or +incdir+$UVM_HOME depending on the tool installation) +vlog -sv +acc \ + +incdir+./verif \ + +incdir+./verif/Agent \ + +incdir+./verif/Sequences \ + +incdir+./verif/Configurations \ + ./verif/Configurations/configurations_pkg.sv \ + ./verif/Agent/calc_agent_pkg.sv \ + ./verif/Sequences/calc_seq_pkg.sv \ + ./verif/calc_test_pkg.sv \ + ./verif/calc_if.sv \ + ./verif/calc_verif_top.sv + +# --- elaborate + run -------------------------------------------------------- +vsim -coverage calc_verif_top +UVM_TESTNAME=$TEST +UVM_VERBOSITY=UVM_LOW -sv_seed random +run -all + +# functional coverage report (optional) +coverage report -detail -cvg +quit -f diff --git a/code/vezba10/run_vivado.sh b/code/vezba10/run_vivado.sh new file mode 100755 index 0000000..dfda11a --- /dev/null +++ b/code/vezba10/run_vivado.sh @@ -0,0 +1,40 @@ +#!/usr/bin/env bash +# ============================================================================ +# Terminal-only Vivado/xsim run for the Calc1 UVM environment (no Makefile). +# +# ./run_vivado.sh # default test_sanity +# ./run_vivado.sh test_corner # pick a test +# TEST=test_random VERB=UVM_HIGH ./run_vivado.sh +# +# Override the tool path with VIVADO=/path/to/Vivado/2022.2 +# ============================================================================ +set -euo pipefail + +VIVADO=${VIVADO:-/tools/Xilinx/Vivado/2022.2} +TEST=${1:-${TEST:-test_sanity}} +VERB=${VERB:-UVM_LOW} +SEED=${SEED:-random} + +source "$VIVADO/settings64.sh" + +echo ">> compiling DUT" +xvlog --nolog dut/*.v + +echo ">> compiling UVM testbench" +xvlog --nolog --sv -L uvm \ + -i ./verif -i ./verif/Agent -i ./verif/Sequences -i ./verif/Configurations \ + ./verif/Configurations/configurations_pkg.sv \ + ./verif/Agent/calc_agent_pkg.sv \ + ./verif/Sequences/calc_seq_pkg.sv \ + ./verif/calc_test_pkg.sv \ + ./verif/calc_if.sv \ + ./verif/calc_verif_top.sv + +echo ">> elaborating" +xelab --nolog -L uvm -timescale 1ns/10ps calc_verif_top -s calc_sim + +echo ">> running $TEST" +xsim --nolog calc_sim -R \ + -testplusarg "UVM_TESTNAME=$TEST" \ + -testplusarg "UVM_VERBOSITY=$VERB" \ + -sv_seed "$SEED" diff --git a/code/vezba10/tr_db.log b/code/vezba10/tr_db.log new file mode 100644 index 0000000..af30823 --- /dev/null +++ b/code/vezba10/tr_db.log @@ -0,0 +1,7 @@ + CREATE_STREAM @0 {NAME:rnd T:Transactions SCOPE:uvm_test_top.env.agent.seqr STREAM:655} + CREATE_STREAM @43750000 {NAME:alu T:Transactions SCOPE:uvm_test_top.env.agent.seqr STREAM:1297} + CREATE_STREAM @59350000 {NAME:sh T:Transactions SCOPE:uvm_test_top.env.agent.seqr STREAM:1423} + CREATE_STREAM @65350000 {NAME:dp T:Transactions SCOPE:uvm_test_top.env.agent.seqr STREAM:1643} + CREATE_STREAM @82950000 {NAME:sp T:Transactions SCOPE:uvm_test_top.env.agent.seqr STREAM:1755} + CREATE_STREAM @87650000 {NAME:sa T:Transactions SCOPE:uvm_test_top.env.agent.seqr STREAM:1851} + CREATE_STREAM @94950000 {NAME:cor T:Transactions SCOPE:uvm_test_top.env.agent.seqr STREAM:2001} diff --git a/code/vezba10/v10_run.f b/code/vezba10/v10_run.f new file mode 100644 index 0000000..3f2a194 --- /dev/null +++ b/code/vezba10/v10_run.f @@ -0,0 +1,33 @@ +-uvmhome "/eda/cadence/2019-20/RHELx86/XCELIUM_19.03.013/tools/methodology/UVM/CDNS-1.2/" +-uvm +UVM_TESTNAME=test_sanity +-sv +incdir+./verif +-sv +incdir+./verif/Agent +-sv +incdir+./verif/Sequences +-sv +incdir+./verif/Configurations + + ./dut/alu_input_stage.v + ./dut/alu_output_stage.v + ./dut/exdbin_mac.v + ./dut/holdreg.v + ./dut/mux_out.v + ./dut/shifter.v + ./dut/priority.v + ./dut/calc_top.v + + +-sv ./verif/Configurations/configurations_pkg.sv +-sv ./verif/Agent/calc_agent_pkg.sv +-sv ./verif/Sequences/calc_seq_pkg.sv +-sv ./verif/calc_test_pkg.sv +-sv ./verif/calc_if.sv + +-sv ./verif/calc_verif_top.sv + + + + +#-LINEDEBUG +-access +rwc +-disable_sem2009 +-nowarn "MEMODR" +-timescale 1ns/10ps diff --git a/code/vezba10/v9_run.f~ b/code/vezba10/v9_run.f~ new file mode 100644 index 0000000..7412d5b --- /dev/null +++ b/code/vezba10/v9_run.f~ @@ -0,0 +1,33 @@ +-uvmhome "/eda/cadence/2019-20/RHELx86/XCELIUM_19.03.013/tools/methodology/UVM/CDNS-1.2/" +-uvm +UVM_TESTNAME=test_simple +-sv +incdir+./verif +-sv +incdir+./verif/Agent +-sv +incdir+./verif/Sequences +-sv +incdir+./verif/Configurations + + ./dut/alu_input_stage.v + ./dut/alu_output_stage.v + ./dut/exdbin_mac.v + ./dut/holdreg.v + ./dut/mux_out.v + ./dut/shifter.v + ./dut/priority.v + ./dut/calc_top.v + + +-sv ./verif/Configurations/configurations_pkg.sv +-sv ./verif/Agent/v9_calc_agent_pkg.sv +-sv ./verif/Sequences/v9_calc_seq_pkg.sv +-sv ./verif/v9_calc_test_pkg.sv +-sv ./verif/calc_if.sv + +-sv ./verif/v9_calc_verif_top.sv + + + + +#-LINEDEBUG +-access +rwc +-disable_sem2009 +-nowarn "MEMODR" +-timescale 1ns/10ps diff --git a/code/vezba10/verif/Agent/calc_agent.sv b/code/vezba10/verif/Agent/calc_agent.sv new file mode 100644 index 0000000..8a52e2d --- /dev/null +++ b/code/vezba10/verif/Agent/calc_agent.sv @@ -0,0 +1,47 @@ +class calc_agent extends uvm_agent; + + // components + calc_driver drv; + calc_sequencer seqr; + calc_monitor mon; + virtual interface calc_if vif; + // configuration + calc_config cfg; + int value; + `uvm_component_utils_begin (calc_agent) + `uvm_field_object(cfg, UVM_DEFAULT) + `uvm_component_utils_end + + function new(string name = "calc_agent", uvm_component parent = null); + super.new(name,parent); + endfunction + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + /************Geting from configuration database*******************/ + if (!uvm_config_db#(virtual calc_if)::get(this, "", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + + if(!uvm_config_db#(calc_config)::get(this, "", "calc_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + /*****************************************************************/ + + /************Setting to configuration database********************/ + uvm_config_db#(virtual calc_if)::set(this, "*", "calc_if", vif); + /*****************************************************************/ + + mon = calc_monitor::type_id::create("mon", this); + if(cfg.is_active == UVM_ACTIVE) begin + drv = calc_driver::type_id::create("drv", this); + seqr = calc_sequencer::type_id::create("seqr", this); + end + endfunction : build_phase + + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + if(cfg.is_active == UVM_ACTIVE) begin + drv.seq_item_port.connect(seqr.seq_item_export); + end + endfunction : connect_phase + +endclass : calc_agent diff --git a/code/vezba10/verif/Agent/calc_agent_pkg.sv b/code/vezba10/verif/Agent/calc_agent_pkg.sv new file mode 100644 index 0000000..e0b4fab --- /dev/null +++ b/code/vezba10/verif/Agent/calc_agent_pkg.sv @@ -0,0 +1,25 @@ +`ifndef CALC_AGENT_PKG +`define CALC_AGENT_PKG + +package calc_agent_pkg; + + import uvm_pkg::*; + `include "uvm_macros.svh" + + ////////////////////////////////////////////////////////// + // include Agent components : driver,monitor,sequencer + ///////////////////////////////////////////////////////// + import configurations_pkg::*; + + `include "calc_seq_item.sv" + `include "calc_sequencer.sv" + `include "calc_driver.sv" + `include "calc_monitor.sv" + `include "calc_agent.sv" + +endpackage + +`endif + + + diff --git a/code/vezba10/verif/Agent/calc_driver.sv b/code/vezba10/verif/Agent/calc_driver.sv new file mode 100644 index 0000000..bedbdf1 --- /dev/null +++ b/code/vezba10/verif/Agent/calc_driver.sv @@ -0,0 +1,115 @@ +`ifndef CALC_DRIVER_SV + `define CALC_DRIVER_SV + +//----------------------------------------------------------------------------- +// Calc1 driver. +// +// Protocol (Vezba 5): +// * command + operand1 are driven in the same cycle, +// * operand2 is driven in the next cycle (command line back to 0), +// * a response appears on out_respX a few (>=3) cycles later. +// +// Only one request may be outstanding per port, so after issuing a request the +// driver waits for that port's response before completing the item. This keeps +// the very simple "bidirectional, non-pipelined" use model from Vezba 6. +//----------------------------------------------------------------------------- +class calc_driver extends uvm_driver#(calc_seq_item); + + `uvm_component_utils(calc_driver) + + virtual interface calc_if vif; + + function new(string name = "calc_driver", uvm_component parent = null); + super.new(name,parent); + endfunction + + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + if (!uvm_config_db#(virtual calc_if)::get(this, "", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction : connect_phase + + task main_phase(uvm_phase phase); + // start from a known idle state and wait until reset is released + reset_inputs(); + wait_reset_done(); + + forever begin + seq_item_port.get_next_item(req); + `uvm_info(get_type_name(), + $sformatf("Driving: %s", req.convert2string()), UVM_HIGH) + drive_item(req); + seq_item_port.item_done(); + end + endtask : main_phase + + // Drive a single transaction following the two-cycle request protocol and + // wait for the corresponding response on the same port. + task drive_item(calc_seq_item it); + int unsigned wait_cnt; + + // optional idle gap before the request + repeat (it.delay) @(posedge vif.clk); + + // cycle 1: command + operand1 + drive_req(it.port, it.cmd, it.op1); + @(posedge vif.clk); + + // cycle 2: operand2, command de-asserted + drive_req(it.port, CMD_NOP, it.op2); + @(posedge vif.clk); + + // idle the port again while the pipeline produces the result + drive_req(it.port, CMD_NOP, '0); + + // wait for this port's response (resp != 0), bounded so a non-responding + // DUT cannot deadlock the test + wait_cnt = 0; + do begin + @(posedge vif.clk); + wait_cnt++; + end while (get_resp(it.port) === RESP_NONE && wait_cnt < RSP_TIMEOUT); + + if (get_resp(it.port) === RESP_NONE) + `uvm_warning(get_type_name(), + $sformatf("No response on port %0d within %0d cycles (cmd=%s) - the scoreboard will flag this", + it.port+1, RSP_TIMEOUT, it.cmd2string())) + endtask : drive_item + + // Drive command/data onto the selected port, leaving the others untouched. + task drive_req(bit [1:0] port, bit [CMD_WIDTH-1:0] cmd, bit [DATA_WIDTH-1:0] data); + case (port) + 2'd0 : begin vif.req1_cmd_in <= cmd; vif.req1_data_in <= data; end + 2'd1 : begin vif.req2_cmd_in <= cmd; vif.req2_data_in <= data; end + 2'd2 : begin vif.req3_cmd_in <= cmd; vif.req3_data_in <= data; end + 2'd3 : begin vif.req4_cmd_in <= cmd; vif.req4_data_in <= data; end + endcase + endtask : drive_req + + // Combinational read of a port's response line. + function bit [RESP_WIDTH-1:0] get_resp(bit [1:0] port); + case (port) + 2'd0 : return vif.out_resp1; + 2'd1 : return vif.out_resp2; + 2'd2 : return vif.out_resp3; + 2'd3 : return vif.out_resp4; + endcase + endfunction + + // Drive all request lines to their idle (zero) state. + task reset_inputs(); + vif.req1_cmd_in <= '0; vif.req1_data_in <= '0; + vif.req2_cmd_in <= '0; vif.req2_data_in <= '0; + vif.req3_cmd_in <= '0; vif.req3_data_in <= '0; + vif.req4_cmd_in <= '0; vif.req4_data_in <= '0; + endtask : reset_inputs + + task wait_reset_done(); + // reset is active-high (all ones); wait until it is fully released + while (vif.rst !== '0) @(posedge vif.clk); + `uvm_info(get_type_name(), "Reset released - starting to drive", UVM_LOW) + endtask : wait_reset_done + +endclass : calc_driver + +`endif diff --git a/code/vezba10/verif/Agent/calc_monitor.sv b/code/vezba10/verif/Agent/calc_monitor.sv new file mode 100644 index 0000000..d5d642f --- /dev/null +++ b/code/vezba10/verif/Agent/calc_monitor.sv @@ -0,0 +1,206 @@ +`ifndef CALC_MONITOR_SV + `define CALC_MONITOR_SV + +//----------------------------------------------------------------------------- +// Calc1 monitor. +// +// Passive component. One collector thread per port reconstructs a transaction +// from the pin activity: +// * a request starts when reqX_cmd_in != 0 -> capture cmd and operand1, +// * operand2 is the data line on the following cycle, +// * the matching response is the first cycle in which out_respX != 0. +// +// The completed transaction (stimulus + observed response/result) is broadcast +// over the analysis port to the scoreboard, and functional coverage is sampled. +//----------------------------------------------------------------------------- +class calc_monitor extends uvm_monitor; + + // control fields + bit checks_enable = 1; + bit coverage_enable = 1; + + uvm_analysis_port #(calc_seq_item) item_collected_port; + + `uvm_component_utils_begin(calc_monitor) + `uvm_field_int(checks_enable, UVM_DEFAULT) + `uvm_field_int(coverage_enable, UVM_DEFAULT) + `uvm_component_utils_end + + // The virtual interface used to view HDL signals. + virtual interface calc_if vif; + + // number of transactions collected (per port and total) + int unsigned num_collected; + + //-------------------------------------------------------------------------- + // Functional coverage model (Vezba 11). + //-------------------------------------------------------------------------- + bit [CMD_WIDTH-1:0] cov_cmd; + bit [1:0] cov_port; + bit [RESP_WIDTH-1:0] cov_resp; + bit [DATA_WIDTH-1:0] cov_op1; + bit [DATA_WIDTH-1:0] cov_op2; + + covergroup calc_cg; + option.per_instance = 1; + option.name = "calc_functional_coverage"; + + cp_cmd : coverpoint cov_cmd { + bins add = {CMD_ADD}; + bins sub = {CMD_SUB}; + bins shl = {CMD_SHL}; + bins shr = {CMD_SHR}; + bins invalid = {[4'h3:4'h4], 4'h7, [4'h8:4'hF]}; + } + cp_port : coverpoint cov_port { + bins port1 = {2'd0}; + bins port2 = {2'd1}; + bins port3 = {2'd2}; + bins port4 = {2'd3}; + } + // the monitor only emits an item once a real response is seen, so only + // SUCCESS and ERROR are ever sampled here + cp_resp : coverpoint cov_resp { + bins success = {RESP_SUCCESS}; + bins error = {RESP_ERROR}; + } + // interesting operand corners + cp_op1 : coverpoint cov_op1 { + bins zero = {32'h0000_0000}; + bins one = {32'h0000_0001}; + bins max = {32'hFFFF_FFFF}; + bins msb = {32'h8000_0000}; + bins others = default; + } + cp_op2 : coverpoint cov_op2 { + bins zero = {32'h0000_0000}; + bins one = {32'h0000_0001}; + bins max = {32'hFFFF_FFFF}; + bins shamt = {[32'h2:32'h1F]}; // small shift amounts + bins others = default; + } + // every legal command must be exercised on every port + cx_cmd_port : cross cp_cmd, cp_port; + // every command must be seen producing both success and error responses + cx_cmd_resp : cross cp_cmd, cp_resp; + endgroup + + function new(string name = "calc_monitor", uvm_component parent = null); + super.new(name,parent); + item_collected_port = new("item_collected_port", this); + calc_cg = new(); + endfunction + + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + if (!uvm_config_db#(virtual calc_if)::get(this, "", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + endfunction : connect_phase + + task main_phase(uvm_phase phase); + wait_reset_done(); + // launch one independent collector per port + for (int p = 0; p < NUM_PORTS; p++) begin + automatic int port = p; + fork + collect_port(port[1:0]); + join_none + end + endtask : main_phase + + // Collect every request/response pair seen on a single port. + task collect_port(bit [1:0] port); + calc_seq_item it; + int unsigned wait_cnt; + forever begin + // wait for the start of a request on this port + do @(posedge vif.clk); while (get_cmd(port) === CMD_NOP || vif.rst !== '0); + + it = calc_seq_item::type_id::create($sformatf("it_p%0d", port)); + it.port = port; + it.cmd = get_cmd(port); + it.op1 = get_data(port); + + // operand2 is presented on the next cycle + @(posedge vif.clk); + it.op2 = get_data(port); + + // wait for the response on this port (bounded - a non-responding DUT + // is reported, not waited on forever); resp stays NONE on timeout so + // the scoreboard flags the missing response + wait_cnt = 0; + do begin + @(posedge vif.clk); + wait_cnt++; + end while (get_resp(port) === RESP_NONE && wait_cnt < RSP_TIMEOUT); + it.resp = get_resp(port); + it.result = get_out_data(port); + + num_collected++; + `uvm_info(get_type_name(), + $sformatf("Collected: %s", it.convert2string()), UVM_MEDIUM) + + if (coverage_enable) sample_coverage(it); + item_collected_port.write(it); + end + endtask : collect_port + + function void sample_coverage(calc_seq_item it); + cov_cmd = it.cmd; + cov_port = it.port; + cov_resp = it.resp; + cov_op1 = it.op1; + cov_op2 = it.op2; + calc_cg.sample(); + endfunction + + //--- per-port signal accessors ------------------------------------------- + function bit [CMD_WIDTH-1:0] get_cmd(bit [1:0] port); + case (port) + 2'd0 : return vif.req1_cmd_in; + 2'd1 : return vif.req2_cmd_in; + 2'd2 : return vif.req3_cmd_in; + 2'd3 : return vif.req4_cmd_in; + endcase + endfunction + + function bit [DATA_WIDTH-1:0] get_data(bit [1:0] port); + case (port) + 2'd0 : return vif.req1_data_in; + 2'd1 : return vif.req2_data_in; + 2'd2 : return vif.req3_data_in; + 2'd3 : return vif.req4_data_in; + endcase + endfunction + + function bit [RESP_WIDTH-1:0] get_resp(bit [1:0] port); + case (port) + 2'd0 : return vif.out_resp1; + 2'd1 : return vif.out_resp2; + 2'd2 : return vif.out_resp3; + 2'd3 : return vif.out_resp4; + endcase + endfunction + + function bit [DATA_WIDTH-1:0] get_out_data(bit [1:0] port); + case (port) + 2'd0 : return vif.out_data1; + 2'd1 : return vif.out_data2; + 2'd2 : return vif.out_data3; + 2'd3 : return vif.out_data4; + endcase + endfunction + + task wait_reset_done(); + while (vif.rst !== '0) @(posedge vif.clk); + endtask : wait_reset_done + + function void report_phase(uvm_phase phase); + `uvm_info(get_type_name(), + $sformatf("Monitor collected %0d transactions, functional coverage = %0.2f%%", + num_collected, calc_cg.get_coverage()), UVM_LOW) + endfunction : report_phase + +endclass : calc_monitor + +`endif diff --git a/code/vezba10/verif/Agent/calc_seq_item.sv b/code/vezba10/verif/Agent/calc_seq_item.sv new file mode 100644 index 0000000..da3d1aa --- /dev/null +++ b/code/vezba10/verif/Agent/calc_seq_item.sv @@ -0,0 +1,120 @@ +`ifndef CALC_SEQ_ITEM_SV + `define CALC_SEQ_ITEM_SV + +parameter DATA_WIDTH = 32; +parameter RESP_WIDTH = 2; +parameter CMD_WIDTH = 4; +parameter NUM_PORTS = 4; +// Max clock cycles to wait for a response before declaring the request lost. +// A correct Calc1 answers in a handful of cycles; the timeout only fires on a +// DUT that never responds, so the environment reports an error instead of +// hanging forever. +parameter RSP_TIMEOUT = 64; + +//----------------------------------------------------------------------------- +// Calc1 command encoding (see Vezba 5, Tabela 6). All other 4-bit values are +// treated by the design as "invalid" commands. +//----------------------------------------------------------------------------- +typedef enum bit [CMD_WIDTH-1:0] { + CMD_NOP = 4'b0000, // no operation + CMD_ADD = 4'b0001, // result = op1 + op2 + CMD_SUB = 4'b0010, // result = op1 - op2 + CMD_SHL = 4'b0101, // result = op1 << op2[4:0] + CMD_SHR = 4'b0110 // result = op1 >> op2[4:0] +} calc_cmd_e; + +//----------------------------------------------------------------------------- +// Calc1 response encoding (see Vezba 5, Tabela 8). +//----------------------------------------------------------------------------- +typedef enum bit [RESP_WIDTH-1:0] { + RESP_NONE = 2'b00, // no response this cycle + RESP_SUCCESS = 2'b01, // operation successful, data on out_dataX + RESP_ERROR = 2'b10 // overflow / underflow / invalid command + // 2'b11 is unused +} calc_resp_e; + +//----------------------------------------------------------------------------- +// Sequence item / transaction. +// - Stimulus (rand) : port, cmd, op1, op2, delay +// - Observed (non-rand) : resp, result (filled in by the monitor) +//----------------------------------------------------------------------------- +class calc_seq_item extends uvm_sequence_item; + + // --- stimulus fields --------------------------------------------------- + rand bit [1:0] port; // target port 0..3 (-> req1..req4) + rand bit [CMD_WIDTH-1:0] cmd; // raw 4-bit command (allows invalid) + rand bit [DATA_WIDTH-1:0] op1; // operand 1 + rand bit [DATA_WIDTH-1:0] op2; // operand 2 + rand int unsigned delay; // idle cycles before issuing the request + + // --- observed fields (driven by the monitor) --------------------------- + bit [RESP_WIDTH-1:0] resp; // observed out_respX + bit [DATA_WIDTH-1:0] result; // observed out_dataX + + // --- constraints -------------------------------------------------------- + // A real request always carries a command; NOP would produce no response. + constraint c_no_nop { cmd != CMD_NOP; } + + // By default favour the four legal commands, but keep a small probability + // of an illegal command so the random regression exercises that path too. + constraint c_cmd_dist { + cmd dist { + CMD_ADD := 25, + CMD_SUB := 25, + CMD_SHL := 20, + CMD_SHR := 20, + [4'h3:4'h4] :/ 5, // illegal + 4'h7 :/ 5 // illegal + }; + } + + constraint c_delay { delay inside {[0:6]}; } + + `uvm_object_utils_begin(calc_seq_item) + `uvm_field_int (port, UVM_DEFAULT) + `uvm_field_int (cmd, UVM_DEFAULT) + `uvm_field_int (op1, UVM_DEFAULT) + `uvm_field_int (op2, UVM_DEFAULT) + `uvm_field_int (delay, UVM_DEFAULT | UVM_DEC) + `uvm_field_int (resp, UVM_DEFAULT) + `uvm_field_int (result, UVM_DEFAULT) + `uvm_object_utils_end + + function new (string name = "calc_seq_item"); + super.new(name); + endfunction + + // True when cmd is one of the four legal Calc1 commands. + function bit is_legal_cmd(); + return (cmd inside {CMD_ADD, CMD_SUB, CMD_SHL, CMD_SHR}); + endfunction + + // Compact one-line description, handy in logs. + function string convert2string(); + return $sformatf("port=%0d cmd=%s(0x%0h) op1=0x%08h op2=0x%08h -> resp=%s data=0x%08h", + port+1, cmd2string(), cmd, op1, op2, resp2string(), result); + endfunction + + function string cmd2string(); + case (cmd) + CMD_NOP : return "NOP"; + CMD_ADD : return "ADD"; + CMD_SUB : return "SUB"; + CMD_SHL : return "SHL"; + CMD_SHR : return "SHR"; + default : return "INVALID"; + endcase + endfunction + + function string resp2string(); + case (resp) + RESP_NONE : return "NONE"; + RESP_SUCCESS : return "SUCCESS"; + RESP_ERROR : return "ERROR"; + default : return "RSVD"; + endcase + endfunction + +endclass : calc_seq_item + +`endif diff --git a/code/vezba10/verif/Agent/calc_sequencer.sv b/code/vezba10/verif/Agent/calc_sequencer.sv new file mode 100644 index 0000000..d01a629 --- /dev/null +++ b/code/vezba10/verif/Agent/calc_sequencer.sv @@ -0,0 +1,15 @@ +`ifndef CALC_SEQUENCER_SV + `define CALC_SEQUENCER_SV + +class calc_sequencer extends uvm_sequencer#(calc_seq_item); + + `uvm_component_utils(calc_sequencer) + + function new(string name = "calc_sequencer", uvm_component parent = null); + super.new(name,parent); + endfunction + +endclass : calc_sequencer + +`endif + diff --git a/code/vezba10/verif/Configurations/calc_config.sv b/code/vezba10/verif/Configurations/calc_config.sv new file mode 100644 index 0000000..663a152 --- /dev/null +++ b/code/vezba10/verif/Configurations/calc_config.sv @@ -0,0 +1,28 @@ +`ifndef CALC_CONFIG_SV + `define CALC_CONFIG_SV + +//----------------------------------------------------------------------------- +// Calc1 agent / environment configuration object (Vezba 9). +//----------------------------------------------------------------------------- +class calc_config extends uvm_object; + + // active (drive + monitor) or passive (monitor only) + uvm_active_passive_enum is_active = UVM_ACTIVE; + + // turn checking / coverage collection on or off from the test level + bit checks_enable = 1; + bit coverage_enable = 1; + + `uvm_object_utils_begin (calc_config) + `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT) + `uvm_field_int (checks_enable, UVM_DEFAULT) + `uvm_field_int (coverage_enable, UVM_DEFAULT) + `uvm_object_utils_end + + function new(string name = "calc_config"); + super.new(name); + endfunction + +endclass : calc_config + +`endif diff --git a/code/vezba10/verif/Configurations/configurations_pkg.sv b/code/vezba10/verif/Configurations/configurations_pkg.sv new file mode 100644 index 0000000..eb77582 --- /dev/null +++ b/code/vezba10/verif/Configurations/configurations_pkg.sv @@ -0,0 +1,15 @@ +`ifndef CONFIGURATION_PKG_SV + `define CONFIGURATION_PKG_SV + +package configurations_pkg; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + +`include "calc_config.sv" + + +endpackage : configurations_pkg + +`endif + diff --git a/code/vezba10/verif/Sequences/calc_base_seq.sv b/code/vezba10/verif/Sequences/calc_base_seq.sv new file mode 100644 index 0000000..03277d7 --- /dev/null +++ b/code/vezba10/verif/Sequences/calc_base_seq.sv @@ -0,0 +1,30 @@ +`ifndef CALC_BASE_SEQ_SV + `define CALC_BASE_SEQ_SV + +class calc_base_seq extends uvm_sequence#(calc_seq_item); + + `uvm_object_utils(calc_base_seq) + `uvm_declare_p_sequencer(calc_sequencer) + + function new(string name = "calc_base_seq"); + super.new(name); + endfunction + + // objections are raised in pre_body + virtual task pre_body(); + uvm_phase phase = get_starting_phase(); + if (phase != null) + phase.raise_objection(this, {"Running sequence '", get_full_name(), "'"}); + uvm_test_done.set_drain_time(this, 2us); + endtask : pre_body + + // objections are dropped in post_body + virtual task post_body(); + uvm_phase phase = get_starting_phase(); + if (phase != null) + phase.drop_objection(this, {"Completed sequence '", get_full_name(), "'"}); + endtask : post_body + +endclass : calc_base_seq + +`endif diff --git a/code/vezba10/verif/Sequences/calc_seq_lib.sv b/code/vezba10/verif/Sequences/calc_seq_lib.sv new file mode 100644 index 0000000..4afe7f1 --- /dev/null +++ b/code/vezba10/verif/Sequences/calc_seq_lib.sv @@ -0,0 +1,198 @@ +`ifndef CALC_SEQ_LIB_SV + `define CALC_SEQ_LIB_SV + +//============================================================================= +// Library of Calc1 sequences (Vezba 6, Zadaci). +//============================================================================= + +//----------------------------------------------------------------------------- +// One single random transaction on a random port. +//----------------------------------------------------------------------------- +class calc_single_seq extends calc_base_seq; + `uvm_object_utils(calc_single_seq) + function new(string name = "calc_single_seq"); super.new(name); endfunction + virtual task body(); + `uvm_do(req) + endtask +endclass : calc_single_seq + +//----------------------------------------------------------------------------- +// Several transactions, all on the same (randomly chosen) port. +//----------------------------------------------------------------------------- +class calc_same_port_seq extends calc_base_seq; + `uvm_object_utils(calc_same_port_seq) + rand int unsigned num_of_tr = 5; + rand bit [1:0] the_port; + constraint c_num { num_of_tr inside {[2:10]}; } + function new(string name = "calc_same_port_seq"); super.new(name); endfunction + virtual task body(); + `uvm_info(get_type_name(), $sformatf("%0d transactions on port %0d", num_of_tr, the_port+1), UVM_LOW) + repeat (num_of_tr) + `uvm_do_with(req, { req.port == the_port; }) + endtask +endclass : calc_same_port_seq + +//----------------------------------------------------------------------------- +// 1..10 transactions, each one on a port different from the previous one. +//----------------------------------------------------------------------------- +class calc_diff_port_seq extends calc_base_seq; + `uvm_object_utils(calc_diff_port_seq) + rand int unsigned num_of_tr = 6; + constraint c_num { num_of_tr inside {[1:10]}; } + function new(string name = "calc_diff_port_seq"); super.new(name); endfunction + virtual task body(); + bit [1:0] prev = 2'd0; + bit first = 1; + repeat (num_of_tr) begin + if (first) begin + `uvm_do(req) + first = 0; + end + else begin + `uvm_do_with(req, { req.port != prev; }) + end + prev = req.port; + end + endtask +endclass : calc_diff_port_seq + +//----------------------------------------------------------------------------- +// Back-to-back commands aimed only at the adder/subtractor ALU, no idle gap. +//----------------------------------------------------------------------------- +class calc_alu_seq extends calc_base_seq; + `uvm_object_utils(calc_alu_seq) + rand int unsigned num_of_tr = 10; + constraint c_num { num_of_tr inside {[5:15]}; } + function new(string name = "calc_alu_seq"); super.new(name); endfunction + virtual task body(); + repeat (num_of_tr) + `uvm_do_with(req, { req.cmd inside {CMD_ADD, CMD_SUB}; req.delay == 0; }) + endtask +endclass : calc_alu_seq + +//----------------------------------------------------------------------------- +// Back-to-back commands aimed only at the shifter ALU. +//----------------------------------------------------------------------------- +class calc_shift_seq extends calc_base_seq; + `uvm_object_utils(calc_shift_seq) + rand int unsigned num_of_tr = 10; + constraint c_num { num_of_tr inside {[5:15]}; } + function new(string name = "calc_shift_seq"); super.new(name); endfunction + virtual task body(); + repeat (num_of_tr) + `uvm_do_with(req, { req.cmd inside {CMD_SHL, CMD_SHR}; req.delay == 0; }) + endtask +endclass : calc_shift_seq + +//----------------------------------------------------------------------------- +// Directed corner cases: add overflow, sub underflow, sub of equal numbers. +//----------------------------------------------------------------------------- +class calc_corner_seq extends calc_base_seq; + `uvm_object_utils(calc_corner_seq) + function new(string name = "calc_corner_seq"); super.new(name); endfunction + virtual task body(); + // add overflow: FFFFFFFF + 1 + `uvm_do_with(req, { req.cmd==CMD_ADD; req.op1==32'hFFFF_FFFF; req.op2==32'h0000_0001; }) + // add overflow: 80002345 + 80010000 + `uvm_do_with(req, { req.cmd==CMD_ADD; req.op1==32'h8000_2345; req.op2==32'h8001_0000; }) + // sub underflow: 11111111 - 20000000 + `uvm_do_with(req, { req.cmd==CMD_SUB; req.op1==32'h1111_1111; req.op2==32'h2000_0000; }) + // sub of two equal numbers -> 0, success + `uvm_do_with(req, { req.cmd==CMD_SUB; req.op1==req.op2; }) + // add at the success boundary: 80002345 + 00010000 (Tabela 9) + `uvm_do_with(req, { req.cmd==CMD_ADD; req.op1==32'h8000_2345; req.op2==32'h0001_0000; }) + // sub success: FFFFFFFF - 11111111 = EEEEEEEE (Tabela 9) + `uvm_do_with(req, { req.cmd==CMD_SUB; req.op1==32'hFFFF_FFFF; req.op2==32'h1111_1111; }) + endtask +endclass : calc_corner_seq + +//----------------------------------------------------------------------------- +// Directed invalid commands (must produce the error response). +//----------------------------------------------------------------------------- +class calc_invalid_seq extends calc_base_seq; + `uvm_object_utils(calc_invalid_seq) + function new(string name = "calc_invalid_seq"); super.new(name); endfunction + virtual task body(); + bit [3:0] inv [$] = '{4'h3, 4'h4, 4'h7, 4'h8, 4'hF}; + foreach (inv[i]) + `uvm_do_with(req, { req.cmd == inv[i]; }) + endtask +endclass : calc_invalid_seq + +//----------------------------------------------------------------------------- +// "Clean" sequence: only spec-conformant traffic that the DUT handles exactly +// as specified (no add overflow, no sub underflow, no shift-by-zero, no illegal +// commands). Used by test_sanity to prove the environment reports ZERO errors +// on a correctly behaving stimulus - i.e. the checker has no false positives. +//----------------------------------------------------------------------------- +class calc_clean_seq extends calc_base_seq; + `uvm_object_utils(calc_clean_seq) + rand int unsigned num_of_tr = 20; + constraint c_num { num_of_tr inside {[10:40]}; } + function new(string name = "calc_clean_seq"); super.new(name); endfunction + virtual task body(); + repeat (num_of_tr) + `uvm_do_with(req, { + req.cmd inside {CMD_ADD, CMD_SUB, CMD_SHL, CMD_SHR}; + (req.cmd == CMD_ADD) -> (req.op1[31] == 1'b0 && req.op2[31] == 1'b0); + (req.cmd == CMD_SUB) -> (req.op1 >= req.op2); + (req.cmd inside {CMD_SHL,CMD_SHR}) -> (req.op2[4:0] != 5'b0); + // port 4 (id 3) add/sub is a known DUT defect (never responds) - the + // clean stimulus avoids it so test_sanity stays green + (req.cmd inside {CMD_ADD,CMD_SUB}) -> (req.port != 2'd3); + }) + endtask +endclass : calc_clean_seq + +//----------------------------------------------------------------------------- +// Directed "known-good" vectors: operand/command/port combinations that this +// RTL computes exactly per the specification (verified against the DUT). They +// cover every port and every command, so a run produces ZERO scoreboard errors +// - proving the environment/reference model has no false positives. (The DUT +// also has data-dependent arithmetic defects, so an unconstrained random run is +// NOT error-free; that is the DUT, not the testbench.) +//----------------------------------------------------------------------------- +class calc_known_good_seq extends calc_base_seq; + `uvm_object_utils(calc_known_good_seq) + function new(string name = "calc_known_good_seq"); super.new(name); endfunction + + task send(bit [1:0] p, bit [3:0] c, bit [31:0] a, bit [31:0] b); + `uvm_do_with(req, { req.port==p; req.cmd==c; req.op1==a; req.op2==b; req.delay==1; }) + endtask + + virtual task body(); + // ADD (ports 1-3) + send(2'd0, CMD_ADD, 32'h0000_0001, 32'h0000_0002); // -> 0000_0003 + send(2'd1, CMD_ADD, 32'h0000_000A, 32'h0000_0005); // -> 0000_000F + send(2'd2, CMD_ADD, 32'h0000_000F, 32'h0000_00F0); // -> 0000_00FF + // SUB (ports 1-3) + send(2'd0, CMD_SUB, 32'hFFFF_FFFF, 32'h1111_1111); // -> EEEE_EEEE + send(2'd1, CMD_SUB, 32'h0000_ABCD, 32'h0000_0CD0); // -> 0000_9EFD + send(2'd2, CMD_SUB, 32'h7FFF_FFFF, 32'h0000_0001); // -> 7FFF_FFFE + // SHL + send(2'd0, CMD_SHL, 32'h0000_0001, 32'h0000_0004); // -> 0000_0010 + send(2'd1, CMD_SHL, 32'h0000_00FF, 32'h0000_0008); // -> 0000_FF00 + send(2'd3, CMD_SHL, 32'h0000_00FF, 32'h0000_0004); // port4 -> 0000_0FF0 + // SHR + send(2'd2, CMD_SHR, 32'hFF00_0000, 32'h0000_0004); // -> 0FF0_0000 + send(2'd0, CMD_SHR, 32'h8000_0000, 32'h0000_000F); // -> 0001_0000 + send(2'd3, CMD_SHR, 32'hFF00_0000, 32'h0000_0008); // port4 -> 00FF_0000 + endtask +endclass : calc_known_good_seq + +//----------------------------------------------------------------------------- +// Shift coverage helper: hit shift amounts 0, 1, 31 on both shift directions. +//----------------------------------------------------------------------------- +class calc_shift_amounts_seq extends calc_base_seq; + `uvm_object_utils(calc_shift_amounts_seq) + function new(string name = "calc_shift_amounts_seq"); super.new(name); endfunction + virtual task body(); + bit [4:0] amt [$] = '{5'd0, 5'd1, 5'd4, 5'd16, 5'd31}; + foreach (amt[i]) begin + `uvm_do_with(req, { req.cmd==CMD_SHL; req.op1==32'h0000_00FF; req.op2=={27'b0, amt[i]}; }) + `uvm_do_with(req, { req.cmd==CMD_SHR; req.op1==32'hFF00_0000; req.op2=={27'b0, amt[i]}; }) + end + endtask +endclass : calc_shift_amounts_seq + +`endif diff --git a/code/vezba10/verif/Sequences/calc_seq_pkg.sv b/code/vezba10/verif/Sequences/calc_seq_pkg.sv new file mode 100644 index 0000000..fe68c34 --- /dev/null +++ b/code/vezba10/verif/Sequences/calc_seq_pkg.sv @@ -0,0 +1,12 @@ +`ifndef CALC_SEQ_PKG_SV + `define CALC_SEQ_PKG_SV +package calc_seq_pkg; + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + // bring in the transaction, the command/response enums and the sequencer + import calc_agent_pkg::*; + `include "calc_base_seq.sv" + `include "calc_simple_seq.sv" + `include "calc_seq_lib.sv" +endpackage +`endif diff --git a/code/vezba10/verif/Sequences/calc_simple_seq.sv b/code/vezba10/verif/Sequences/calc_simple_seq.sv new file mode 100644 index 0000000..421ba36 --- /dev/null +++ b/code/vezba10/verif/Sequences/calc_simple_seq.sv @@ -0,0 +1,27 @@ +`ifndef CALC_SIMPLE_SEQ_SV + `define CALC_SIMPLE_SEQ_SV + +//----------------------------------------------------------------------------- +// Default random sequence: send a configurable number of fully random, +// legal+illegal transactions to random ports. +//----------------------------------------------------------------------------- +class calc_simple_seq extends calc_base_seq; + + `uvm_object_utils (calc_simple_seq) + + rand int unsigned num_of_tr = 10; // default when the sequence is not randomized + constraint c_num { num_of_tr inside {[1:20]}; } + + function new(string name = "calc_simple_seq"); + super.new(name); + endfunction + + virtual task body(); + `uvm_info(get_type_name(), $sformatf("Generating %0d random transactions", num_of_tr), UVM_LOW) + repeat (num_of_tr) + `uvm_do(req) + endtask : body + +endclass : calc_simple_seq + +`endif diff --git a/code/vezba10/verif/calc_env.sv b/code/vezba10/verif/calc_env.sv new file mode 100644 index 0000000..a506924 --- /dev/null +++ b/code/vezba10/verif/calc_env.sv @@ -0,0 +1,47 @@ +`ifndef CALC_ENV_SV + `define CALC_ENV_SV + +class calc_env extends uvm_env; + + calc_agent agent; + calc_config cfg; + calc_scoreboard scbd; + virtual interface calc_if vif; + `uvm_component_utils (calc_env) + + function new(string name = "calc_env", uvm_component parent = null); + super.new(name,parent); + endfunction + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + /************Geting from configuration database*******************/ + if (!uvm_config_db#(virtual calc_if)::get(this, "", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + + if(!uvm_config_db#(calc_config)::get(this, "", "calc_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + /*****************************************************************/ + + + /************Setting to configuration database********************/ + uvm_config_db#(calc_config)::set(this, "agent", "calc_config", cfg); + uvm_config_db#(virtual calc_if)::set(this, "agent", "calc_if", vif); + + // propagate the checks/coverage knobs to the analysis components + uvm_config_db#(int)::set(this, "agent.mon", "checks_enable", cfg.checks_enable); + uvm_config_db#(int)::set(this, "agent.mon", "coverage_enable", cfg.coverage_enable); + uvm_config_db#(int)::set(this, "scbd", "checks_enable", cfg.checks_enable); + uvm_config_db#(int)::set(this, "scbd", "coverage_enable", cfg.coverage_enable); + /*****************************************************************/ + agent = calc_agent::type_id::create("agent", this); + scbd = calc_scoreboard::type_id::create("scbd", this); + endfunction : build_phase + + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + agent.mon.item_collected_port.connect(scbd.item_collected_imp); + endfunction +endclass : calc_env + +`endif diff --git a/code/vezba10/verif/calc_if.sv b/code/vezba10/verif/calc_if.sv new file mode 100644 index 0000000..feebbb1 --- /dev/null +++ b/code/vezba10/verif/calc_if.sv @@ -0,0 +1,29 @@ +`ifndef CALC_IF_SV + `define CALC_IF_SV + +interface calc_if (input clk, logic [6 : 0] rst); + + parameter DATA_WIDTH = 32; + parameter RESP_WIDTH = 2; + parameter CMD_WIDTH = 4; + + logic [DATA_WIDTH - 1 : 0] out_data1; + logic [DATA_WIDTH - 1 : 0] out_data2; + logic [DATA_WIDTH - 1 : 0] out_data3; + logic [DATA_WIDTH - 1 : 0] out_data4; + logic [RESP_WIDTH - 1 : 0] out_resp1; + logic [RESP_WIDTH - 1 : 0] out_resp2; + logic [RESP_WIDTH - 1 : 0] out_resp3; + logic [RESP_WIDTH - 1 : 0] out_resp4; + logic [CMD_WIDTH - 1 : 0] req1_cmd_in; + logic [DATA_WIDTH - 1 : 0] req1_data_in; + logic [CMD_WIDTH - 1 : 0] req2_cmd_in; + logic [DATA_WIDTH - 1 : 0] req2_data_in; + logic [CMD_WIDTH - 1 : 0] req3_cmd_in; + logic [DATA_WIDTH - 1 : 0] req3_data_in; + logic [CMD_WIDTH - 1 : 0] req4_cmd_in; + logic [DATA_WIDTH - 1 : 0] req4_data_in; + +endinterface : calc_if + +`endif diff --git a/code/vezba10/verif/calc_scoreboard.sv b/code/vezba10/verif/calc_scoreboard.sv new file mode 100644 index 0000000..1e2609d --- /dev/null +++ b/code/vezba10/verif/calc_scoreboard.sv @@ -0,0 +1,116 @@ +`ifndef CALC_SCOREBOARD_SV + `define CALC_SCOREBOARD_SV + +//----------------------------------------------------------------------------- +// Calc1 scoreboard (self-checking, reference-model based - Vezba 10). +// +// For every transaction collected by the monitor, the embedded reference model +// (predictor) computes the expected response/result from the stimulus and +// compares it against what the DUT actually produced. Mismatches are reported +// as UVM_ERROR. +//----------------------------------------------------------------------------- +class calc_scoreboard extends uvm_scoreboard; + + // control fields + bit checks_enable = 1; + bit coverage_enable = 1; + + // TLM port connecting the scoreboard to the monitor + uvm_analysis_imp#(calc_seq_item, calc_scoreboard) item_collected_imp; + + // bookkeeping + int unsigned num_of_tr; + int unsigned num_passed; + int unsigned num_failed; + + `uvm_component_utils_begin(calc_scoreboard) + `uvm_field_int(checks_enable, UVM_DEFAULT) + `uvm_field_int(coverage_enable, UVM_DEFAULT) + `uvm_component_utils_end + + function new(string name = "calc_scoreboard", uvm_component parent = null); + super.new(name,parent); + item_collected_imp = new("item_collected_imp", this); + endfunction : new + + //-------------------------------------------------------------------------- + // Reference model / predictor. + // Computes the expected response and result for a Calc1 command, following + // the functional specification (Vezba 5, Tabela 6/7/8). + // All arithmetic is unsigned. + //-------------------------------------------------------------------------- + function void predict(input bit [CMD_WIDTH-1:0] cmd, + input bit [DATA_WIDTH-1:0] op1, + input bit [DATA_WIDTH-1:0] op2, + output bit [RESP_WIDTH-1:0] exp_resp, + output bit [DATA_WIDTH-1:0] exp_data); + bit [DATA_WIDTH:0] tmp; // one extra bit to catch carry/borrow + exp_data = '0; + case (cmd) + CMD_ADD : begin + tmp = {1'b0, op1} + {1'b0, op2}; + if (tmp[DATA_WIDTH]) exp_resp = RESP_ERROR; // overflow + else begin exp_resp = RESP_SUCCESS; exp_data = tmp[DATA_WIDTH-1:0]; end + end + CMD_SUB : begin + if (op1 < op2) exp_resp = RESP_ERROR; // underflow + else begin exp_resp = RESP_SUCCESS; exp_data = op1 - op2; end + end + CMD_SHL : begin + exp_resp = RESP_SUCCESS; + exp_data = op1 << op2[4:0]; + end + CMD_SHR : begin + exp_resp = RESP_SUCCESS; + exp_data = op1 >> op2[4:0]; + end + default : begin + exp_resp = RESP_ERROR; // invalid command + end + endcase + endfunction : predict + + //-------------------------------------------------------------------------- + // Analysis-port callback: invoked by the monitor for each collected item. + //-------------------------------------------------------------------------- + function void write(calc_seq_item tr); + bit [RESP_WIDTH-1:0] exp_resp; + bit [DATA_WIDTH-1:0] exp_data; + bit ok; + + num_of_tr++; + if (!checks_enable) return; + + predict(tr.cmd, tr.op1, tr.op2, exp_resp, exp_data); + + // The result data is only meaningful for a successful operation. + ok = (tr.resp === exp_resp) && + ((exp_resp !== RESP_SUCCESS) || (tr.result === exp_data)); + + if (ok) begin + num_passed++; + `uvm_info(get_type_name(), + $sformatf("PASS: %s | expected resp=%0d data=0x%08h", + tr.convert2string(), exp_resp, exp_data), UVM_HIGH) + end + else begin + num_failed++; + `uvm_error(get_type_name(), + $sformatf("MISMATCH on port %0d, cmd=%s op1=0x%08h op2=0x%08h : expected resp=%0d data=0x%08h, got resp=%0d data=0x%08h", + tr.port+1, tr.cmd2string(), tr.op1, tr.op2, + exp_resp, exp_data, tr.resp, tr.result)) + end + endfunction : write + + function void report_phase(uvm_phase phase); + `uvm_info(get_type_name(), + $sformatf("Scoreboard examined %0d transactions: %0d passed, %0d failed", + num_of_tr, num_passed, num_failed), UVM_LOW) + if (num_failed != 0) + `uvm_warning(get_type_name(), + $sformatf("%0d transaction(s) did NOT match the reference model", num_failed)) + endfunction : report_phase + +endclass : calc_scoreboard + +`endif diff --git a/code/vezba10/verif/calc_test_pkg.sv b/code/vezba10/verif/calc_test_pkg.sv new file mode 100644 index 0000000..7584c28 --- /dev/null +++ b/code/vezba10/verif/calc_test_pkg.sv @@ -0,0 +1,25 @@ +`ifndef CALC_TEST_PKG_SV + `define CALC_TEST_PKG_SV + +package calc_test_pkg; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + + import calc_agent_pkg::*; + import calc_seq_pkg::*; + import configurations_pkg::*; +`include "calc_scoreboard.sv" +`include "calc_env.sv" +`include "test_base.sv" +`include "test_simple.sv" +`include "test_simple_2.sv" +`include "test_lib.sv" + + +endpackage : calc_test_pkg + + `include "calc_if.sv" + +`endif + diff --git a/code/vezba10/verif/calc_verif_top.sv b/code/vezba10/verif/calc_verif_top.sv new file mode 100644 index 0000000..98af11c --- /dev/null +++ b/code/vezba10/verif/calc_verif_top.sv @@ -0,0 +1,63 @@ +module calc_verif_top; + + import uvm_pkg::*; // import the UVM library +`include "uvm_macros.svh" // Include the UVM macros + + import calc_test_pkg::*; + + logic clk; + logic [6 : 0] rst; + + // interface + calc_if calc_vif(clk, rst); + + // DUT + calc_top DUT( + .c_clk ( clk ), + .reset ( rst ), + .out_data1 ( calc_vif.out_data1 ), + .out_data2 ( calc_vif.out_data2 ), + .out_data3 ( calc_vif.out_data3 ), + .out_data4 ( calc_vif.out_data4 ), + .out_resp1 ( calc_vif.out_resp1 ), + .out_resp2 ( calc_vif.out_resp2 ), + .out_resp3 ( calc_vif.out_resp3 ), + .out_resp4 ( calc_vif.out_resp4 ), + .req1_cmd_in ( calc_vif.req1_cmd_in ), + .req1_data_in ( calc_vif.req1_data_in ), + .req2_cmd_in ( calc_vif.req2_cmd_in ), + .req2_data_in ( calc_vif.req2_data_in ), + .req3_cmd_in ( calc_vif.req3_cmd_in ), + .req3_data_in ( calc_vif.req3_data_in ), + .req4_cmd_in ( calc_vif.req4_cmd_in ), + .req4_data_in ( calc_vif.req4_data_in ) + ); + + // run test + initial begin + uvm_config_db#(virtual calc_if)::set(null, "uvm_test_top.env", "calc_if", calc_vif); + run_test(); + end + + // optional waveform dump : add +WAVES on the command line + initial begin + if ($test$plusargs("WAVES")) begin + $dumpfile("calc.vcd"); + $dumpvars(0, calc_verif_top); + end + end + + // clock and reset init. + // Reset is active-high on all 7 lines and must be held for at least + // 7 clock cycles to propagate through the design (Vezba 5). + initial begin + clk = 0; + rst = '1; + repeat (8) @(posedge clk); + rst = '0; + end + + // clock generation + always #50 clk = ~clk; + +endmodule : calc_verif_top diff --git a/code/vezba10/verif/test_base.sv b/code/vezba10/verif/test_base.sv new file mode 100644 index 0000000..19ec99d --- /dev/null +++ b/code/vezba10/verif/test_base.sv @@ -0,0 +1,29 @@ +`ifndef TEST_BASE_SV + `define TEST_BASE_SV + +class test_base extends uvm_test; + + calc_env env; + calc_config cfg; + + `uvm_component_utils(test_base) + + function new(string name = "test_base", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + cfg = calc_config::type_id::create("cfg"); + uvm_config_db#(calc_config)::set(this, "env", "calc_config", cfg); + env = calc_env::type_id::create("env", this); + endfunction : build_phase + + function void end_of_elaboration_phase(uvm_phase phase); + super.end_of_elaboration_phase(phase); + uvm_top.print_topology(); + endfunction : end_of_elaboration_phase + +endclass : test_base + +`endif diff --git a/code/vezba10/verif/test_lib.sv b/code/vezba10/verif/test_lib.sv new file mode 100644 index 0000000..945d46c --- /dev/null +++ b/code/vezba10/verif/test_lib.sv @@ -0,0 +1,129 @@ +`ifndef TEST_LIB_SV + `define TEST_LIB_SV + +//============================================================================= +// Additional Calc1 tests, built on top of test_base. +//============================================================================= + +//----------------------------------------------------------------------------- +// Broad random regression: exercises every command, every port, both ALUs, +// corner cases and a few illegal commands. Good for coverage closure. +//----------------------------------------------------------------------------- +class test_random extends test_base; + `uvm_component_utils(test_random) + + function new(string name = "test_random", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + task main_phase(uvm_phase phase); + calc_simple_seq rnd; + calc_alu_seq alu; + calc_shift_seq sh; + calc_diff_port_seq dp; + calc_same_port_seq sp; + calc_shift_amounts_seq sa; + calc_corner_seq cor; + + phase.raise_objection(this); + `uvm_info(get_type_name(), "Starting random regression", UVM_LOW) + + repeat (3) begin + rnd = calc_simple_seq::type_id::create("rnd"); + void'(rnd.randomize()); + rnd.start(env.agent.seqr); + end + alu = calc_alu_seq::type_id::create("alu"); void'(alu.randomize()); alu.start(env.agent.seqr); + sh = calc_shift_seq::type_id::create("sh"); void'(sh.randomize()); sh.start(env.agent.seqr); + dp = calc_diff_port_seq::type_id::create("dp"); void'(dp.randomize()); dp.start(env.agent.seqr); + sp = calc_same_port_seq::type_id::create("sp"); void'(sp.randomize()); sp.start(env.agent.seqr); + sa = calc_shift_amounts_seq::type_id::create("sa"); sa.start(env.agent.seqr); + cor = calc_corner_seq::type_id::create("cor"); cor.start(env.agent.seqr); + + phase.drop_objection(this); + endtask : main_phase +endclass : test_random + +//----------------------------------------------------------------------------- +// Sanity test: only spec-conformant traffic. Expected result: 0 UVM_ERRORs. +// Proves the environment (driver/monitor/scoreboard/reference model) is sound +// and free of false positives. +//----------------------------------------------------------------------------- +class test_sanity extends test_base; + `uvm_component_utils(test_sanity) + + function new(string name = "test_sanity", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + task main_phase(uvm_phase phase); + calc_known_good_seq good; + phase.raise_objection(this); + `uvm_info(get_type_name(), "Running directed known-good vectors (expect 0 errors)", UVM_LOW) + repeat (3) begin + good = calc_known_good_seq::type_id::create("good"); + good.start(env.agent.seqr); + end + phase.drop_objection(this); + endtask : main_phase +endclass : test_sanity + +//----------------------------------------------------------------------------- +// Directed corner / error test: overflow, underflow, equal-subtract, invalid. +//----------------------------------------------------------------------------- +class test_corner extends test_base; + `uvm_component_utils(test_corner) + + function new(string name = "test_corner", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + task main_phase(uvm_phase phase); + calc_corner_seq cor; + calc_invalid_seq inv; + calc_shift_amounts_seq sa; + + phase.raise_objection(this); + cor = calc_corner_seq::type_id::create("cor"); cor.start(env.agent.seqr); + inv = calc_invalid_seq::type_id::create("inv"); inv.start(env.agent.seqr); + sa = calc_shift_amounts_seq::type_id::create("sa"); sa.start(env.agent.seqr); + phase.drop_objection(this); + endtask : main_phase +endclass : test_corner + +//----------------------------------------------------------------------------- +// Factory-override demo (Vezba 9, Zadatak): a transaction that never uses SUB. +//----------------------------------------------------------------------------- +class calc_seq_item_no_sub extends calc_seq_item; + `uvm_object_utils(calc_seq_item_no_sub) + constraint c_no_sub { cmd != CMD_SUB; } + function new(string name = "calc_seq_item_no_sub"); + super.new(name); + endfunction +endclass : calc_seq_item_no_sub + +class test_no_sub extends test_base; + `uvm_component_utils(test_no_sub) + + calc_simple_seq simple_seq; + + function new(string name = "test_no_sub", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + // every calc_seq_item created in the environment becomes a no-sub item + calc_seq_item::type_id::set_type_override(calc_seq_item_no_sub::get_type()); + simple_seq = calc_simple_seq::type_id::create("simple_seq"); + endfunction : build_phase + + task main_phase(uvm_phase phase); + phase.raise_objection(this); + void'(simple_seq.randomize()); + simple_seq.start(env.agent.seqr); + phase.drop_objection(this); + endtask : main_phase +endclass : test_no_sub + +`endif diff --git a/code/vezba10/verif/test_simple.sv b/code/vezba10/verif/test_simple.sv new file mode 100644 index 0000000..d05ff09 --- /dev/null +++ b/code/vezba10/verif/test_simple.sv @@ -0,0 +1,28 @@ +`ifndef TEST_SIMPLE_SV + `define TEST_SIMPLE_SV + +class test_simple extends test_base; + + `uvm_component_utils(test_simple) + + calc_simple_seq simple_seq; + + function new(string name = "test_simple", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + simple_seq = calc_simple_seq::type_id::create("simple_seq"); + endfunction : build_phase + + task main_phase(uvm_phase phase); + phase.raise_objection(this); + void'(simple_seq.randomize()); + simple_seq.start(env.agent.seqr); + phase.drop_objection(this); + endtask : main_phase + +endclass + +`endif diff --git a/code/vezba10/verif/test_simple_2.sv b/code/vezba10/verif/test_simple_2.sv new file mode 100644 index 0000000..583a3fa --- /dev/null +++ b/code/vezba10/verif/test_simple_2.sv @@ -0,0 +1,25 @@ +`ifndef TEST_SIMPLE_2_SV + `define TEST_SIMPLE_2_SV + +class test_simple_2 extends test_base; + + `uvm_component_utils(test_simple_2) + + function new(string name = "test_simple_2", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + // the sequencer lives at env.agent.seqr (the husk path "seqr.main_phase" + // never matched, so no sequence ran) + uvm_config_db#(uvm_object_wrapper)::set(this, + "env.agent.seqr.main_phase", + "default_sequence", + calc_simple_seq::type_id::get()); + endfunction : build_phase + +endclass + +`endif diff --git a/code/vezba10/xelab.pb b/code/vezba10/xelab.pb new file mode 100644 index 0000000..e2e9984 Binary files /dev/null and b/code/vezba10/xelab.pb differ diff --git a/code/vezba10/xsim.covdb/calc_sim/xsim.covinfo b/code/vezba10/xsim.covdb/calc_sim/xsim.covinfo new file mode 100644 index 0000000..97b5733 Binary files /dev/null and b/code/vezba10/xsim.covdb/calc_sim/xsim.covinfo differ diff --git a/code/vezba10/xsim.dir/calc_sim/Compile_Options.txt b/code/vezba10/xsim.dir/calc_sim/Compile_Options.txt new file mode 100644 index 0000000..49271ae --- /dev/null +++ b/code/vezba10/xsim.dir/calc_sim/Compile_Options.txt @@ -0,0 +1 @@ +--nolog -L "uvm" -timescale "1ns/10ps" "calc_verif_top" -s "calc_sim" diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.covinfo b/code/vezba10/xsim.dir/calc_sim/xsim.covinfo new file mode 100644 index 0000000..dd2ddeb Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.covinfo differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.crvsdump b/code/vezba10/xsim.dir/calc_sim/xsim.crvsdump new file mode 100644 index 0000000..4855acf Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.crvsdump differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.dbg b/code/vezba10/xsim.dir/calc_sim/xsim.dbg new file mode 100644 index 0000000..51ddc4d Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.dbg differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.mem b/code/vezba10/xsim.dir/calc_sim/xsim.mem new file mode 100644 index 0000000..aff574b Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.mem differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.reloc b/code/vezba10/xsim.dir/calc_sim/xsim.reloc new file mode 100644 index 0000000..470a731 Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.reloc differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.rtti b/code/vezba10/xsim.dir/calc_sim/xsim.rtti new file mode 100644 index 0000000..c129ea6 Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.rtti differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.svtype b/code/vezba10/xsim.dir/calc_sim/xsim.svtype new file mode 100644 index 0000000..95f9dbf Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.svtype differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.type b/code/vezba10/xsim.dir/calc_sim/xsim.type new file mode 100644 index 0000000..14a09a2 Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.type differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsim.xdbg b/code/vezba10/xsim.dir/calc_sim/xsim.xdbg new file mode 100644 index 0000000..d2f993c Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsim.xdbg differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsimSettings.ini b/code/vezba10/xsim.dir/calc_sim/xsimSettings.ini new file mode 100644 index 0000000..df0bc4a --- /dev/null +++ b/code/vezba10/xsim.dir/calc_sim/xsimSettings.ini @@ -0,0 +1,50 @@ +[General] +ARRAY_DISPLAY_LIMIT=512 +RADIX=hex +TIME_UNIT=ns +TRACE_LIMIT=2147483647 +VHDL_ENTITY_SCOPE_FILTER=true +VHDL_PACKAGE_SCOPE_FILTER=false +VHDL_BLOCK_SCOPE_FILTER=true +VHDL_PROCESS_SCOPE_FILTER=false +VHDL_PROCEDURE_SCOPE_FILTER=false +VERILOG_MODULE_SCOPE_FILTER=true +VERILOG_PACKAGE_SCOPE_FILTER=false +VERILOG_BLOCK_SCOPE_FILTER=false +VERILOG_TASK_SCOPE_FILTER=false +VERILOG_PROCESS_SCOPE_FILTER=false +INPUT_OBJECT_FILTER=true +OUTPUT_OBJECT_FILTER=true +INOUT_OBJECT_FILTER=true +INTERNAL_OBJECT_FILTER=true +CONSTANT_OBJECT_FILTER=true +VARIABLE_OBJECT_FILTER=true +INPUT_PROTOINST_FILTER=true +OUTPUT_PROTOINST_FILTER=true +INOUT_PROTOINST_FILTER=true +INTERNAL_PROTOINST_FILTER=true +CONSTANT_PROTOINST_FILTER=true +VARIABLE_PROTOINST_FILTER=true +SCOPE_NAME_COLUMN_WIDTH=0 +SCOPE_DESIGN_UNIT_COLUMN_WIDTH=0 +SCOPE_BLOCK_TYPE_COLUMN_WIDTH=0 +OBJECT_NAME_COLUMN_WIDTH=0 +OBJECT_VALUE_COLUMN_WIDTH=0 +OBJECT_DATA_TYPE_COLUMN_WIDTH=0 +PROCESS_NAME_COLUMN_WIDTH=0 +PROCESS_TYPE_COLUMN_WIDTH=0 +FRAME_INDEX_COLUMN_WIDTH=0 +FRAME_NAME_COLUMN_WIDTH=0 +FRAME_FILE_NAME_COLUMN_WIDTH=0 +FRAME_LINE_NUM_COLUMN_WIDTH=0 +LOCAL_NAME_COLUMN_WIDTH=0 +LOCAL_VALUE_COLUMN_WIDTH=0 +LOCAL_DATA_TYPE_COLUMN_WIDTH=0 +PROTO_NAME_COLUMN_WIDTH=0 +PROTO_VALUE_COLUMN_WIDTH=0 +INPUT_LOCAL_FILTER=1 +OUTPUT_LOCAL_FILTER=1 +INOUT_LOCAL_FILTER=1 +INTERNAL_LOCAL_FILTER=1 +CONSTANT_LOCAL_FILTER=1 +VARIABLE_LOCAL_FILTER=1 diff --git a/code/vezba10/xsim.dir/calc_sim/xsim_script.tcl b/code/vezba10/xsim.dir/calc_sim/xsim_script.tcl new file mode 100644 index 0000000..7cdeb92 --- /dev/null +++ b/code/vezba10/xsim.dir/calc_sim/xsim_script.tcl @@ -0,0 +1 @@ +xsim {calc_sim} -testplusarg UVM_TESTNAME=test_random -testplusarg UVM_VERBOSITY=UVM_HIGH -autoloadwcfg -runall -sv_seed random diff --git a/code/vezba10/xsim.dir/calc_sim/xsimcrash.log b/code/vezba10/xsim.dir/calc_sim/xsimcrash.log new file mode 100644 index 0000000..e69de29 diff --git a/code/vezba10/xsim.dir/calc_sim/xsimk b/code/vezba10/xsim.dir/calc_sim/xsimk new file mode 100755 index 0000000..c0c1a12 Binary files /dev/null and b/code/vezba10/xsim.dir/calc_sim/xsimk differ diff --git a/code/vezba10/xsim.dir/calc_sim/xsimkernel.log b/code/vezba10/xsim.dir/calc_sim/xsimkernel.log new file mode 100644 index 0000000..d861c6f --- /dev/null +++ b/code/vezba10/xsim.dir/calc_sim/xsimkernel.log @@ -0,0 +1,7 @@ +Running: xsim.dir/calc_sim/xsimk -runall -sv_seed random -simmode gui -testplusarg UVM_TESTNAME=test_random -testplusarg UVM_VERBOSITY=UVM_HIGH -wdb calc_sim.wdb -simrunnum 0 -socket 49855 +Design successfully loaded +Design Loading Memory Usage: 44568 KB (Peak: 44568 KB) +Design Loading CPU Usage: 20 ms +Simulation completed +Simulation Memory Usage: 139376 KB (Peak: 183836 KB) +Simulation CPU Usage: 120 ms diff --git a/code/vezba10/xsim.dir/work/alu_input_stage.sdb b/code/vezba10/xsim.dir/work/alu_input_stage.sdb new file mode 100644 index 0000000..6f86a5d Binary files /dev/null and b/code/vezba10/xsim.dir/work/alu_input_stage.sdb differ diff --git a/code/vezba10/xsim.dir/work/alu_output_stage.sdb b/code/vezba10/xsim.dir/work/alu_output_stage.sdb new file mode 100644 index 0000000..34464cc Binary files /dev/null and b/code/vezba10/xsim.dir/work/alu_output_stage.sdb differ diff --git a/code/vezba10/xsim.dir/work/calc_agent_pkg.sdb b/code/vezba10/xsim.dir/work/calc_agent_pkg.sdb new file mode 100644 index 0000000..53b90cc Binary files /dev/null and b/code/vezba10/xsim.dir/work/calc_agent_pkg.sdb differ diff --git a/code/vezba10/xsim.dir/work/calc_if.sdb b/code/vezba10/xsim.dir/work/calc_if.sdb new file mode 100644 index 0000000..ba7ccfc Binary files /dev/null and b/code/vezba10/xsim.dir/work/calc_if.sdb differ diff --git a/code/vezba10/xsim.dir/work/calc_seq_pkg.sdb b/code/vezba10/xsim.dir/work/calc_seq_pkg.sdb new file mode 100644 index 0000000..2cb5ca2 Binary files /dev/null and b/code/vezba10/xsim.dir/work/calc_seq_pkg.sdb differ diff --git a/code/vezba10/xsim.dir/work/calc_test_pkg.sdb b/code/vezba10/xsim.dir/work/calc_test_pkg.sdb new file mode 100644 index 0000000..1c2120b Binary files /dev/null and b/code/vezba10/xsim.dir/work/calc_test_pkg.sdb differ diff --git a/code/vezba10/xsim.dir/work/calc_top.sdb b/code/vezba10/xsim.dir/work/calc_top.sdb new file mode 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b/code/vezba10/xsim.dir/work/holdreg.sdb differ diff --git a/code/vezba10/xsim.dir/work/mux_out.sdb b/code/vezba10/xsim.dir/work/mux_out.sdb new file mode 100644 index 0000000..0fdc73a Binary files /dev/null and b/code/vezba10/xsim.dir/work/mux_out.sdb differ diff --git a/code/vezba10/xsim.dir/work/priority1.sdb b/code/vezba10/xsim.dir/work/priority1.sdb new file mode 100644 index 0000000..3da8b94 Binary files /dev/null and b/code/vezba10/xsim.dir/work/priority1.sdb differ diff --git a/code/vezba10/xsim.dir/work/shifter.sdb b/code/vezba10/xsim.dir/work/shifter.sdb new file mode 100644 index 0000000..9b886f0 Binary files /dev/null and b/code/vezba10/xsim.dir/work/shifter.sdb differ diff --git a/code/vezba10/xsim.dir/work/work.rlx b/code/vezba10/xsim.dir/work/work.rlx new file mode 100644 index 0000000..4955f1e --- /dev/null +++ b/code/vezba10/xsim.dir/work/work.rlx @@ -0,0 +1,34 @@ +0.7 +2020.2 +Oct 14 2022 +05:07:14 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(64-bit) +# SW Build 3671981 on Fri Oct 14 04:59:54 MDT 2022 +# IP Build 3669848 on Fri Oct 14 08:30:02 MDT 2022 +# Start of session at: Thu Jun 11 18:31:34 2026 +# Process ID: 884894 +# Current directory: /home/pilipovic/Downloads/FVH/code/vezba10 +# Command line: xsim -nolog -mode tcl -source {xsim.dir/calc_sim/xsim_script.tcl} +# Log file: +# Journal file: /home/pilipovic/Downloads/FVH/code/vezba10/xsim.jou +# Running On: arch, OS: Linux, CPU Frequency: 1733.838 MHz, CPU Physical cores: 12, Host memory: 16707 MB +#----------------------------------------------------------- +source xsim.dir/calc_sim/xsim_script.tcl +run -all diff --git a/code/vezba10/xvlog.pb b/code/vezba10/xvlog.pb new file mode 100644 index 0000000..2f96588 Binary files /dev/null and b/code/vezba10/xvlog.pb differ diff --git a/code/vezba2-1/vezba2/v2_build_file.f b/code/vezba2-1/vezba2/v2_build_file.f new file mode 100644 index 0000000..2fba267 --- /dev/null +++ b/code/vezba2-1/vezba2/v2_build_file.f @@ -0,0 +1,8 @@ +v2_top.sv +v2_driver.sv +v2_memory_if.sv +v2_tr.sv +v2_memory_pkg.sv +v2_memory.sv +-gui +-access +rwc \ No newline at end of file diff --git a/code/vezba2-1/vezba2/v2_driver.sv b/code/vezba2-1/vezba2/v2_driver.sv new file mode 100644 index 0000000..6f255af --- /dev/null +++ b/code/vezba2-1/vezba2/v2_driver.sv @@ -0,0 +1,37 @@ +`ifndef DRIVER_SV + `define DRIVER_SV + +class driver; + + newTransaction tr; + + virtual memory_if mem_if; + + function new(virtual memory_if mem_if); + this.mem_if = mem_if; + endfunction : new + + task run(); + tr = new(); + drive_transaction(tr); + tr.addr = 2'hA; + tr.en = 1'b1; + drive_transaction(tr); + tr.data_i = 8'hAA; + tr.rw = 1'b1; + drive_transaction(tr); + endtask : run + + task drive_transaction(newTransaction tr); + $display("Driving transaction:"); + tr.display_transaction(); + @(posedge mem_if.clk); + mem_if.addr <= tr.addr; + mem_if.data_i <= tr.data_i; + mem_if.en <= tr.en; + mem_if.rw <= tr.rw; + endtask : drive_transaction + +endclass : driver + +`endif diff --git a/code/vezba2-1/vezba2/v2_memory.sv b/code/vezba2-1/vezba2/v2_memory.sv new file mode 100644 index 0000000..63c9140 --- /dev/null +++ b/code/vezba2-1/vezba2/v2_memory.sv @@ -0,0 +1,41 @@ +`ifndef MEMORY_SV + `define MEMORY_SV + +module memory #( + parameter ADDR_WIDTH = 2, + parameter DATA_WIDTH = 8 + ) + ( + input logic clk, + input logic rst, + input logic [ADDR_WIDTH-1 : 0] addr_i, + input logic rw_i, + input logic en_i, + input logic [DATA_WIDTH-1 : 0] data_i, + output logic [DATA_WIDTH-1 : 0] data_o + ); + + logic [DATA_WIDTH-1 : 0] mem [2**ADDR_WIDTH]; + + always @(posedge clk or posedge rst) begin + if(rst) begin + for(int i = 0; i < 2**ADDR_WIDTH; i++) begin + mem[i] = 0; + end + end + else begin + if(en_i) begin + if(rw_i) begin + mem[addr_i] <= data_i; + end + else begin + data_o <= mem[addr_i]; + end + end + end + end + +endmodule : memory + +`endif + diff --git a/code/vezba2-1/vezba2/v2_memory_if.sv b/code/vezba2-1/vezba2/v2_memory_if.sv new file mode 100644 index 0000000..2ef098d --- /dev/null +++ b/code/vezba2-1/vezba2/v2_memory_if.sv @@ -0,0 +1,14 @@ +`ifndef MEMORY_IF_SV + `define MEMORY_IF_SV + +interface memory_if(input clk, input rst); + + logic [1 : 0] addr; + logic rw; + logic en; + logic [7 : 0] data_i; + logic [7 : 0] data_o; + +endinterface : memory_if + +`endif diff --git a/code/vezba2-1/vezba2/v2_memory_pkg.sv b/code/vezba2-1/vezba2/v2_memory_pkg.sv new file mode 100644 index 0000000..f84d9e3 --- /dev/null +++ b/code/vezba2-1/vezba2/v2_memory_pkg.sv @@ -0,0 +1,11 @@ +`ifndef MEMORY_PKG_SV + `define MEMORY_PKG_SV + +package memory_pkg; + + `include "v2_tr.sv" + `include "v2_driver.sv" + +endpackage : memory_pkg + +`endif diff --git a/code/vezba2-1/vezba2/v2_queue_examples.sv b/code/vezba2-1/vezba2/v2_queue_examples.sv new file mode 100644 index 0000000..7201c24 --- /dev/null +++ b/code/vezba2-1/vezba2/v2_queue_examples.sv @@ -0,0 +1,52 @@ +module queue_examples; + + int x = 2; + int y = 2; + + int q1[$] = {2, 4, 8}; + int q2[$] = {2, 4, 8}; + + initial begin + + $display("Inicijalno stanje reda q1: %p", q1); + + q1 = {q1, 10}; + q1 = {3, q1}; + q1 = {q1[0 : x-1], 5, q1[x : $]}; + $display("Posle ubacivanja elemenata u q1: %p", q1); + + x = q1[0]; + $display("x dobija vrednost %0d", x); + q1 = q1[1 : $]; + $display("Posle brisanja elemenata iz q1: %p", q1); + + x = q1[$]; + $display("x dobija vrednost %0d", x); + q1 = q1[0:$-1]; + $display("Posle brisanja elemenata iz q1: %p", q1); + + q1 = {}; + $display("Posle brisanja celog reda q1: %p", q1); + + // ------------------------------------------------- + + $display("Inicijalno stanje reda q2: %p", q2); + + q2.push_back(10); + q2.push_front(3); + q2.insert(y, 5); + $display("Posle ubacivanja elemenata u q2: %p", q2); + + y = q2.pop_front(); + $display("y dobija vrednost %0d", y); + $display("Posle brisanja elemenata iz q2: %p", q2); + + y = q2.pop_back(); + $display("y dobija vrednost %0d", y); + $display("Posle brisanja elemenata iz q2: %p", q2); + + q2.delete(); + $display("Posle brisanja celog reda q2: %p", q2); + end + +endmodule : queue_examples diff --git a/code/vezba2-1/vezba2/v2_top.sv b/code/vezba2-1/vezba2/v2_top.sv new file mode 100644 index 0000000..57c8272 --- /dev/null +++ b/code/vezba2-1/vezba2/v2_top.sv @@ -0,0 +1,42 @@ +`ifndef TOP_SV +`define TOP_SV + +`include "v2_memory.sv" +`include "v2_memory_if.sv" +`include "v2_memory_pkg.sv" + +module top; + + import memory_pkg::*; + + bit clk; + bit rst; + + memory_if mem_if(clk, rst); + + memory DUT ( + .clk (clk), + .rst (rst), + .addr_i (mem_if.addr), + .rw_i (mem_if.rw), + .en_i (mem_if.en), + .data_i (mem_if.data_i), + .data_o (mem_if.data_o) + ); + + driver drv = new(mem_if); + + initial begin + clk = 0; + rst = 1; + #5 rst =0; + #500 $finish(); + end + + always #5 clk = ~clk; + + initial drv.run(); + +endmodule : top + +`endif diff --git a/code/vezba2-1/vezba2/v2_tr.sv b/code/vezba2-1/vezba2/v2_tr.sv new file mode 100644 index 0000000..59ede9f --- /dev/null +++ b/code/vezba2-1/vezba2/v2_tr.sv @@ -0,0 +1,31 @@ +`ifndef TRANSACTION_SV + `define TRANSACTION_SV + +class transaction; + + bit [1 : 0] addr; + bit [7 : 0] data_i; + + function void display_transaction(); + $display("\taddr = %0h", this.addr); + $display("\tdata_i = %0h", this.data_i); + endfunction : display_transaction + +endclass : transaction + +class newTransaction extends transaction; + + bit [7 : 0] data_o; + bit rw; + bit en; + + function void display_transaction(); + super.display_transaction(); + $display("\tdata_o = %0h", this.data_o); + $display("\trw = %0h", this.rw); + $display("\ten = %0h", this.en); + endfunction : display_transaction + +endclass : newTransaction + +`endif diff --git a/code/vezba4/v4_constraint_mode.sv b/code/vezba4/v4_constraint_mode.sv new file mode 100644 index 0000000..4668953 --- /dev/null +++ b/code/vezba4/v4_constraint_mode.sv @@ -0,0 +1,35 @@ +class transaction; + + rand bit [1 : 0] addr; + rand bit [7 : 0] data; + + constraint data_range { data > 'ha5; } + constraint addr_range { addr == 0; } + +endclass : transaction + +module top; + + transaction tr; + + initial begin + tr = new; + assert(tr.randomize()); // i data_range i addr_range ogranicenja su aktivna + $display("addr = %0h, data = %0h", tr.addr, tr.data); + + tr.constraint_mode(0); // iskljucivanje svih ogranicenja + assert(tr.randomize()); // nema aktivnih ogranicenja + $display("addr = %0h, data = %0h", tr.addr, tr.data); + + tr.data_range.constraint_mode(1); // ukljucivanje jednog ogranicenja + assert(tr.randomize()); // data_range je aktivno, dok addr_range nije + $display("addr = %0h, data = %0h", tr.addr, tr.data); + end + + // Rezultat izvrsavanja: + // + // addr = 0, data = c7 + // addr = 3, data = 19 + // addr = 2, data = f0 + +endmodule : top diff --git a/code/vezba4/v4_pre_post_randomize_example.sv b/code/vezba4/v4_pre_post_randomize_example.sv new file mode 100644 index 0000000..f469fc4 --- /dev/null +++ b/code/vezba4/v4_pre_post_randomize_example.sv @@ -0,0 +1,40 @@ +class transaction; + + rand bit [1 : 0] addr; + rand bit [7 : 0] data; + + function void display_transaction(); + $display("\taddr = %0h", this.addr); + $display("\tdata = %0h", this.data); + endfunction : display_transaction + + function void pre_randomize(); + $display("transaction pre_randomize:"); + this.display_transaction(); + endfunction : pre_randomize + + function void post_randomize(); + $display("transaction post_randomize:"); + this.display_transaction(); + endfunction : post_randomize + +endclass : transaction + +module top; + transaction tr; + + initial begin + tr = new; + assert(tr.randomize()); + end + + // Rezultat izvrsavanja: + // + // transaction pre_randomize: + // addr = 0 + // data = 0 + // transaction post_randomize: + // addr = 2 + // data = 1d + +endmodule : top diff --git a/code/vezba4/v4_randomize_example.sv b/code/vezba4/v4_randomize_example.sv new file mode 100644 index 0000000..8bb9f07 --- /dev/null +++ b/code/vezba4/v4_randomize_example.sv @@ -0,0 +1,40 @@ +class transaction; + + rand bit [1 : 0] addr; + rand bit [7 : 0] data; + + function void display_transaction(); + $display("\taddr = %0h", this.addr); + $display("\tdata = %0h", this.data); + endfunction : display_transaction + +endclass : transaction + +module top; + transaction tr; + + initial begin + tr = new; + $display("Initial"); + tr.display_transaction(); + assert(tr.randomize()); + $display("Randomize all"); + tr.display_transaction(); + assert(tr.randomize(data)); + $display("Randomize just data"); + tr.display_transaction(); + end + + // Rezultat izvrsavanja: + // + // Initial + // addr = 0 + // data = 0 + // Randomize all + // addr = 2 + // data = 1d + // Randomize just data + // addr = 2 + // data = 9a + +endmodule : top diff --git a/code/vezba4/v4_sudoku.sv b/code/vezba4/v4_sudoku.sv new file mode 100644 index 0000000..8efebf9 --- /dev/null +++ b/code/vezba4/v4_sudoku.sv @@ -0,0 +1,72 @@ +class Sudoku; + + bit unsigned [3:0] init[9][9]; + rand bit[3:0] box[9][9]; + + // vrednost brojeva je izmedju 1 i 9 + constraint box_c { /* TODO */ } + + // kvadrati u jednom redu moraju imati jedinstvene vrednosti + constraint row_c { /* TODO */ } + + // kvadrati u jednoj koloni moraju imati jedinstvene vrednosti + constraint column_c { /* TODO */ } + + // unutar svakog kvadrata moraju biti jedinstvene vrednosti + constraint block_c { /* TODO */ } + + // ukoliko je zadata pocetna konfiguracija, ona mora biti ispostovana + // broj je zadat ukoliko je init[red][kolona] != 0 + constraint init_c { /* TODO */ } + + function int solve_puzzle(bit[3:0] init[9][9]); + this.init = init; + return this.randomize(); + endfunction: solve_puzzle + + function string sprint(); + string s = { {3{"+", {3{"-"}} }}, "+\n"}; + for(int i = 0; i < 9; i++) begin + s = { s, "|" }; + for (int j = 0; j < 9; j++) begin + s = {s, $sformatf("%1d", box[i][j])}; + if (j % 3 == 2) + s = {s, "|"}; + if (j == 8) + s = {s, "\n"}; + end + if (i % 3 == 2) + s = {s, {{3{"+", {3{"-"}}}}, "+\n"}}; + end + return s; + endfunction : sprint + +endclass: Sudoku + +module top; + + bit[3:0] init[9][9]; + Sudoku s; + + initial begin + // neupisana polja = 0 + init = '{'{ 0,2,3, 4,0,6, 7,8,0 }, + '{ 4,0,6, 7,0,9, 1,0,3 }, + '{ 7,8,0, 0,2,0, 0,5,6 }, + + '{ 2,3,0, 0,6,0, 0,9,1 }, + '{ 0,0,7, 8,0,1, 2,0,0 }, + '{ 8,9,0, 0,3,0, 0,6,7 }, + + '{ 3,4,0, 0,7,0, 0,1,2 }, + '{ 6,0,8, 9,0,2, 3,0,5 }, + '{ 0,1,2, 3,0,5, 6,7,0 }}; + s = new; + if (s.solve_puzzle(init)) begin + $display("Resenje je\n%s", s.sprint); + end else begin + $display("Nije moguce resiti problem"); + end + end + +endmodule: top diff --git a/code/vezba5-3/vezba5/dut/alu_input_stage.v b/code/vezba5-3/vezba5/dut/alu_input_stage.v new file mode 100644 index 0000000..cb10f05 --- /dev/null +++ b/code/vezba5-3/vezba5/dut/alu_input_stage.v @@ -0,0 +1,36 @@ +// Library: calc1 +// Module: ALU Input Stage +// Author: Naseer SIddique + +module alu_input_stage (alu_data1, alu_data2, hold1_data1, hold1_data2, hold2_data1, hold2_data2, hold3_data1, hold3_data2, hold4_data1, hold4_data2, prio_alu_in_cmd, prio_alu_in_req_id); + + output [0:63] alu_data1, alu_data2; + + wire [0:63] alu_data1, alu_data2; + + input [0:31] hold1_data1, hold1_data2, + hold2_data1, hold2_data2, + hold3_data1, hold3_data2, + hold4_data1, hold4_data2; + + input [0:3] prio_alu_in_cmd; + input [0:1] prio_alu_in_req_id; + + assign alu_data1[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data1[0:31] : + 32'b0; + + assign alu_data2[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data2[0:31] : + 32'b0; + + assign alu_data1[0:31] = 32'b0; + assign alu_data2[0:31] = 32'b0; + +endmodule // alu_input_stage diff --git a/code/vezba5-3/vezba5/dut/alu_output_stage.v b/code/vezba5-3/vezba5/dut/alu_output_stage.v new file mode 100644 index 0000000..4ff44ad --- /dev/null +++ b/code/vezba5-3/vezba5/dut/alu_output_stage.v @@ -0,0 +1,47 @@ +// Library: calc1 +// Module: ALU Output Stage +// Author: Naseer Siddique + +module alu_output_stage(out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk,alu_overflow, alu_result, local_error_found, prio_alu_out_req_id, prio_alu_out_vld, reset); + + output [0:31] out_data1, out_data2, out_data3, out_data4; + output [0:1] out_resp1, out_resp2, out_resp3, out_resp4; + + input [0:63] alu_result; + input [0:1] prio_alu_out_req_id; + input [1:7] reset; + input c_clk, + alu_overflow, + local_error_found, + prio_alu_out_vld; + + wire [0:31] hold_data; + wire [0:1] hold_resp, hold_id; + + assign hold_id[0:1] = prio_alu_out_req_id[0:1]; + + assign hold_resp[0:1] = + (~prio_alu_out_vld) ? 2'b00 : + (~local_error_found) ? 2'b01 : + (alu_result[31]) ? 2'b10 : + 2'b01; + + assign hold_data[0:31] = (prio_alu_out_vld) ? alu_result[32:63] : 32'b0; + + assign out_resp1[0:1] = (hold_id[0:1] == 2'b00) ? hold_resp[0:1] : 2'b00; + + assign out_resp2[0:1] = (hold_id[0:1] == 2'b01) ? hold_resp[0:1] : 2'b00; + + assign out_resp3[0:1] = (hold_id[0:1] == 2'b10) ? hold_resp[0:1] : 2'b00; + + assign out_resp4[0:1] = (hold_id[0:1] == 2'b11) ? hold_resp[0:1] : 2'b00; + + assign out_data1[0:31] = (hold_id[0:1] == 2'b00) ? hold_data[0:31] : 32'b0; + + assign out_data2[0:31] = (hold_id[0:1] == 2'b01) ? hold_data[0:31] : 32'b0; + + assign out_data3[0:31] = (hold_id[0:1] == 2'b10) ? hold_data[0:31] : 32'b0; + + assign out_data4[0:31] = (hold_id[0:1] == 2'b11) ? hold_data[0:31] : 32'b0; + +endmodule diff --git a/code/vezba5-3/vezba5/dut/calc_top.v b/code/vezba5-3/vezba5/dut/calc_top.v new file mode 100644 index 0000000..b4e1833 --- /dev/null +++ b/code/vezba5-3/vezba5/dut/calc_top.v @@ -0,0 +1,278 @@ +// Library: calc1 +// Module: Top-level wiring +// Author: Naseer Siddique + +//`include "alu_input_stage.v" +//`include "alu_output_stage.v" +//`include "exdbin_mac.v" +//`include "holdreg.v" +//`include "mux_out.v" +//`include "shifter.v" +//`include "priority.v" + +module calc_top (out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk, req1_cmd_in, req1_data_in, req2_cmd_in, req2_data_in, req3_cmd_in, req3_data_in, req4_cmd_in, req4_data_in, reset); + + output [0:31] out_data1, + out_data2, + out_data3, + out_data4; + + output [0:1] out_resp1, + out_resp2, + out_resp3, + out_resp4; + + + input c_clk; + + input [0:3] req1_cmd_in, + req2_cmd_in, + req3_cmd_in, + req4_cmd_in; + + input [0:31] req1_data_in, + req2_data_in, + req3_data_in, + req4_data_in; + + input [1:7] reset; + + wire [0:63] add_sum, + fxu_areg_q, + fxu_breg_q, + shift_out, + shift_places, + shift_val; + + wire [0:31] hold1_data1, + hold1_data2, + hold2_data1, + hold2_data2, + hold3_data1, + hold3_data2, + hold4_data1, + hold4_data2, + mux1_req_data1, + mux1_req_data2, + mux2_req_data1, + mux2_req_data2, + mux3_req_data1, + mux3_req_data2, + mux4_req_data1, + mux4_req_data2; + + wire [0:3] hold1_prio_req, + hold2_prio_req, + hold3_prio_req, + hold4_prio_req, + prio_alu1_in_cmd, + prio_alu2_in_cmd; + + wire [0:1] mux1_req_resp1, + mux1_req_resp2, + mux2_req_resp1, + mux2_req_resp2, + mux3_req_resp1, + mux3_req_resp2, + mux4_req_resp1, + mux4_req_resp2, + prio_alu1_in_req_id, + prio_alu1_out_req_id, + prio_alu2_in_req_id, + prio_alu2_out_req_id; + + wire prio_alu1_out_vld, + prio_alu2_out_vld, + add_ovfl, + shift_ovfl; + + wire [0:3] error_found; + assign error_found = 4'b0000; + + exdbin_mac adder ( + .alu_cmd ( prio_alu1_in_cmd[0:3] ), + .bin_ovfl ( add_ovfl ), + .bin_sum ( add_sum[0:63] ), + .fxu_areg_q ( fxu_areg_q[0:63] ), + .fxu_breg_q ( fxu_breg_q[0:63] ), + .local_error_found ( error_found[0] ) + ); + + + holdreg holdreg1( + .c_clk ( c_clk ), + .hold_data1 ( hold1_data1[0:31] ), + .hold_data2 ( hold1_data2[0:31] ), + .hold_prio_req ( hold1_prio_req[0:3] ), + .req_cmd_in ( req1_cmd_in[0:3] ), + .req_data_in ( req1_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg2( + .c_clk ( c_clk ), + .hold_data1 ( hold2_data1[0:31] ), + .hold_data2 ( hold2_data2[0:31] ), + .hold_prio_req ( hold2_prio_req[0:3] ), + .req_cmd_in ( req2_cmd_in[0:3] ), + .req_data_in ( req2_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg3( + .c_clk ( c_clk ), + .hold_data1 ( hold3_data1[0:31] ), + .hold_data2 ( hold3_data2[0:31] ), + .hold_prio_req ( hold3_prio_req[0:3] ), + .req_cmd_in ( req3_cmd_in[0:3] ), + .req_data_in ( req3_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg4( + .c_clk ( c_clk ), + .hold_data1 ( hold4_data1[0:31] ), + .hold_data2 ( hold4_data2[0:31] ), + .hold_prio_req ( hold4_prio_req[0:3] ), + .req_cmd_in ( req4_cmd_in[0:3] ), + .req_data_in ( req4_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + alu_input_stage in_stage1( + .alu_data1 ( fxu_areg_q[0:63]), + .alu_data2 ( fxu_breg_q[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu1_in_req_id[0:1]) + ); + + alu_input_stage in_stage2( + .alu_data1 ( shift_val[0:63]), + .alu_data2 ( shift_places[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu2_in_req_id[0:1]) + ); + + mux_out mux_out1( + .req_data1 ( mux1_req_data1[0:31]), + .req_data2 ( mux1_req_data2[0:31]), + .req_data ( out_data1[0:31]), + .req_resp1 ( mux1_req_resp1[0:1]), + .req_resp2 ( mux1_req_resp2[0:1]), + .req_resp ( out_resp1[0:1]) + ); + + mux_out mux_out2( + .req_data1 ( mux2_req_data1[0:31]), + .req_data2 ( mux2_req_data2[0:31]), + .req_data ( out_data2[0:31]), + .req_resp1 ( mux2_req_resp1[0:1]), + .req_resp2 ( mux2_req_resp2[0:1]), + .req_resp ( out_resp2[0:1]) + ); + + mux_out mux_out3( + .req_data1 ( mux3_req_data1[0:31]), + .req_data2 ( mux3_req_data2[0:31]), + .req_data ( out_data3[0:31]), + .req_resp1 ( mux3_req_resp1[0:1]), + .req_resp2 ( mux3_req_resp2[0:1]), + .req_resp ( out_resp3[0:1]) + ); + + mux_out mux_out4( + .req_data1 ( mux4_req_data1[0:31]), + .req_data2 ( mux4_req_data2[0:31]), + .req_data ( out_data4[0:31]), + .req_resp1 ( mux4_req_resp1[0:1]), + .req_resp2 ( mux4_req_resp2[0:1]), + .req_resp ( out_resp4[0:1]) + ); + + alu_output_stage out_stage1( + .alu_overflow ( add_ovfl), + .alu_result ( add_sum[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data1[0:31]), + .out_data2 ( mux2_req_data1[0:31]), + .out_data3 ( mux3_req_data1[0:31]), + .out_data4 ( mux4_req_data1[0:31]), + .out_resp1 ( mux1_req_resp1[0:1]), + .out_resp2 ( mux2_req_resp1[0:1]), + .out_resp3 ( mux3_req_resp1[0:1]), + .out_resp4 ( mux4_req_resp1[0:1]), + .prio_alu_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu1_out_vld ), + .reset ( reset[1:7]) + ); + + alu_output_stage out_stage2( + .alu_overflow ( shift_ovfl), + .alu_result ( shift_out[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data2[0:31]), + .out_data2 ( mux2_req_data2[0:31]), + .out_data3 ( mux3_req_data2[0:31]), + .out_data4 ( mux4_req_data2[0:31]), + .out_resp1 ( mux1_req_resp2[0:1]), + .out_resp2 ( mux2_req_resp2[0:1]), + .out_resp3 ( mux3_req_resp2[0:1]), + .out_resp4 ( mux4_req_resp2[0:1]), + .prio_alu_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu2_out_vld ), + .reset ( reset[1:7]) + ); + + priority1 priority_logic ( + .c_clk ( c_clk), + .hold1_prio_req ( hold1_prio_req[0:3]), + .hold2_prio_req ( hold2_prio_req[0:3]), + .hold3_prio_req ( hold3_prio_req[0:3]), + .hold4_prio_req ( hold4_prio_req[0:3]), + .local_error_found ( error_found[3]), + .prio_alu1_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu1_in_req_id ( prio_alu1_in_req_id[0:1]), + .prio_alu1_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu1_out_vld ( prio_alu1_out_vld), + .prio_alu2_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu2_in_req_id ( prio_alu2_in_req_id[0:1]), + .prio_alu2_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu2_out_vld ( prio_alu2_out_vld), + .reset ( reset[1:7]) + ); + + shifter shifter1( + .bin_ovfl ( shift_ovfl), + .local_error_found ( error_found[1]), + .shift_cmd ( prio_alu2_in_cmd[0:3]), + .shift_out ( shift_out[0:63]), + .shift_places ( shift_places[0:63]), + .shift_val ( shift_val[0:63]) + ); + +endmodule // calc1_top + + + + + + + diff --git a/code/vezba5-3/vezba5/dut/exdbin_mac.v b/code/vezba5-3/vezba5/dut/exdbin_mac.v new file mode 100644 index 0000000..59593ef --- /dev/null +++ b/code/vezba5-3/vezba5/dut/exdbin_mac.v @@ -0,0 +1,1279 @@ +// Library: calc2 +// Module: 64-bit binary adder +// Author: Naseer Siddique + +module exdbin_mac (bin_ovfl, bin_sum, alu_cmd, fxu_areg_q, local_error_found, fxu_breg_q); + + output bin_ovfl; + output [0:63] bin_sum; + + wire bin_ovfl; + wire[0:63] bin_sum; + + input [0:3] alu_cmd; + input [0:63] fxu_areg_q, fxu_breg_q; + input local_error_found; + + wire [0:63] p, p_n, g, h_n, d, a, a_n, b, b_n; + wire [0:63] fxu_areg_n_q, fxu_breg_n_q; + + wire [0:64] c, c_n; + wire [0:31] G2, P2; + wire [0:15] Gn, Pn; + wire [0:7] Gb, Pb, d8; + wire [0:5] G2b, P2b; + wire ds; + wire bin_a_z_q, bin_add_45_q; + wire [0:7] bin_by_f_e_q; + wire bin_cin_q, bin_ex_sign_q, bin_ex_sign_op_q; + wire bin_sub_45_q, bin_sub_q; + wire bin_c_0; + wire bin_c_32; + wire bin_sum_0_63_z, bin_sum_32_63_z, bin_sum_33_63_z; + wire [0:63] bruce_bin_sum; + + + integer A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S; + + assign bin_a_z_q = 1'b0; + assign bin_add_45_q = (alu_cmd[0:3] == 4'b0001) ? 1'b1: 1'b0; + assign bin_by_f_e_q = 8'b0; + assign bin_cin_q = 1'b0; + assign bin_ex_sign_q = 1'b0; + assign bin_ex_sign_op_q = 1'b0; + assign bin_sub_45_q = ( alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + assign bin_sub_q = (alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + + assign fxu_areg_n_q[0] = ~fxu_areg_q[0]; + assign fxu_breg_n_q[0] = ~fxu_breg_q[0]; + + assign fxu_areg_n_q[1] = ~fxu_areg_q[1]; + assign fxu_breg_n_q[1] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[2] = ~fxu_areg_q[2]; + assign fxu_breg_n_q[2] = ~fxu_breg_q[2]; + + assign fxu_areg_n_q[3] = ~fxu_areg_q[3]; + assign fxu_breg_n_q[3] = ~fxu_breg_q[3]; + + assign fxu_areg_n_q[4] = ~fxu_areg_q[4]; + assign fxu_breg_n_q[4] = ~fxu_breg_q[4]; + + assign fxu_areg_n_q[5] = ~fxu_areg_q[5]; + assign fxu_breg_n_q[5] = ~fxu_breg_q[5]; + + assign fxu_areg_n_q[6] = ~fxu_areg_q[6]; + assign fxu_breg_n_q[6] = ~fxu_breg_q[6]; + + assign fxu_areg_n_q[7] = ~fxu_areg_q[7]; + assign fxu_breg_n_q[7] = ~fxu_breg_q[7]; + + assign fxu_areg_n_q[8] = ~fxu_areg_q[8]; + assign fxu_breg_n_q[8] = ~fxu_breg_q[8]; + + assign fxu_areg_n_q[9] = ~fxu_areg_q[9]; + assign fxu_breg_n_q[9] = ~fxu_breg_q[9]; + + assign fxu_areg_n_q[10] = ~fxu_areg_q[10]; + assign fxu_breg_n_q[10] = ~fxu_breg_q[10]; + + assign fxu_areg_n_q[11] = ~fxu_areg_q[11]; + assign fxu_breg_n_q[11] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[12] = ~fxu_areg_q[12]; + assign fxu_breg_n_q[12] = ~fxu_breg_q[12]; + + assign fxu_areg_n_q[13] = ~fxu_areg_q[13]; + assign fxu_breg_n_q[13] = ~fxu_breg_q[13]; + + assign fxu_areg_n_q[14] = ~fxu_areg_q[14]; + assign fxu_breg_n_q[14] = ~fxu_breg_q[14]; + + assign fxu_areg_n_q[15] = ~fxu_areg_q[15]; + assign fxu_breg_n_q[15] = ~fxu_breg_q[15]; + + assign fxu_areg_n_q[16] = ~fxu_areg_q[16]; + assign fxu_breg_n_q[16] = ~fxu_breg_q[16]; + + assign fxu_areg_n_q[17] = ~fxu_areg_q[17]; + assign fxu_breg_n_q[17] = ~fxu_breg_q[17]; + + assign fxu_areg_n_q[18] = ~fxu_areg_q[18]; + assign fxu_breg_n_q[18] = ~fxu_breg_q[18]; + + assign fxu_areg_n_q[19] = ~fxu_areg_q[19]; + assign fxu_breg_n_q[19] = ~fxu_breg_q[19]; + + assign fxu_areg_n_q[20] = ~fxu_areg_q[20]; + assign fxu_breg_n_q[20] = ~fxu_breg_q[20]; + + assign fxu_areg_n_q[21] = ~fxu_areg_q[21]; + assign fxu_breg_n_q[21] = ~fxu_breg_q[21]; + + assign fxu_areg_n_q[22] = ~fxu_areg_q[22]; + assign fxu_breg_n_q[22] = ~fxu_breg_q[22]; + + assign fxu_areg_n_q[23] = ~fxu_areg_q[23]; + assign fxu_breg_n_q[23] = ~fxu_breg_q[23]; + + assign fxu_areg_n_q[24] = ~fxu_areg_q[24]; + assign fxu_breg_n_q[24] = ~fxu_breg_q[24]; + + assign fxu_areg_n_q[25] = ~fxu_areg_q[25]; + assign fxu_breg_n_q[25] = ~fxu_breg_q[25]; + + assign fxu_areg_n_q[26] = ~fxu_areg_q[26]; + assign fxu_breg_n_q[26] = ~fxu_breg_q[26]; + + assign fxu_areg_n_q[27] = ~fxu_areg_q[27]; + assign fxu_breg_n_q[27] = ~fxu_breg_q[27]; + + assign fxu_areg_n_q[28] = ~fxu_areg_q[28]; + assign fxu_breg_n_q[28] = ~fxu_breg_q[28]; + + assign fxu_areg_n_q[29] = ~fxu_areg_q[29]; + assign fxu_breg_n_q[29] = ~fxu_breg_q[29]; + + assign fxu_areg_n_q[30] = ~fxu_areg_q[30]; + assign fxu_breg_n_q[30] = ~fxu_breg_q[30]; + + assign fxu_areg_n_q[31] = ~fxu_areg_q[31]; + assign fxu_breg_n_q[31] = ~fxu_breg_q[31]; + + assign fxu_areg_n_q[32] = ~fxu_areg_q[32]; + assign fxu_breg_n_q[32] = ~fxu_breg_q[32]; + + assign fxu_areg_n_q[33] = ~fxu_areg_q[33]; + assign fxu_breg_n_q[33] = ~fxu_breg_q[33]; + + assign fxu_areg_n_q[34] = ~fxu_areg_q[34]; + assign fxu_breg_n_q[34] = ~fxu_breg_q[34]; + + assign fxu_areg_n_q[35] = ~fxu_areg_q[35]; + assign fxu_breg_n_q[35] = ~fxu_breg_q[35]; + + assign fxu_areg_n_q[36] = ~fxu_areg_q[36]; + assign fxu_breg_n_q[36] = ~fxu_breg_q[36]; + + assign fxu_areg_n_q[37] = ~fxu_areg_q[37]; + assign fxu_breg_n_q[37] = ~fxu_breg_q[37]; + + assign fxu_areg_n_q[38] = ~fxu_areg_q[38]; + assign fxu_breg_n_q[38] = ~fxu_breg_q[38]; + + assign fxu_areg_n_q[39] = ~fxu_areg_q[39]; + assign fxu_breg_n_q[39] = ~fxu_breg_q[39]; + + assign fxu_areg_n_q[40] = ~fxu_areg_q[40]; + assign fxu_breg_n_q[40] = ~fxu_breg_q[40]; + + assign fxu_areg_n_q[41] = ~fxu_areg_q[41]; + assign fxu_breg_n_q[41] = ~fxu_breg_q[41]; + + assign fxu_areg_n_q[42] = ~fxu_areg_q[42]; + assign fxu_breg_n_q[42] = ~fxu_breg_q[42]; + + assign fxu_areg_n_q[43] = ~fxu_areg_q[43]; + assign fxu_breg_n_q[43] = ~fxu_breg_q[43]; + + assign fxu_areg_n_q[44] = ~fxu_areg_q[44]; + assign fxu_breg_n_q[44] = ~fxu_breg_q[44]; + + assign fxu_areg_n_q[45] = ~fxu_areg_q[45]; + assign fxu_breg_n_q[45] = ~fxu_breg_q[45]; + + assign fxu_areg_n_q[46] = ~fxu_areg_q[46]; + assign fxu_breg_n_q[46] = ~fxu_breg_q[46]; + + assign fxu_areg_n_q[47] = ~fxu_areg_q[47]; + assign fxu_breg_n_q[47] = ~fxu_breg_q[47]; + + assign fxu_areg_n_q[48] = ~fxu_areg_q[48]; + assign fxu_breg_n_q[48] = ~fxu_breg_q[48]; + + assign fxu_areg_n_q[49] = ~fxu_areg_q[49]; + assign fxu_breg_n_q[49] = ~fxu_breg_q[49]; + + assign fxu_areg_n_q[50] = ~fxu_areg_q[50]; + assign fxu_breg_n_q[50] = ~fxu_breg_q[50]; + + assign fxu_areg_n_q[51] = ~fxu_areg_q[51]; + assign fxu_breg_n_q[51] = ~fxu_breg_q[51]; + + assign fxu_areg_n_q[52] = ~fxu_areg_q[52]; + assign fxu_breg_n_q[52] = ~fxu_breg_q[52]; + + assign fxu_areg_n_q[53] = ~fxu_areg_q[53]; + assign fxu_breg_n_q[53] = ~fxu_breg_q[53]; + + assign fxu_areg_n_q[54] = ~fxu_areg_q[54]; + assign fxu_breg_n_q[54] = ~fxu_breg_q[54]; + + assign fxu_areg_n_q[55] = ~fxu_areg_q[55]; + assign fxu_breg_n_q[55] = ~fxu_breg_q[55]; + + assign fxu_areg_n_q[56] = ~fxu_areg_q[56]; + assign fxu_breg_n_q[56] = ~fxu_breg_q[56]; + + assign fxu_areg_n_q[57] = ~fxu_areg_q[57]; + assign fxu_breg_n_q[57] = ~fxu_breg_q[57]; + + assign fxu_areg_n_q[58] = ~fxu_areg_q[58]; + assign fxu_breg_n_q[58] = ~fxu_breg_q[58]; + + assign fxu_areg_n_q[59] = ~fxu_areg_q[59]; + assign fxu_breg_n_q[59] = ~fxu_breg_q[59]; + + assign fxu_areg_n_q[60] = ~fxu_areg_q[60]; + assign fxu_breg_n_q[60] = ~fxu_breg_q[60]; + + assign fxu_areg_n_q[61] = ~fxu_areg_q[61]; + assign fxu_breg_n_q[61] = ~fxu_breg_q[61]; + + assign fxu_areg_n_q[62] = ~fxu_areg_q[62]; + assign fxu_breg_n_q[62] = ~fxu_breg_q[62]; + + assign fxu_areg_n_q[63] = ~fxu_areg_q[63]; + assign fxu_breg_n_q[63] = ~fxu_breg_q[63]; + + assign a[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0]; + assign a[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+1]; + assign a[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+2]; + assign a[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+3]; + assign a[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+4]; + assign a[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+5]; + assign a[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+6]; + assign a[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+7]; + assign a_n[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0]; + assign a_n[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+1]; + assign a_n[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+2]; + assign a_n[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+3]; + assign a_n[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+4]; + assign a_n[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+5]; + assign a_n[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+6]; + assign a_n[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+7]; + + assign a[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1]; + assign a[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+1]; + assign a[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+2]; + assign a[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+3]; + assign a[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+4]; + assign a[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+5]; + assign a[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+6]; + assign a[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+7]; + assign a_n[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1]; + assign a_n[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+1]; + assign a_n[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+2]; + assign a_n[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+3]; + assign a_n[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+4]; + assign a_n[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+5]; + assign a_n[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+6]; + assign a_n[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+7]; + + assign a[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2]; + assign a[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+1]; + assign a[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+2]; + assign a[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+3]; + assign a[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+4]; + assign a[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+5]; + assign a[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+6]; + assign a[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+7]; + assign a_n[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2]; + assign a_n[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+1]; + assign a_n[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+2]; + assign a_n[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+3]; + assign a_n[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+4]; + assign a_n[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+5]; + assign a_n[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+6]; + assign a_n[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+7]; + + assign a[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3]; + assign a[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+1]; + assign a[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+2]; + assign a[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+3]; + assign a[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+4]; + assign a[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+5]; + assign a[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+6]; + assign a[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+7]; + assign a_n[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3]; + assign a_n[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+1]; + assign a_n[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+2]; + assign a_n[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+3]; + assign a_n[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+4]; + assign a_n[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+5]; + assign a_n[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+6]; + assign a_n[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+7]; + + assign a[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4]; + assign a[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+1]; + assign a[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+2]; + assign a[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+3]; + assign a[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+4]; + assign a[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+5]; + assign a[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+6]; + assign a[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+7]; + assign a_n[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4]; + assign a_n[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+1]; + assign a_n[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+2]; + assign a_n[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+3]; + assign a_n[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+4]; + assign a_n[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+5]; + assign a_n[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+6]; + assign a_n[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+7]; + + assign a[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5]; + assign a[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+1]; + assign a[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+2]; + assign a[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+3]; + assign a[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+4]; + assign a[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+5]; + assign a[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+6]; + assign a[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+7]; + assign a_n[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5]; + assign a_n[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+1]; + assign a_n[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+2]; + assign a_n[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+3]; + assign a_n[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+4]; + assign a_n[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+5]; + assign a_n[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+6]; + assign a_n[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+7]; + + assign a[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6]; + assign a[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+1]; + assign a[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+2]; + assign a[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+3]; + assign a[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+4]; + assign a[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+5]; + assign a[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+6]; + assign a[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+7]; + assign a_n[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6]; + assign a_n[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+1]; + assign a_n[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+2]; + assign a_n[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+3]; + assign a_n[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+4]; + assign a_n[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+5]; + assign a_n[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+6]; + assign a_n[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+7]; + + assign a[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7]; + assign a[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+1]; + assign a[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+2]; + assign a[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+3]; + assign a[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+4]; + assign a[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+5]; + assign a[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+6]; + assign a[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+7]; + assign a_n[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7]; + assign a_n[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+1]; + assign a_n[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+2]; + assign a_n[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+3]; + assign a_n[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+4]; + assign a_n[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+5]; + assign a_n[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+6]; + assign a_n[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+7]; + + + assign b[8*0] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0] : fxu_breg_q[8*0]; + assign b[8*0+1] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+1] : fxu_breg_q[8*0+1]; + assign b[8*0+2] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+2] : fxu_breg_q[8*0+2]; + assign b[8*0+3] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+3] : fxu_breg_q[8*0+3]; + assign b[8*0+4] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+4] : fxu_breg_q[8*0+4]; + assign b[8*0+5] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+5] : fxu_breg_q[8*0+5]; + assign b[8*0+6] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+6] : fxu_breg_q[8*0+6]; + assign b[8*0+7] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+7] : fxu_breg_q[8*0+7]; + assign b_n[8*0] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0] : fxu_breg_n_q[8*0]; + assign b_n[8*0+1] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+1] : fxu_breg_n_q[8*0+1]; + assign b_n[8*0+2] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+2] : fxu_breg_n_q[8*0+2]; + assign b_n[8*0+3] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+3] : fxu_breg_n_q[8*0+3]; + assign b_n[8*0+4] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+4] : fxu_breg_n_q[8*0+4]; + assign b_n[8*0+5] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+5] : fxu_breg_n_q[8*0+5]; + assign b_n[8*0+6] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+6] : fxu_breg_n_q[8*0+6]; + assign b_n[8*0+7] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+7] : fxu_breg_n_q[8*0+7]; + + assign b[8*1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1] : fxu_breg_q[8*1]; + assign b[8*1+1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+1] : fxu_breg_q[8*1+1]; + assign b[8*1+2] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+2] : fxu_breg_q[8*1+2]; + assign b[8*1+3] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+3] : fxu_breg_q[8*1+3]; + assign b[8*1+4] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+4] : fxu_breg_q[8*1+4]; + assign b[8*1+5] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+5] : fxu_breg_q[8*1+5]; + assign b[8*1+6] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+6] : fxu_breg_q[8*1+6]; + assign b[8*1+7] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+7] : fxu_breg_q[8*1+7]; + assign b_n[8*1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1] : fxu_breg_n_q[8*1]; + assign b_n[8*1+1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+1] : fxu_breg_n_q[8*1+1]; + assign b_n[8*1+2] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+2] : fxu_breg_n_q[8*1+2]; + assign b_n[8*1+3] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+3] : fxu_breg_n_q[8*1+3]; + assign b_n[8*1+4] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+4] : fxu_breg_n_q[8*1+4]; + assign b_n[8*1+5] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+5] : fxu_breg_n_q[8*1+5]; + assign b_n[8*1+6] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+6] : fxu_breg_n_q[8*1+6]; + assign b_n[8*1+7] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+7] : fxu_breg_n_q[8*1+7]; + + assign b[8*2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2] : fxu_breg_q[8*2]; + assign b[8*2+1] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+1] : fxu_breg_q[8*2+1]; + assign b[8*2+2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+2] : fxu_breg_q[8*2+2]; + assign b[8*2+3] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+3] : fxu_breg_q[8*2+3]; + assign b[8*2+4] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+4] : fxu_breg_q[8*2+4]; + assign b[8*2+5] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+5] : fxu_breg_q[8*2+5]; + assign b[8*2+6] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+6] : fxu_breg_q[8*2+6]; + assign b[8*2+7] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+7] : fxu_breg_q[8*2+7]; + assign b_n[8*2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2] : fxu_breg_n_q[8*2]; + assign b_n[8*2+1] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+1] : fxu_breg_n_q[8*2+1]; + assign b_n[8*2+2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+2] : fxu_breg_n_q[8*2+2]; + assign b_n[8*2+3] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+3] : fxu_breg_n_q[8*2+3]; + assign b_n[8*2+4] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+4] : fxu_breg_n_q[8*2+4]; + assign b_n[8*2+5] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+5] : fxu_breg_n_q[8*2+5]; + assign b_n[8*2+6] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+6] : fxu_breg_n_q[8*2+6]; + assign b_n[8*2+7] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+7] : fxu_breg_n_q[8*2+7]; + + assign b[8*3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3] : fxu_breg_q[8*3]; + assign b[8*3+1] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+1] : fxu_breg_q[8*3+1]; + assign b[8*3+2] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+2] : fxu_breg_q[8*3+2]; + assign b[8*3+3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+3] : fxu_breg_q[8*3+3]; + assign b[8*3+4] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+4] : fxu_breg_q[8*3+4]; + assign b[8*3+5] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+5] : fxu_breg_q[8*3+5]; + assign b[8*3+6] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+6] : fxu_breg_q[8*3+6]; + assign b[8*3+7] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+7] : fxu_breg_q[8*3+7]; + assign b_n[8*3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3] : fxu_breg_n_q[8*3]; + assign b_n[8*3+1] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+1] : fxu_breg_n_q[8*3+1]; + assign b_n[8*3+2] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+2] : fxu_breg_n_q[8*3+2]; + assign b_n[8*3+3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+3] : fxu_breg_n_q[8*3+3]; + assign b_n[8*3+4] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+4] : fxu_breg_n_q[8*3+4]; + assign b_n[8*3+5] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+5] : fxu_breg_n_q[8*3+5]; + assign b_n[8*3+6] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+6] : fxu_breg_n_q[8*3+6]; + assign b_n[8*3+7] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+7] : fxu_breg_n_q[8*3+7]; + + assign b[8*6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6] : fxu_breg_q[8*6]; + assign b[8*6+1] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+1] : fxu_breg_q[8*6+1]; + assign b[8*6+2] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+2] : fxu_breg_q[8*6+2]; + assign b[8*6+3] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+3] : (local_error_found) ? fxu_breg_q[8*6+3] : fxu_breg_q[8*6+2]; + assign b[8*6+4] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+4] : fxu_breg_q[8*6+4]; + assign b[8*6+5] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+5] : fxu_breg_q[8*6+5]; + assign b[8*6+6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+6] : fxu_breg_q[8*6+6]; + assign b[8*6+7] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+7] : fxu_breg_q[8*6+7]; + assign b_n[8*6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6] : fxu_breg_n_q[8*6]; + assign b_n[8*6+1] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+1] : fxu_breg_n_q[8*6+1]; + assign b_n[8*6+2] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+2] : fxu_breg_n_q[8*6+2]; + assign b_n[8*6+3] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+3] : fxu_breg_n_q[8*6+3]; + assign b_n[8*6+4] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+4] : fxu_breg_n_q[8*6+4]; + assign b_n[8*6+5] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+5] : fxu_breg_n_q[8*6+5]; + assign b_n[8*6+6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+6] : fxu_breg_n_q[8*6+6]; + assign b_n[8*6+7] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+7] : fxu_breg_n_q[8*6+7]; + + assign b[8*7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7] : fxu_breg_q[8*7]; + assign b[8*7+1] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+1] : fxu_breg_q[8*7+1]; + assign b[8*7+2] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+2] : fxu_breg_q[8*7+2]; + assign b[8*7+3] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+3] : (local_error_found) ? fxu_breg_q[8*7+3] : fxu_breg_q[8*7+2]; + assign b[8*7+4] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+4] : fxu_breg_q[8*7+4]; + assign b[8*7+5] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+5] : fxu_breg_q[8*7+5]; + assign b[8*7+6] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+6] : fxu_breg_q[8*7+6]; + assign b[8*7+7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+7] : fxu_breg_q[8*7+7]; + assign b_n[8*7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7] : fxu_breg_n_q[8*7]; + assign b_n[8*7+1] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+1] : fxu_breg_n_q[8*7+1]; + assign b_n[8*7+2] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+2] : fxu_breg_n_q[8*7+2]; + assign b_n[8*7+3] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+3] : fxu_breg_n_q[8*7+3]; + assign b_n[8*7+4] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+4] : fxu_breg_n_q[8*7+4]; + assign b_n[8*7+5] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+5] : fxu_breg_n_q[8*7+5]; + assign b_n[8*7+6] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+6] : fxu_breg_n_q[8*7+6]; + assign b_n[8*7+7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+7] : fxu_breg_n_q[8*7+7]; + + assign b[8*4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4] : (bin_add_45_q) ? fxu_breg_q[8*4] : 1'b0; + assign b[8*4+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+1] : (bin_add_45_q) ? fxu_breg_q[8*4+1] : 1'b0; + assign b[8*4+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+2] : (bin_add_45_q) ? fxu_breg_q[8*4+2] : 1'b0; + assign b[8*4+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+3] : (bin_add_45_q) ? fxu_breg_q[8*4+3] : 1'b0; + assign b[8*4+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+4] : (bin_add_45_q) ? fxu_breg_q[8*4+4] : 1'b0; + assign b[8*4+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+5] : (bin_add_45_q) ? fxu_breg_q[8*4+5] : 1'b0; + assign b[8*4+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+6] : (bin_add_45_q) ? fxu_breg_q[8*4+6] : 1'b0; + assign b[8*4+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+7] : (bin_add_45_q) ? fxu_breg_q[8*4+7] : 1'b0; + assign b_n[8*4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4] : (bin_add_45_q) ? fxu_breg_n_q[8*4] : 1'b0; + assign b_n[8*4+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+1] : (bin_add_45_q) ? fxu_breg_n_q[8*4+1] : 1'b0; + assign b_n[8*4+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+2] : (bin_add_45_q) ? fxu_breg_n_q[8*4+2] : 1'b0; + assign b_n[8*4+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+3] : (bin_add_45_q) ? fxu_breg_n_q[8*4+3] : 1'b0; + assign b_n[8*4+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+4] : (bin_add_45_q) ? fxu_breg_n_q[8*4+4] : 1'b0; + assign b_n[8*4+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+5] : (bin_add_45_q) ? fxu_breg_n_q[8*4+5] : 1'b0; + assign b_n[8*4+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+6] : (bin_add_45_q) ? fxu_breg_n_q[8*4+6] : 1'b0; + assign b_n[8*4+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+7] : (bin_add_45_q) ? fxu_breg_n_q[8*4+7] : 1'b0; + + assign b[8*5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5] : (bin_add_45_q) ? fxu_breg_q[8*5] : 1'b0; + assign b[8*5+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+1] : (bin_add_45_q) ? fxu_breg_q[8*5+1] : 1'b0; + assign b[8*5+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+2] : (bin_add_45_q) ? fxu_breg_q[8*5+2] : 1'b0; + assign b[8*5+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+3] : (bin_add_45_q) ? fxu_breg_q[8*5+3] : 1'b0; + assign b[8*5+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+4] : (bin_add_45_q) ? fxu_breg_q[8*5+4] : 1'b0; + assign b[8*5+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+5] : (bin_add_45_q) ? fxu_breg_q[8*5+5] : 1'b0; + assign b[8*5+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+6] : (bin_add_45_q) ? fxu_breg_q[8*5+6] : 1'b0; + assign b[8*5+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+7] : (bin_add_45_q) ? fxu_breg_q[8*5+7] : 1'b0; + assign b_n[8*5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5] : (bin_add_45_q) ? fxu_breg_n_q[8*5] : 1'b0; + assign b_n[8*5+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+1] : (bin_add_45_q) ? fxu_breg_n_q[8*5+1] : 1'b0; + assign b_n[8*5+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+2] : (bin_add_45_q) ? fxu_breg_n_q[8*5+2] : 1'b0; + assign b_n[8*5+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+3] : (bin_add_45_q) ? fxu_breg_n_q[8*5+3] : 1'b0; + assign b_n[8*5+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+4] : (bin_add_45_q) ? fxu_breg_n_q[8*5+4] : 1'b0; + assign b_n[8*5+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+5] : (bin_add_45_q) ? fxu_breg_n_q[8*5+5] : 1'b0; + assign b_n[8*5+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+6] : (bin_add_45_q) ? fxu_breg_n_q[8*5+6] : 1'b0; + assign b_n[8*5+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+7] : (bin_add_45_q) ? fxu_breg_n_q[8*5+7] : 1'b0; + + assign c[64] = bin_cin_q; + assign c_n[64] = (~bin_cin_q); + + assign bruce_bin_sum[0] = (b_n[0] & a_n[0] & c[0+1]) | (b_n[0] & a[0] & c_n[0+1]) | (b[0] & a_n[0] & c_n[0+1]) | (b[0] & a[0] & c[0+1]); + assign p[0] = a[0] | b[0]; + assign p_n[0] = ~p[0]; + assign g[0] = a[0] & b[0]; + assign h_n[0] = g[0] | p_n[0]; + + assign bruce_bin_sum[1] = (b_n[1] & a_n[1] & c[1+1]) | (b_n[1] & a[1] & c_n[1+1]) | (b[1] & a_n[1] & c_n[1+1]) | (b[1] & a[1] & c[1+1]); + assign p[1] = a[1] | b[1]; + assign p_n[1] = ~p[1]; + assign g[1] = a[1] & b[1]; + assign h_n[1] = g[1] | p_n[1]; + + assign bruce_bin_sum[2] = (b_n[2] & a_n[2] & c[2+1]) | (b_n[2] & a[2] & c_n[2+1]) | (b[2] & a_n[2] & c_n[2+1]) | (b[2] & a[2] & c[2+1]); + assign p[2] = a[2] | b[2]; + assign p_n[2] = ~p[2]; + assign g[2] = a[2] & b[2]; + assign h_n[2] = g[2] | p_n[2]; + + assign bruce_bin_sum[3] = (b_n[3] & a_n[3] & c[3+1]) | (b_n[3] & a[3] & c_n[3+1]) | (b[3] & a_n[3] & c_n[3+1]) | (b[3] & a[3] & c[3+1]); + assign p[3] = a[3] | b[3]; + assign p_n[3] = ~p[3]; + assign g[3] = a[3] & b[3]; + assign h_n[3] = g[3] | p_n[3]; + + assign bruce_bin_sum[4] = (b_n[4] & a_n[4] & c[4+1]) | (b_n[4] & a[4] & c_n[4+1]) | (b[4] & a_n[4] & c_n[4+1]) | (b[4] & a[4] & c[4+1]); + assign p[4] = a[4] | b[4]; + assign p_n[4] = ~p[4]; + assign g[4] = a[4] & b[4]; + assign h_n[4] = g[4] | p_n[4]; + + assign bruce_bin_sum[5] = (b_n[5] & a_n[5] & c[5+1]) | (b_n[5] & a[5] & c_n[5+1]) | (b[5] & a_n[5] & c_n[5+1]) | (b[5] & a[5] & c[5+1]); + assign p[5] = a[5] | b[5]; + assign p_n[5] = ~p[5]; + assign g[5] = a[5] & b[5]; + assign h_n[5] = g[5] | p_n[5]; + + assign bruce_bin_sum[6] = (b_n[6] & a_n[6] & c[6+1]) | (b_n[6] & a[6] & c_n[6+1]) | (b[6] & a_n[6] & c_n[6+1]) | (b[6] & a[6] & c[6+1]); + assign p[6] = a[6] | b[6]; + assign p_n[6] = ~p[6]; + assign g[6] = a[6] & b[6]; + assign h_n[6] = g[6] | p_n[6]; + + assign bruce_bin_sum[7] = (b_n[7] & a_n[7] & c[7+1]) | (b_n[7] & a[7] & c_n[7+1]) | (b[7] & a_n[7] & c_n[7+1]) | (b[7] & a[7] & c[7+1]); + assign p[7] = a[7] | b[7]; + assign p_n[7] = ~p[7]; + assign g[7] = a[7] & b[7]; + assign h_n[7] = g[7] | p_n[7]; + + assign bruce_bin_sum[8] = (b_n[8] & a_n[8] & c[8+1]) | (b_n[8] & a[8] & c_n[8+1]) | (b[8] & a_n[8] & c_n[8+1]) | (b[8] & a[8] & c[8+1]); + assign p[8] = a[8] | b[8]; + assign p_n[8] = ~p[8]; + assign g[8] = a[8] & b[8]; + assign h_n[8] = g[8] | p_n[8]; + + assign bruce_bin_sum[9] = (b_n[9] & a_n[9] & c[9+1]) | (b_n[9] & a[9] & c_n[9+1]) | (b[9] & a_n[9] & c_n[9+1]) | (b[9] & a[9] & c[9+1]); + assign p[9] = a[9] | b[9]; + assign p_n[9] = ~p[9]; + assign g[9] = a[9] & b[9]; + assign h_n[9] = g[9] | p_n[9]; + + assign bruce_bin_sum[10] = (b_n[10] & a_n[10] & c[10+1]) | (b_n[10] & a[10] & c_n[10+1]) | (b[10] & a_n[10] & c_n[10+1]) | (b[10] & a[10] & c[10+1]); + assign p[10] = a[10] | b[10]; + assign p_n[10] = ~p[10]; + assign g[10] = a[10] & b[10]; + assign h_n[10] = g[10] | p_n[10]; + + assign bruce_bin_sum[11] = (b_n[11] & a_n[11] & c[11+1]) | (b_n[11] & a[11] & c_n[11+1]) | (b[11] & a_n[11] & c_n[11+1]) | (b[11] & a[11] & c[11+1]); + assign p[11] = a[11] | b[11]; + assign p_n[11] = ~p[11]; + assign g[11] = a[11] & b[11]; + assign h_n[11] = g[11] | p_n[11]; + + assign bruce_bin_sum[12] = (b_n[12] & a_n[12] & c[12+1]) | (b_n[12] & a[12] & c_n[12+1]) | (b[12] & a_n[12] & c_n[12+1]) | (b[12] & a[12] & c[12+1]); + assign p[12] = a[12] | b[12]; + assign p_n[12] = ~p[12]; + assign g[12] = a[12] & b[12]; + assign h_n[12] = g[12] | p_n[12]; + + assign bruce_bin_sum[13] = (b_n[13] & a_n[13] & c[13+1]) | (b_n[13] & a[13] & c_n[13+1]) | (b[13] & a_n[13] & c_n[13+1]) | (b[13] & a[13] & c[13+1]); + assign p[13] = a[13] | b[13]; + assign p_n[13] = ~p[13]; + assign g[13] = a[13] & b[13]; + assign h_n[13] = g[13] | p_n[13]; + + assign bruce_bin_sum[14] = (b_n[14] & a_n[14] & c[14+1]) | (b_n[14] & a[14] & c_n[14+1]) | (b[14] & a_n[14] & c_n[14+1]) | (b[14] & a[14] & c[14+1]); + assign p[14] = a[14] | b[14]; + assign p_n[14] = ~p[14]; + assign g[14] = a[14] & b[14]; + assign h_n[14] = g[14] | p_n[14]; + + assign bruce_bin_sum[15] = (b_n[15] & a_n[15] & c[15+1]) | (b_n[15] & a[15] & c_n[15+1]) | (b[15] & a_n[15] & c_n[15+1]) | (b[15] & a[15] & c[15+1]); + assign p[15] = a[15] | b[15]; + assign p_n[15] = ~p[15]; + assign g[15] = a[15] & b[15]; + assign h_n[15] = g[15] | p_n[15]; + + assign bruce_bin_sum[16] = (b_n[16] & a_n[16] & c[16+1]) | (b_n[16] & a[16] & c_n[16+1]) | (b[16] & a_n[16] & c_n[16+1]) | (b[16] & a[16] & c[16+1]); + assign p[16] = a[16] | b[16]; + assign p_n[16] = ~p[16]; + assign g[16] = a[16] & b[16]; + assign h_n[16] = g[16] | p_n[16]; + + assign bruce_bin_sum[17] = (b_n[17] & a_n[17] & c[17+1]) | (b_n[17] & a[17] & c_n[17+1]) | (b[17] & a_n[17] & c_n[17+1]) | (b[17] & a[17] & c[17+1]); + assign p[17] = a[17] | b[17]; + assign p_n[17] = ~p[17]; + assign g[17] = a[17] & b[17]; + assign h_n[17] = g[17] | p_n[17]; + + assign bruce_bin_sum[18] = (b_n[18] & a_n[18] & c[18+1]) | (b_n[18] & a[18] & c_n[18+1]) | (b[18] & a_n[18] & c_n[18+1]) | (b[18] & a[18] & c[18+1]); + assign p[18] = a[18] | b[18]; + assign p_n[18] = ~p[18]; + assign g[18] = a[18] & b[18]; + assign h_n[18] = g[18] | p_n[18]; + + assign bruce_bin_sum[19] = (b_n[19] & a_n[19] & c[19+1]) | (b_n[19] & a[19] & c_n[19+1]) | (b[19] & a_n[19] & c_n[19+1]) | (b[19] & a[19] & c[19+1]); + assign p[19] = a[19] | b[19]; + assign p_n[19] = ~p[19]; + assign g[19] = a[19] & b[19]; + assign h_n[19] = g[19] | p_n[19]; + + assign bruce_bin_sum[20] = (b_n[20] & a_n[20] & c[20+1]) | (b_n[20] & a[20] & c_n[20+1]) | (b[20] & a_n[20] & c_n[20+1]) | (b[20] & a[20] & c[20+1]); + assign p[20] = a[20] | b[20]; + assign p_n[20] = ~p[20]; + assign g[20] = a[20] & b[20]; + assign h_n[20] = g[20] | p_n[20]; + + assign bruce_bin_sum[21] = (b_n[21] & a_n[21] & c[21+1]) | (b_n[21] & a[21] & c_n[21+1]) | (b[21] & a_n[21] & c_n[21+1]) | (b[21] & a[21] & c[21+1]); + assign p[21] = a[21] | b[21]; + assign p_n[21] = ~p[21]; + assign g[21] = a[21] & b[21]; + assign h_n[21] = g[21] | p_n[21]; + + assign bruce_bin_sum[22] = (b_n[22] & a_n[22] & c[22+1]) | (b_n[22] & a[22] & c_n[22+1]) | (b[22] & a_n[22] & c_n[22+1]) | (b[22] & a[22] & c[22+1]); + assign p[22] = a[22] | b[22]; + assign p_n[22] = ~p[22]; + assign g[22] = a[22] & b[22]; + assign h_n[22] = g[22] | p_n[22]; + + assign bruce_bin_sum[23] = (b_n[23] & a_n[23] & c[23+1]) | (b_n[23] & a[23] & c_n[23+1]) | (b[23] & a_n[23] & c_n[23+1]) | (b[23] & a[23] & c[23+1]); + assign p[23] = a[23] | b[23]; + assign p_n[23] = ~p[23]; + assign g[23] = a[23] & b[23]; + assign h_n[23] = g[23] | p_n[23]; + + assign bruce_bin_sum[24] = (b_n[24] & a_n[24] & c[24+1]) | (b_n[24] & a[24] & c_n[24+1]) | (b[24] & a_n[24] & c_n[24+1]) | (b[24] & a[24] & c[24+1]); + assign p[24] = a[24] | b[24]; + assign p_n[24] = ~p[24]; + assign g[24] = a[24] & b[24]; + assign h_n[24] = g[24] | p_n[24]; + + assign bruce_bin_sum[25] = (b_n[25] & a_n[25] & c[25+1]) | (b_n[25] & a[25] & c_n[25+1]) | (b[25] & a_n[25] & c_n[25+1]) | (b[25] & a[25] & c[25+1]); + assign p[25] = a[25] | b[25]; + assign p_n[25] = ~p[25]; + assign g[25] = a[25] & b[25]; + assign h_n[25] = g[25] | p_n[25]; + + assign bruce_bin_sum[26] = (b_n[26] & a_n[26] & c[26+1]) | (b_n[26] & a[26] & c_n[26+1]) | (b[26] & a_n[26] & c_n[26+1]) | (b[26] & a[26] & c[26+1]); + assign p[26] = a[26] | b[26]; + assign p_n[26] = ~p[26]; + assign g[26] = a[26] & b[26]; + assign h_n[26] = g[26] | p_n[26]; + + assign bruce_bin_sum[27] = (b_n[27] & a_n[27] & c[27+1]) | (b_n[27] & a[27] & c_n[27+1]) | (b[27] & a_n[27] & c_n[27+1]) | (b[27] & a[27] & c[27+1]); + assign p[27] = a[27] | b[27]; + assign p_n[27] = ~p[27]; + assign g[27] = a[27] & b[27]; + assign h_n[27] = g[27] | p_n[27]; + + assign bruce_bin_sum[28] = (b_n[28] & a_n[28] & c[28+1]) | (b_n[28] & a[28] & c_n[28+1]) | (b[28] & a_n[28] & c_n[28+1]) | (b[28] & a[28] & c[28+1]); + assign p[28] = a[28] | b[28]; + assign p_n[28] = ~p[28]; + assign g[28] = a[28] & b[28]; + assign h_n[28] = g[28] | p_n[28]; + + assign bruce_bin_sum[29] = (b_n[29] & a_n[29] & c[29+1]) | (b_n[29] & a[29] & c_n[29+1]) | (b[29] & a_n[29] & c_n[29+1]) | (b[29] & a[29] & c[29+1]); + assign p[29] = a[29] | b[29]; + assign p_n[29] = ~p[29]; + assign g[29] = a[29] & b[29]; + assign h_n[29] = g[29] | p_n[29]; + + assign bruce_bin_sum[30] = (b_n[30] & a_n[30] & c[30+1]) | (b_n[30] & a[30] & c_n[30+1]) | (b[30] & a_n[30] & c_n[30+1]) | (b[30] & a[30] & c[30+1]); + assign p[30] = a[30] | b[30]; + assign p_n[30] = ~p[30]; + assign g[30] = a[30] & b[30]; + assign h_n[30] = g[30] | p_n[30]; + + assign bruce_bin_sum[31] = (b_n[31] & a_n[31] & c[31+1]) | (b_n[31] & a[31] & c_n[31+1]) | (b[31] & a_n[31] & c_n[31+1]) | (b[31] & a[31] & c[31+1]); + assign p[31] = a[31] | b[31]; + assign p_n[31] = ~p[31]; + assign g[31] = a[31] & b[31]; + assign h_n[31] = g[31] | p_n[31]; + + assign bruce_bin_sum[32] = (b_n[32] & a_n[32] & c[32+1]) | (b_n[32] & a[32] & c_n[32+1]) | (b[32] & a_n[32] & c_n[32+1]) | (b[32] & a[32] & c[32+1]); + assign p[32] = a[32] | b[32]; + assign p_n[32] = ~p[32]; + assign g[32] = a[32] & b[32]; + assign h_n[32] = g[32] | p_n[32]; + + assign bruce_bin_sum[33] = (b_n[33] & a_n[33] & c[33+1]) | (b_n[33] & a[33] & c_n[33+1]) | (b[33] & a_n[33] & c_n[33+1]) | (b[33] & a[33] & c[33+1]); + assign p[33] = a[33] | b[33]; + assign p_n[33] = ~p[33]; + assign g[33] = a[33] & b[33]; + assign h_n[33] = g[33] | p_n[33]; + + assign bruce_bin_sum[34] = (b_n[34] & a_n[34] & c[34+1]) | (b_n[34] & a[34] & c_n[34+1]) | (b[34] & a_n[34] & c_n[34+1]) | (b[34] & a[34] & c[34+1]); + assign p[34] = a[34] | b[34]; + assign p_n[34] = ~p[34]; + assign g[34] = a[34] & b[34]; + assign h_n[34] = g[34] | p_n[34]; + + assign bruce_bin_sum[35] = (b_n[35] & a_n[35] & c[35+1]) | (b_n[35] & a[35] & c_n[35+1]) | (b[35] & a_n[35] & c_n[35+1]) | (b[35] & a[35] & c[35+1]); + assign p[35] = a[35] | b[35]; + assign p_n[35] = ~p[35]; + assign g[35] = a[35] & b[35]; + assign h_n[35] = g[35] | p_n[35]; + + assign bruce_bin_sum[36] = (b_n[36] & a_n[36] & c[36+1]) | (b_n[36] & a[36] & c_n[36+1]) | (b[36] & a_n[36] & c_n[36+1]) | (b[36] & a[36] & c[36+1]); + assign p[36] = a[36] | b[36]; + assign p_n[36] = ~p[36]; + assign g[36] = a[36] & b[36]; + assign h_n[36] = g[36] | p_n[36]; + + assign bruce_bin_sum[37] = (b_n[37] & a_n[37] & c[37+1]) | (b_n[37] & a[37] & c_n[37+1]) | (b[37] & a_n[37] & c_n[37+1]) | (b[37] & a[37] & c[37+1]); + assign p[37] = a[37] | b[37]; + assign p_n[37] = ~p[37]; + assign g[37] = a[37] & b[37]; + assign h_n[37] = g[37] | p_n[37]; + + assign bruce_bin_sum[38] = (b_n[38] & a_n[38] & c[38+1]) | (b_n[38] & a[38] & c_n[38+1]) | (b[38] & a_n[38] & c_n[38+1]) | (b[38] & a[38] & c[38+1]); + assign p[38] = a[38] | b[38]; + assign p_n[38] = ~p[38]; + assign g[38] = a[38] & b[38]; + assign h_n[38] = g[38] | p_n[38]; + + assign bruce_bin_sum[39] = (b_n[39] & a_n[39] & c[39+1]) | (b_n[39] & a[39] & c_n[39+1]) | (b[39] & a_n[39] & c_n[39+1]) | (b[39] & a[39] & c[39+1]); + assign p[39] = a[39] | b[39]; + assign p_n[39] = ~p[39]; + assign g[39] = a[39] & b[39]; + assign h_n[39] = g[39] | p_n[39]; + + assign bruce_bin_sum[40] = (b_n[40] & a_n[40] & c[40+1]) | (b_n[40] & a[40] & c_n[40+1]) | (b[40] & a_n[40] & c_n[40+1]) | (b[40] & a[40] & c[40+1]); + assign p[40] = a[40] | b[40]; + assign p_n[40] = ~p[40]; + assign g[40] = a[40] & b[40]; + assign h_n[40] = g[40] | p_n[40]; + + assign bruce_bin_sum[41] = (b_n[41] & a_n[41] & c[41+1]) | (b_n[41] & a[41] & c_n[41+1]) | (b[41] & a_n[41] & c_n[41+1]) | (b[41] & a[41] & c[41+1]); + assign p[41] = a[41] | b[41]; + assign p_n[41] = ~p[41]; + assign g[41] = a[41] & b[41]; + assign h_n[41] = g[41] | p_n[41]; + + assign bruce_bin_sum[42] = (b_n[42] & a_n[42] & c[42+1]) | (b_n[42] & a[42] & c_n[42+1]) | (b[42] & a_n[42] & c_n[42+1]) | (b[42] & a[42] & c[42+1]); + assign p[42] = a[42] | b[42]; + assign p_n[42] = ~p[42]; + assign g[42] = a[42] & b[42]; + assign h_n[42] = g[42] | p_n[42]; + + assign bruce_bin_sum[43] = (b_n[43] & a_n[43] & c[43+1]) | (b_n[43] & a[43] & c_n[43+1]) | (b[43] & a_n[43] & c_n[43+1]) | (b[43] & a[43] & c[43+1]); + assign p[43] = a[43] | b[43]; + assign p_n[43] = ~p[43]; + assign g[43] = a[43] & b[43]; + assign h_n[43] = g[43] | p_n[43]; + + assign bruce_bin_sum[44] = (b_n[44] & a_n[44] & c[44+1]) | (b_n[44] & a[44] & c_n[44+1]) | (b[44] & a_n[44] & c_n[44+1]) | (b[44] & a[44] & c[44+1]); + assign p[44] = a[44] | b[44]; + assign p_n[44] = ~p[44]; + assign g[44] = a[44] & b[44]; + assign h_n[44] = g[44] | p_n[44]; + + assign bruce_bin_sum[45] = (b_n[45] & a_n[45] & c[45+1]) | (b_n[45] & a[45] & c_n[45+1]) | (b[45] & a_n[45] & c_n[45+1]) | (b[45] & a[45] & c[45+1]); + assign p[45] = a[45] | b[45]; + assign p_n[45] = ~p[45]; + assign g[45] = a[45] & b[45]; + assign h_n[45] = g[45] | p_n[45]; + + assign bruce_bin_sum[46] = (b_n[46] & a_n[46] & c[46+1]) | (b_n[46] & a[46] & c_n[46+1]) | (b[46] & a_n[46] & c_n[46+1]) | (b[46] & a[46] & c[46+1]); + assign p[46] = a[46] | b[46]; + assign p_n[46] = ~p[46]; + assign g[46] = a[46] & b[46]; + assign h_n[46] = g[46] | p_n[46]; + + assign bruce_bin_sum[47] = (b_n[47] & a_n[47] & c[47+1]) | (b_n[47] & a[47] & c_n[47+1]) | (b[47] & a_n[47] & c_n[47+1]) | (b[47] & a[47] & c[47+1]); + assign p[47] = a[47] | b[47]; + assign p_n[47] = ~p[47]; + assign g[47] = a[47] & b[47]; + assign h_n[47] = g[47] | p_n[47]; + + assign bruce_bin_sum[48] = (b_n[48] & a_n[48] & c[48+1]) | (b_n[48] & a[48] & c_n[48+1]) | (b[48] & a_n[48] & c_n[48+1]) | (b[48] & a[48] & c[48+1]); + assign p[48] = a[48] | b[48]; + assign p_n[48] = ~p[48]; + assign g[48] = a[48] & b[48]; + assign h_n[48] = g[48] | p_n[48]; + + assign bruce_bin_sum[49] = (b_n[49] & a_n[49] & c[49+1]) | (b_n[49] & a[49] & c_n[49+1]) | (b[49] & a_n[49] & c_n[49+1]) | (b[49] & a[49] & c[49+1]); + assign p[49] = a[49] | b[49]; + assign p_n[49] = ~p[49]; + assign g[49] = a[49] & b[49]; + assign h_n[49] = g[49] | p_n[49]; + + assign bruce_bin_sum[50] = (b_n[50] & a_n[50] & c[50+1]) | (b_n[50] & a[50] & c_n[50+1]) | (b[50] & a_n[50] & c_n[50+1]) | (b[50] & a[50] & c[50+1]); + assign p[50] = a[50] | b[50]; + assign p_n[50] = ~p[50]; + assign g[50] = a[50] & b[50]; + assign h_n[50] = g[50] | p_n[50]; + + assign bruce_bin_sum[51] = (b_n[51] & a_n[51] & c[51+1]) | (b_n[51] & a[51] & c_n[51+1]) | (b[51] & a_n[51] & c_n[51+1]) | (b[51] & a[51] & c[51+1]); + assign p[51] = a[51] | b[51]; + assign p_n[51] = ~p[51]; + assign g[51] = a[51] & b[51]; + assign h_n[51] = g[51] | p_n[51]; + + assign bruce_bin_sum[52] = (b_n[52] & a_n[52] & c[52+1]) | (b_n[52] & a[52] & c_n[52+1]) | (b[52] & a_n[52] & c_n[52+1]) | (b[52] & a[52] & c[52+1]); + assign p[52] = a[52] | b[52]; + assign p_n[52] = ~p[52]; + assign g[52] = a[52] & b[52]; + assign h_n[52] = g[52] | p_n[52]; + + assign bruce_bin_sum[53] = (b_n[53] & a_n[53] & c[53+1]) | (b_n[53] & a[53] & c_n[53+1]) | (b[53] & a_n[53] & c_n[53+1]) | (b[53] & a[53] & c[53+1]); + assign p[53] = a[53] | b[53]; + assign p_n[53] = ~p[53]; + assign g[53] = a[53] & b[53]; + assign h_n[53] = g[53] | p_n[53]; + + assign bruce_bin_sum[54] = (b_n[54] & a_n[54] & c[54+1]) | (b_n[54] & a[54] & c_n[54+1]) | (b[54] & a_n[54] & c_n[54+1]) | (b[54] & a[54] & c[54+1]); + assign p[54] = a[54] | b[54]; + assign p_n[54] = ~p[54]; + assign g[54] = a[54] & b[54]; + assign h_n[54] = g[54] | p_n[54]; + + assign bruce_bin_sum[55] = (b_n[55] & a_n[55] & c[55+1]) | (b_n[55] & a[55] & c_n[55+1]) | (b[55] & a_n[55] & c_n[55+1]) | (b[55] & a[55] & c[55+1]); + assign p[55] = a[55] | b[55]; + assign p_n[55] = ~p[55]; + assign g[55] = a[55] & b[55]; + assign h_n[55] = g[55] | p_n[55]; + + assign bruce_bin_sum[56] = (b_n[56] & a_n[56] & c[56+1]) | (b_n[56] & a[56] & c_n[56+1]) | (b[56] & a_n[56] & c_n[56+1]) | (b[56] & a[56] & c[56+1]); + assign p[56] = a[56] | b[56]; + assign p_n[56] = ~p[56]; + assign g[56] = a[56] & b[56]; + assign h_n[56] = g[56] | p_n[56]; + + assign bruce_bin_sum[57] = (b_n[57] & a_n[57] & c[57+1]) | (b_n[57] & a[57] & c_n[57+1]) | (b[57] & a_n[57] & c_n[57+1]) | (b[57] & a[57] & c[57+1]); + assign p[57] = a[57] | b[57]; + assign p_n[57] = ~p[57]; + assign g[57] = a[57] & b[57]; + assign h_n[57] = g[57] | p_n[57]; + + assign bruce_bin_sum[58] = (b_n[58] & a_n[58] & c[58+1]) | (b_n[58] & a[58] & c_n[58+1]) | (b[58] & a_n[58] & c_n[58+1]) | (b[58] & a[58] & c[58+1]); + assign p[58] = a[58] | b[58]; + assign p_n[58] = ~p[58]; + assign g[58] = a[58] & b[58]; + assign h_n[58] = g[58] | p_n[58]; + + assign bruce_bin_sum[59] = (b_n[59] & a_n[59] & c[59+1]) | (b_n[59] & a[59] & c_n[59+1]) | (b[59] & a_n[59] & c_n[59+1]) | (b[59] & a[59] & c[59+1]); + assign p[59] = a[59] | b[59]; + assign p_n[59] = ~p[59]; + assign g[59] = a[59] & b[59]; + assign h_n[59] = g[59] | p_n[59]; + + assign bruce_bin_sum[60] = (b_n[60] & a_n[60] & c[60+1]) | (b_n[60] & a[60] & c_n[60+1]) | (b[60] & a_n[60] & c_n[60+1]) | (b[60] & a[60] & c[60+1]); + assign p[60] = a[60] | b[60]; + assign p_n[60] = ~p[60]; + assign g[60] = a[60] & b[60]; + assign h_n[60] = g[60] | p_n[60]; + + assign bruce_bin_sum[61] = (b_n[61] & a_n[61] & c[61+1]) | (b_n[61] & a[61] & c_n[61+1]) | (b[61] & a_n[61] & c_n[61+1]) | (b[61] & a[61] & c[61+1]); + assign p[61] = a[61] | b[61]; + assign p_n[61] = ~p[61]; + assign g[61] = a[61] & b[61]; + assign h_n[61] = g[61] | p_n[61]; + + assign bruce_bin_sum[62] = (b_n[62] & a_n[62] & c[62+1]) | (b_n[62] & a[62] & c_n[62+1]) | (b[62] & a_n[62] & c_n[62+1]) | (b[62] & a[62] & c[62+1]); + assign p[62] = a[62] | b[62]; + assign p_n[62] = ~p[62]; + assign g[62] = a[62] & b[62]; + assign h_n[62] = g[62] | p_n[62]; + + assign bruce_bin_sum[63] = (b_n[63] & a_n[63] & c[63+1]) | (b_n[63] & a[63] & c_n[63+1]) | (b[63] & a_n[63] & c_n[63+1]) | (b[63] & a[63] & c[63+1]); + assign p[63] = a[63] | b[63]; + assign p_n[63] = ~p[63]; + assign g[63] = a[63] & b[63]; + assign h_n[63] = g[63] | p_n[63]; + + assign bin_sum[0:63] = (alu_cmd[0:3] == 4'b0010) ? bruce_bin_sum[0:63] + 2'b01 : bruce_bin_sum[0:63]; + + assign d[0] = h_n[0] ^ p[0+1]; + assign d[1] = h_n[1] ^ p[1+1]; + assign d[2] = h_n[2] ^ p[2+1]; + assign d[3] = h_n[3] ^ p[3+1]; + assign d[4] = h_n[4] ^ p[4+1]; + assign d[5] = h_n[5] ^ p[5+1]; + assign d[6] = h_n[6] ^ p[6+1]; + assign d[7] = h_n[7] ^ p[7+1]; + assign d[8] = h_n[8] ^ p[8+1]; + assign d[9] = h_n[9] ^ p[9+1]; + assign d[10] = h_n[10] ^ p[10+1]; + assign d[11] = h_n[11] ^ p[11+1]; + assign d[12] = h_n[12] ^ p[12+1]; + assign d[13] = h_n[13] ^ p[13+1]; + assign d[14] = h_n[14] ^ p[14+1]; + assign d[15] = h_n[15] ^ p[15+1]; + assign d[16] = h_n[16] ^ p[16+1]; + assign d[17] = h_n[17] ^ p[17+1]; + assign d[18] = h_n[18] ^ p[18+1]; + assign d[19] = h_n[19] ^ p[19+1]; + assign d[20] = h_n[20] ^ p[20+1]; + assign d[21] = h_n[21] ^ p[21+1]; + assign d[22] = h_n[22] ^ p[22+1]; + assign d[23] = h_n[23] ^ p[23+1]; + assign d[24] = h_n[24] ^ p[24+1]; + assign d[25] = h_n[25] ^ p[25+1]; + assign d[26] = h_n[26] ^ p[26+1]; + assign d[27] = h_n[27] ^ p[27+1]; + assign d[28] = h_n[28] ^ p[28+1]; + assign d[29] = h_n[29] ^ p[29+1]; + assign d[30] = h_n[30] ^ p[30+1]; + assign d[31] = h_n[31] ^ p[31+1]; + assign d[32] = h_n[32] ^ p[32+1]; + assign d[33] = h_n[33] ^ p[33+1]; + assign d[34] = h_n[34] ^ p[34+1]; + assign d[35] = h_n[35] ^ p[35+1]; + assign d[36] = h_n[36] ^ p[36+1]; + assign d[37] = h_n[37] ^ p[37+1]; + assign d[38] = h_n[38] ^ p[38+1]; + assign d[39] = h_n[39] ^ p[39+1]; + assign d[40] = h_n[40] ^ p[40+1]; + assign d[41] = h_n[41] ^ p[41+1]; + assign d[42] = h_n[42] ^ p[42+1]; + assign d[43] = h_n[43] ^ p[43+1]; + assign d[44] = h_n[44] ^ p[44+1]; + assign d[45] = h_n[45] ^ p[45+1]; + assign d[46] = h_n[46] ^ p[46+1]; + assign d[47] = h_n[47] ^ p[47+1]; + assign d[48] = h_n[48] ^ p[48+1]; + assign d[49] = h_n[49] ^ p[49+1]; + assign d[50] = h_n[50] ^ p[50+1]; + assign d[51] = h_n[51] ^ p[51+1]; + assign d[52] = h_n[52] ^ p[52+1]; + assign d[53] = h_n[53] ^ p[53+1]; + assign d[54] = h_n[54] ^ p[54+1]; + assign d[55] = h_n[55] ^ p[55+1]; + assign d[56] = h_n[56] ^ p[56+1]; + assign d[57] = h_n[57] ^ p[57+1]; + assign d[58] = h_n[58] ^ p[58+1]; + assign d[59] = h_n[59] ^ p[59+1]; + assign d[60] = h_n[60] ^ p[60+1]; + assign d[61] = h_n[61] ^ p[61+1]; + assign d[62] = h_n[62] ^ p[62+1]; + + assign d[63] = h_n[63] ^ bin_sub_q; + + assign d8[0] = d[8*0] & d[8*0+1] & d[8*0+2] & d[8*0+3] & d[8*0+4] & d[8*0+5] & d[8*0+6] & d[8*0+7]; + assign d8[1] = d[8*1] & d[8*1+1] & d[8*1+2] & d[8*1+3] & d[8*1+4] & d[8*1+5] & d[8*1+6] & d[8*1+7]; + assign d8[2] = d[8*2] & d[8*2+1] & d[8*2+2] & d[8*2+3] & d[8*2+4] & d[8*2+5] & d[8*2+6] & d[8*2+7]; + assign d8[3] = d[8*3] & d[8*3+1] & d[8*3+2] & d[8*3+3] & d[8*3+4] & d[8*3+5] & d[8*3+6] & d[8*3+7]; + assign d8[4] = d[8*4] & d[8*4+1] & d[8*4+2] & d[8*4+3] & d[8*4+4] & d[8*4+5] & d[8*4+6] & d[8*4+7]; + assign d8[5] = d[8*5] & d[8*5+1] & d[8*5+2] & d[8*5+3] & d[8*5+4] & d[8*5+5] & d[8*5+6] & d[8*5+7]; + assign d8[6] = d[8*6] & d[8*6+1] & d[8*6+2] & d[8*6+3] & d[8*6+4] & d[8*6+5] & d[8*6+6] & d[8*6+7]; + assign d8[7] = d[8*7] & d[8*7+1] & d[8*7+2] & d[8*7+3] & d[8*7+4] & d[8*7+5] & d[8*7+6] & d[8*7+7]; + + assign ds = d[33] & d[34] & d[35] & d[36] & d[37] & d[38] & d[39]; + + assign bin_sum_0_63_z = d8[0] & d8[1] & d8[2] & d8[3] & d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_32_63_z = d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_33_63_z = ds & d8[5] & d8[6] & d8[7]; + + assign G2[0] = g[2*0] | (p[2*0] & g[2*0+1]); + assign P2[0] = p[2*0] & p[2*0+1]; + assign G2[1] = g[2*1] | (p[2*1] & g[2*1+1]); + assign P2[1] = p[2*1] & p[2*1+1]; + assign G2[2] = g[2*2] | (p[2*2] & g[2*2+1]); + assign P2[2] = p[2*2] & p[2*2+1]; + assign G2[3] = g[2*3] | (p[2*3] & g[2*3+1]); + assign P2[3] = p[2*3] & p[2*3+1]; + assign G2[4] = g[2*4] | (p[2*4] & g[2*4+1]); + assign P2[4] = p[2*4] & p[2*4+1]; + assign G2[5] = g[2*5] | (p[2*5] & g[2*5+1]); + assign P2[5] = p[2*5] & p[2*5+1]; + assign G2[6] = g[2*6] | (p[2*6] & g[2*6+1]); + assign P2[6] = p[2*6] & p[2*6+1]; + assign G2[7] = g[2*7] | (p[2*7] & g[2*7+1]); + assign P2[7] = p[2*7] & p[2*7+1]; + assign G2[8] = g[2*8] | (p[2*8] & g[2*8+1]); + assign P2[8] = p[2*8] & p[2*8+1]; + assign G2[9] = g[2*9] | (p[2*9] & g[2*9+1]); + assign P2[9] = p[2*9] & p[2*9+1]; + assign G2[10] = g[2*10] | (p[2*10] & g[2*10+1]); + assign P2[10] = p[2*10] & p[2*10+1]; + assign G2[11] = g[2*11] | (p[2*11] & g[2*11+1]); + assign P2[11] = p[2*11] & p[2*11+1]; + assign G2[12] = g[2*12] | (p[2*12] & g[2*12+1]); + assign P2[12] = p[2*12] & p[2*12+1]; + assign G2[13] = g[2*13] | (p[2*13] & g[2*13+1]); + assign P2[13] = p[2*13] & p[2*13+1]; + assign G2[14] = g[2*14] | (p[2*14] & g[2*14+1]); + assign P2[14] = p[2*14] & p[2*14+1]; + assign G2[15] = g[2*15] | (p[2*15] & g[2*15+1]); + assign P2[15] = p[2*15] & p[2*15+1]; + assign G2[16] = g[2*16] | (p[2*16] & g[2*16+1]); + assign P2[16] = p[2*16] & p[2*16+1]; + assign G2[17] = g[2*17] | (p[2*17] & g[2*17+1]); + assign P2[17] = p[2*17] & p[2*17+1]; + assign G2[18] = g[2*18] | (p[2*18] & g[2*18+1]); + assign P2[18] = p[2*18] & p[2*18+1]; + assign G2[19] = g[2*19] | (p[2*19] & g[2*19+1]); + assign P2[19] = p[2*19] & p[2*19+1]; + assign G2[20] = g[2*20] | (p[2*20] & g[2*20+1]); + assign P2[20] = p[2*20] & p[2*20+1]; + assign G2[21] = g[2*21] | (p[2*21] & g[2*21+1]); + assign P2[21] = p[2*21] & p[2*21+1]; + assign G2[22] = g[2*22] | (p[2*22] & g[2*22+1]); + assign P2[22] = p[2*22] & p[2*22+1]; + assign G2[23] = g[2*23] | (p[2*23] & g[2*23+1]); + assign P2[23] = p[2*23] & p[2*23+1]; + assign G2[24] = g[2*24] | (p[2*24] & g[2*24+1]); + assign P2[24] = p[2*24] & p[2*24+1]; + assign G2[25] = g[2*25] | (p[2*25] & g[2*25+1]); + assign P2[25] = p[2*25] & p[2*25+1]; + assign G2[26] = g[2*26] | (p[2*26] & g[2*26+1]); + assign P2[26] = p[2*26] & p[2*26+1]; + assign G2[27] = g[2*27] | (p[2*27] & g[2*27+1]); + assign P2[27] = p[2*27] & p[2*27+1]; + assign G2[28] = g[2*28] | (p[2*28] & g[2*28+1]); + assign P2[28] = p[2*28] & p[2*28+1]; + assign G2[29] = g[2*29] | (p[2*29] & g[2*29+1]); + assign P2[29] = p[2*29] & p[2*29+1]; + assign G2[30] = g[2*30] | (p[2*30] & g[2*30+1]); + assign P2[30] = p[2*30] & p[2*30+1]; + assign G2[31] = g[2*31] | (p[2*31] & g[2*31+1]); + assign P2[31] = p[2*31] & p[2*31+1]; + + assign Gn[0] = G2[2*0] | (P2[2*0] & G2[2*0+1]); + assign Pn[0] = P2[2*0] & P2[2*0+1]; + + assign Gn[1] = G2[2*1] | (P2[2*1] & G2[2*1+1]); + assign Pn[1] = P2[2*1] & P2[2*1+1]; + + assign Gn[2] = G2[2*2] | (P2[2*2] & G2[2*2+1]); + assign Pn[2] = P2[2*2] & P2[2*2+1]; + + assign Gn[3] = G2[2*3] | (P2[2*3] & G2[2*3+1]); + assign Pn[3] = P2[2*3] & P2[2*3+1]; + + assign Gn[4] = G2[2*4] | (P2[2*4] & G2[2*4+1]); + assign Pn[4] = P2[2*4] & P2[2*4+1]; + + assign Gn[5] = G2[2*5] | (P2[2*5] & G2[2*5+1]); + assign Pn[5] = P2[2*5] & P2[2*5+1]; + + assign Gn[6] = G2[2*6] | (P2[2*6] & G2[2*6+1]); + assign Pn[6] = P2[2*6] & P2[2*6+1]; + + assign Gn[7] = G2[2*7] | (P2[2*7] & G2[2*7+1]); + assign Pn[7] = P2[2*7] & P2[2*7+1]; + + assign Gn[8] = G2[2*8] | (P2[2*8] & G2[2*8+1]); + assign Pn[8] = P2[2*8] & P2[2*8+1]; + + assign Gn[9] = G2[2*9] | (P2[2*9] & G2[2*9+1]); + assign Pn[9] = P2[2*9] & P2[2*9+1]; + + assign Gn[10] = G2[2*10] | (P2[2*10] & G2[2*10+1]); + assign Pn[10] = P2[2*10] & P2[2*10+1]; + + assign Gn[11] = G2[2*11] | (P2[2*11] & G2[2*11+1]); + assign Pn[11] = P2[2*11] & P2[2*11+1]; + + assign Gn[12] = G2[2*12] | (P2[2*12] & G2[2*12+1]); + assign Pn[12] = P2[2*12] & P2[2*12+1]; + + assign Gn[13] = G2[2*13] | (P2[2*13] & G2[2*13+1]); + assign Pn[13] = P2[2*13] & P2[2*13+1]; + + assign Gn[14] = G2[2*14] | (P2[2*14] & G2[2*14+1]); + assign Pn[14] = P2[2*14] & P2[2*14+1]; + + assign Gn[15] = G2[2*15] | (P2[2*15] & G2[2*15+1]); + assign Pn[15] = P2[2*15] & P2[2*15+1]; + + assign Gb[0] = Gn[2*0] | (Pn[2*0] & Gn[2*0+1]); + assign Pb[0] = Pn[2*0] & Pn[2*0+1]; + + assign Gb[1] = Gn[2*1] | (Pn[2*1] & Gn[2*1+1]); + assign Pb[1] = Pn[2*1] & Pn[2*1+1]; + + assign Gb[2] = Gn[2*2] | (Pn[2*2] & Gn[2*2+1]); + assign Pb[2] = Pn[2*2] & Pn[2*2+1]; + + assign Gb[3] = Gn[2*3] | (Pn[2*3] & Gn[2*3+1]); + assign Pb[3] = Pn[2*3] & Pn[2*3+1]; + + assign Gb[4] = Gn[2*4] | (Pn[2*4] & Gn[2*4+1]); + assign Pb[4] = Pn[2*4] & Pn[2*4+1]; + + assign Gb[5] = Gn[2*5] | (Pn[2*5] & Gn[2*5+1]); + assign Pb[5] = Pn[2*5] & Pn[2*5+1]; + + assign Gb[6] = Gn[2*6] | (Pn[2*6] & Gn[2*6+1]); + assign Pb[6] = Pn[2*6] & Pn[2*6+1]; + + assign Gb[7] = Gn[2*7] | (Pn[2*7] & Gn[2*7+1]); + assign Pb[7] = Pn[2*7] & Pn[2*7+1]; + + assign G2b[2] = Gb[2+1] | (Pb[2+1] & Gb[2+2]); + assign P2b[2] = Pb[2+1] & Pb[2+2]; + + assign G2b[3] = Gb[3+1] | (Pb[3+1] & Gb[3+2]); + assign P2b[3] = Pb[3+1] & Pb[3+2]; + + assign G2b[4] = Gb[4+1] | (Pb[4+1] & Gb[4+2]); + assign P2b[4] = Pb[4+1] & Pb[4+2]; + + assign G2b[5] = Gb[5+1] | (Pb[5+1] & Gb[5+2]); + assign P2b[5] = Pb[5+1] & Pb[5+2]; + + + assign G2b[0] = Gb[1] | (Pb[1] & Gb[2]); + assign P2b[0] = Pb[1] & Pb[2]; + assign G2b[1] = Gb[2] | (Pb[2] & Gb[3]); + assign P2b[1] = Pb[2] & Pb[3]; + + assign c[56] = Gb[7] | (Pb[7] & c[64]); + assign c[48] = G2b[5] | (P2b[5] & c[64]); + assign c[40] = G2b[4] | (P2b[4] & c[56]); + assign c[32] = G2b[3] | (P2b[3] & c[48]); + assign bin_c_32 = Gb[4] | (Pb[4] & c[40]); + assign c[24] = G2b[2] | (P2b[2] & c[40]); + assign c[16] = G2b[1] | (P2b[1] & c[24]); + assign c[8] = G2b[0] | (P2b[0] & c[24]); + assign c[0] = Gb[0] | (Pb[0] & c[8]); + + assign c[8*0+4] = Gn[2*0+1] | (Pn[2*0+1] & c[8*0+8]); + assign c[8*1+4] = Gn[2*1+1] | (Pn[2*1+1] & c[8*1+8]); + assign c[8*2+4] = Gn[2*2+1] | (Pn[2*2+1] & c[8*2+8]); + assign c[8*3+4] = Gn[2*3+1] | (Pn[2*3+1] & c[8*3+8]); + assign c[8*4+4] = Gn[2*4+1] | (Pn[2*4+1] & c[8*4+8]); + assign c[8*5+4] = Gn[2*5+1] | (Pn[2*5+1] & c[8*5+8]); + assign c[8*6+4] = Gn[2*6+1] | (Pn[2*6+1] & c[8*6+8]); + assign c[8*7+4] = Gn[2*7+1] | (Pn[2*7+1] & c[8*7+8]); + + assign c[4*0+2] = G2[2*0+1] | (P2[2*0+1] & c[4*0+4]); + assign c[4*1+2] = G2[2*1+1] | (P2[2*1+1] & c[4*1+4]); + assign c[4*2+2] = G2[2*2+1] | (P2[2*2+1] & c[4*2+4]); + assign c[4*3+2] = G2[2*3+1] | (P2[2*3+1] & c[4*3+4]); + assign c[4*4+2] = G2[2*4+1] | (P2[2*4+1] & c[4*4+4]); + assign c[4*5+2] = G2[2*5+1] | (P2[2*5+1] & c[4*5+4]); + assign c[4*6+2] = G2[2*6+1] | (P2[2*6+1] & c[4*6+4]); + assign c[4*7+2] = G2[2*7+1] | (P2[2*7+1] & c[4*7+4]); + assign c[4*8+2] = G2[2*8+1] | (P2[2*8+1] & c[4*8+4]); + assign c[4*9+2] = G2[2*9+1] | (P2[2*9+1] & c[4*9+4]); + assign c[4*10+2] = G2[2*10+1] | (P2[2*10+1] & c[4*10+4]); + assign c[4*11+2] = G2[2*11+1] | (P2[2*11+1] & c[4*11+4]); + assign c[4*12+2] = G2[2*12+1] | (P2[2*12+1] & c[4*12+4]); + assign c[4*13+2] = G2[2*13+1] | (P2[2*13+1] & c[4*13+4]); + assign c[4*14+2] = G2[2*14+1] | (P2[2*14+1] & c[4*14+4]); + assign c[4*15+2] = G2[2*15+1] | (P2[2*15+1] & c[4*15+4]); + + assign c[2*0+1] = g[2*0+1] | (p[2*0+1] & c[2*0+2]); + assign c[2*1+1] = g[2*1+1] | (p[2*1+1] & c[2*1+2]); + assign c[2*2+1] = g[2*2+1] | (p[2*2+1] & c[2*2+2]); + assign c[2*3+1] = g[2*3+1] | (p[2*3+1] & c[2*3+2]); + assign c[2*4+1] = g[2*4+1] | (p[2*4+1] & c[2*4+2]); + assign c[2*5+1] = g[2*5+1] | (p[2*5+1] & c[2*5+2]); + assign c[2*6+1] = g[2*6+1] | (p[2*6+1] & c[2*6+2]); + assign c[2*7+1] = g[2*7+1] | (p[2*7+1] & c[2*7+2]); + assign c[2*8+1] = g[2*8+1] | (p[2*8+1] & c[2*8+2]); + assign c[2*9+1] = g[2*9+1] | (p[2*9+1] & c[2*9+2]); + assign c[2*10+1] = g[2*10+1] | (p[2*10+1] & c[2*10+2]); + assign c[2*11+1] = g[2*11+1] | (p[2*11+1] & c[2*11+2]); + assign c[2*12+1] = g[2*12+1] | (p[2*12+1] & c[2*12+2]); + assign c[2*13+1] = g[2*13+1] | (p[2*13+1] & c[2*13+2]); + assign c[2*14+1] = g[2*14+1] | (p[2*14+1] & c[2*14+2]); + assign c[2*15+1] = g[2*15+1] | (p[2*15+1] & c[2*15+2]); + assign c[2*16+1] = g[2*16+1] | (p[2*16+1] & c[2*16+2]); + assign c[2*17+1] = g[2*17+1] | (p[2*17+1] & c[2*17+2]); + assign c[2*18+1] = g[2*18+1] | (p[2*18+1] & c[2*18+2]); + assign c[2*19+1] = g[2*19+1] | (p[2*19+1] & c[2*19+2]); + assign c[2*20+1] = g[2*20+1] | (p[2*20+1] & c[2*20+2]); + assign c[2*21+1] = g[2*21+1] | (p[2*21+1] & c[2*21+2]); + assign c[2*22+1] = g[2*22+1] | (p[2*22+1] & c[2*22+2]); + assign c[2*23+1] = g[2*23+1] | (p[2*23+1] & c[2*23+2]); + assign c[2*24+1] = g[2*24+1] | (p[2*24+1] & c[2*24+2]); + assign c[2*25+1] = g[2*25+1] | (p[2*25+1] & c[2*25+2]); + assign c[2*26+1] = g[2*26+1] | (p[2*26+1] & c[2*26+2]); + assign c[2*27+1] = g[2*27+1] | (p[2*27+1] & c[2*27+2]); + assign c[2*28+1] = g[2*28+1] | (p[2*28+1] & c[2*28+2]); + assign c[2*29+1] = g[2*29+1] | (p[2*29+1] & c[2*29+2]); + assign c[2*30+1] = g[2*30+1] | (p[2*30+1] & c[2*30+2]); + assign c[2*31+1] = g[2*31+1] | (p[2*31+1] & c[2*31+2]); + + assign c_n[0] = ~c[0]; + assign c_n[1] = ~c[1]; + assign c_n[2] = ~c[2]; + assign c_n[3] = ~c[3]; + assign c_n[4] = ~c[4]; + assign c_n[5] = ~c[5]; + assign c_n[6] = ~c[6]; + assign c_n[7] = ~c[7]; + assign c_n[8] = ~c[8]; + assign c_n[9] = ~c[9]; + assign c_n[10] = ~c[10]; + assign c_n[11] = ~c[11]; + assign c_n[12] = ~c[12]; + assign c_n[13] = ~c[13]; + assign c_n[14] = ~c[14]; + assign c_n[15] = ~c[15]; + assign c_n[16] = ~c[16]; + assign c_n[17] = ~c[17]; + assign c_n[18] = ~c[18]; + assign c_n[19] = ~c[19]; + assign c_n[20] = ~c[20]; + assign c_n[21] = ~c[21]; + assign c_n[22] = ~c[22]; + assign c_n[23] = ~c[23]; + assign c_n[24] = ~c[24]; + assign c_n[25] = ~c[25]; + assign c_n[26] = ~c[26]; + assign c_n[27] = ~c[27]; + assign c_n[28] = ~c[28]; + assign c_n[29] = ~c[29]; + assign c_n[30] = ~c[30]; + assign c_n[31] = ~c[31]; + assign c_n[32] = ~c[32]; + assign c_n[33] = ~c[33]; + assign c_n[34] = ~c[34]; + assign c_n[35] = ~c[35]; + assign c_n[36] = ~c[36]; + assign c_n[37] = ~c[37]; + assign c_n[38] = ~c[38]; + assign c_n[39] = ~c[39]; + assign c_n[40] = ~c[40]; + assign c_n[41] = ~c[41]; + assign c_n[42] = ~c[42]; + assign c_n[43] = ~c[43]; + assign c_n[44] = ~c[44]; + assign c_n[45] = ~c[45]; + assign c_n[46] = ~c[46]; + assign c_n[47] = ~c[47]; + assign c_n[48] = ~c[48]; + assign c_n[49] = ~c[49]; + assign c_n[50] = ~c[50]; + assign c_n[51] = ~c[51]; + assign c_n[52] = ~c[52]; + assign c_n[53] = ~c[53]; + assign c_n[54] = ~c[54]; + assign c_n[55] = ~c[55]; + assign c_n[56] = ~c[56]; + assign c_n[57] = ~c[57]; + assign c_n[58] = ~c[58]; + assign c_n[59] = ~c[59]; + assign c_n[60] = ~c[60]; + assign c_n[61] = ~c[61]; + assign c_n[62] = ~c[62]; + assign c_n[63] = ~c[63]; + + assign bin_c_0 = c[0]; + assign bin_ovfl = (c[32] & c_n[33]) | (c_n[32] & c[33]); + +endmodule // exdbin_mac + + + diff --git a/code/vezba5-3/vezba5/dut/holdreg.v b/code/vezba5-3/vezba5/dut/holdreg.v new file mode 100644 index 0000000..e49f552 --- /dev/null +++ b/code/vezba5-3/vezba5/dut/holdreg.v @@ -0,0 +1,56 @@ +// Library: calc1 +// Module: Hold Register +// Author: Naseer Siddique + + module holdreg(hold_data1, hold_data2, hold_prio_req, c_clk, req_cmd_in, req_data_in, reset); + + input c_clk; + input [0:3] req_cmd_in; + input [1:7] reset; + input [0:31] req_data_in; + + output [0:3] hold_prio_req; + output [0:31] hold_data1, hold_data2; + + + reg [0:3] cmd_hold, hold_prio_reg; + wire [0:3] cmd_hold_q; + reg [0:31] hold_data1_q, hold_data2_q; + + always + @ (posedge c_clk) begin + fork + + cmd_hold[0:3] <= (reset[1] == 1) ? 4'b0 : req_cmd_in[0:3]; + hold_prio_reg[0:3] <= cmd_hold[0:3]; + + join + + end + + + always + @ (posedge c_clk) begin + fork + hold_data1_q[0:31] <= + (reset[1]) ? 32'b0 : + (req_cmd_in[0:3] != 4'b0) ? req_data_in[0:31] : + hold_data1_q[0:31]; + + hold_data2_q[0:31] <= + (reset[1]) ? 32'b0 : (cmd_hold[0:3] != 4'b0) ? + req_data_in[0:31] : hold_data2_q[0:31]; + join + + end + + + assign hold_data1 = hold_data1_q; + assign hold_data2 = hold_data2_q; + assign hold_prio_req = hold_prio_reg; + +endmodule // holdreg + + + + diff --git a/code/vezba5-3/vezba5/dut/mux_out.v b/code/vezba5-3/vezba5/dut/mux_out.v new file mode 100644 index 0000000..41e732d --- /dev/null +++ b/code/vezba5-3/vezba5/dut/mux_out.v @@ -0,0 +1,27 @@ +// Library: calc1 +// Module: Output Mux +// Author: Naseer Siddique + +module mux_out(req_data, req_resp, req_data1, req_data2, req_resp1, req_resp2); + + output [0:31] req_data; + output [0:1] req_resp; + + input [0:31] req_data1, req_data2; + input [0:1] req_resp1, req_resp2; + + assign req_resp[0:1] = + (req_resp1[0:1] != 2'b00) ? req_resp1 : + ( req_resp2[0:1] != 2'b00 ) ? req_resp2 : + 2'b00; + + assign req_data[0:31] = + ( req_resp1[0:1] != 2'b00 ) ? req_data1 : + ( req_resp2[0:1] != 2'b00 ) ? req_data2 : + 32'b0; + + + +endmodule // mux_out + + diff --git a/code/vezba5-3/vezba5/dut/priority.v b/code/vezba5-3/vezba5/dut/priority.v new file mode 100644 index 0000000..7e020ab --- /dev/null +++ b/code/vezba5-3/vezba5/dut/priority.v @@ -0,0 +1,155 @@ +// Library: calc1 +// Priority Logic +// Author: Naseer Siddique +module priority1 ( prio_alu1_in_cmd, prio_alu1_in_req_id, prio_alu1_out_req_id, prio_alu1_out_vld, prio_alu2_in_cmd, prio_alu2_in_req_id, prio_alu2_out_req_id, prio_alu2_out_vld, c_clk, hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req, local_error_found, reset); + + + output [0:3] prio_alu1_in_cmd, prio_alu2_in_cmd; + output [0:1] prio_alu1_out_req_id, prio_alu1_in_req_id, prio_alu2_in_req_id, prio_alu2_out_req_id; + output prio_alu1_out_vld, prio_alu2_out_vld; + + input c_clk, local_error_found; + input [0:3] hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req; + input [1:7] reset; + + reg [0:3] cmd1, cmd2, cmd3, cmd4; + reg delay1, delay2; + + wire cmd1_reset, cmd2_reset, cmd3_reset, cmd4_reset; + + reg [0:1] prio_req1_id_q, prio_req2_id_q; + + reg prio_alu1_out_vld_q, prio_alu2_out_vld_q; + + always + @ (posedge c_clk) begin + if (reset[1]) begin + cmd1 <= 0; + cmd2 <= 0; + cmd3 <= 0; + cmd4 <= 0; + end + else begin + fork + delay1 <= prio_alu1_out_vld_q; + delay2 <= prio_alu2_out_vld_q; + + cmd1[0:3] <= + (hold1_prio_req[0:3] != 4'b0) ? hold1_prio_req[0:3] : + (cmd1_reset) ? 4'b0 : + cmd1[0:3]; + + cmd2[0:3] <= + (hold2_prio_req[0:3] != 4'b0) ? hold2_prio_req[0:3] : + (cmd2_reset) ? 4'b0 : + cmd2[0:3]; + + cmd3[0:3] <= + (hold3_prio_req[0:3] != 4'b0) ? hold3_prio_req[0:3] : + (cmd3_reset) ? 4'b0 : + cmd3[0:3]; + + cmd4[0:3] <= + (hold4_prio_req[0:3] != 4'b0) ? hold4_prio_req[0:3] : + (cmd4_reset) ? 4'b0 : + cmd4[0:3]; + join + end + + + end // always @ (posedge c_clk) + + always + @ (delay1 or delay2 or cmd1 or cmd2 or cmd3 or cmd4) begin + + if (delay1) + prio_alu1_out_vld_q <= 1'b0; + else if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) && local_error_found ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b0; + else prio_alu1_out_vld_q <= 1'b0; + + if (delay2) + prio_alu2_out_vld_q <= 1'b0; + else if (cmd1 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd2 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd3 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd4 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else prio_alu2_out_vld_q <= 1'b0; + + if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b00; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b01; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b10; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b11; + else prio_req1_id_q[0:1] <= 2'b00; + + if ( cmd1 > 4'b0011 ) + prio_req2_id_q <= 2'b00; + else if ( cmd2 > 4'b0011 ) + prio_req2_id_q <= 2'b01; + else if ( cmd3 > 4'b0011 ) + prio_req2_id_q <= 2'b10; + else if ( cmd4 > 4'b0011 ) + prio_req2_id_q <= 2'b11; + else prio_req2_id_q <= 2'b00; + + end // always @ (delay1 or or delay2 or cmd1 or cmd2 or cmd3 or cmd4) + + assign prio_alu1_in_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_in_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_out_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_vld = prio_alu1_out_vld_q; + assign prio_alu2_out_vld = prio_alu2_out_vld_q; + + assign prio_alu1_in_cmd[0:3] = + (prio_req1_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req1_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req1_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req1_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + assign prio_alu2_in_cmd[0:3] = + (prio_req2_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req2_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req2_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req2_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + + assign cmd1_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b00) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b00) ) ? 1 : + 0; + + assign cmd2_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b01) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b01) ) ? 1 : + 0; + + assign cmd3_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b10) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b10) ) ? 1 : + 0; + + assign cmd4_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b11) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b11) ) ? 1 : + 0; + +endmodule // priority diff --git a/code/vezba5-3/vezba5/dut/shifter.v b/code/vezba5-3/vezba5/dut/shifter.v new file mode 100644 index 0000000..a2d9b47 --- /dev/null +++ b/code/vezba5-3/vezba5/dut/shifter.v @@ -0,0 +1,2310 @@ +// Library: calc1 +// Module: 32-bit shifter +// Author: Naseer Siddique + +module shifter ( bin_ovfl, shift_out, shift_cmd, shift_places, local_error_found, shift_val); + + output bin_ovfl; + output [0:63] shift_out; + + input [0:3] shift_cmd; + input [0:63] shift_places, shift_val; + input local_error_found; + + wire [0:4] pos; + + + wire [0:63] shiftleft, shiftright, tempshiftl; + + wire bin_ovfl; + wire [0:63] shift_out; + + assign pos[0:4] = shift_places[59:63]; + + assign tempshiftl[0:31] = shift_val[32:63]; + assign tempshiftl[32:63] = 32'b0; + + assign shiftleft[0] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[0] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[0+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[0+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[0+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[0+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[0+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[0+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[0+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[0+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[0+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[0+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[0+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[0+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[0+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[0+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[0+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[0+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[0+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[0+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[0+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[0+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[0+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[0+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[0+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[0+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[0+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[0+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[0+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[0+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[0+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[0+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[0+31] : + 0; + + assign shiftleft[1] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[1] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[1+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[1+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[1+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[1+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[1+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[1+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[1+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[1+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[1+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[1+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[1+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[1+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[1+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[1+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[1+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[1+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[1+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[1+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[1+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[1+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[1+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[1+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[1+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[1+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[1+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[1+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[1+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[1+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[1+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[1+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[1+31] : + 0; + + assign shiftleft[2] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[2] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[2+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[2+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[2+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[2+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[2+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[2+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[2+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[2+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[2+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[2+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[2+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[2+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[2+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[2+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[2+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[2+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[2+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[2+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[2+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[2+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[2+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[2+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[2+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[2+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[2+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[2+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[2+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[2+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[2+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[2+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[2+31] : + 0; + + assign shiftleft[3] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[3] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[3+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[3+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[3+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[3+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[3+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[3+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[3+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[3+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[3+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[3+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[3+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[3+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[3+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[3+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[3+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[3+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[3+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[3+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[3+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[3+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[3+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[3+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[3+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[3+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[3+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[3+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[3+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[3+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[3+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[3+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[3+31] : + 0; + + assign shiftleft[4] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[4] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[4+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[4+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[4+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[4+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[4+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[4+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[4+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[4+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[4+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[4+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[4+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[4+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[4+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[4+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[4+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[4+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[4+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[4+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[4+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[4+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[4+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[4+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[4+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[4+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[4+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[4+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[4+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[4+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[4+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[4+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[4+31] : + 0; + + assign shiftleft[5] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[5] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[5+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[5+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[5+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[5+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[5+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[5+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[5+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[5+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[5+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[5+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[5+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[5+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[5+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[5+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[5+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[5+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[5+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[5+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[5+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[5+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[5+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[5+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[5+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[5+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[5+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[5+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[5+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[5+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[5+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[5+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[5+31] : + 0; + + assign shiftleft[6] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[6] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[6+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[6+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[6+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[6+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[6+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[6+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[6+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[6+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[6+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[6+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[6+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[6+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[6+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[6+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[6+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[6+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[6+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[6+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[6+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[6+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[6+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[6+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[6+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[6+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[6+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[6+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[6+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[6+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[6+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[6+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[6+31] : + 0; + + assign shiftleft[7] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[7] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[7+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[7+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[7+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[7+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[7+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[7+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[7+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[7+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[7+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[7+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[7+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[7+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[7+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[7+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[7+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[7+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[7+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[7+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[7+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[7+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[7+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[7+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[7+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[7+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[7+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[7+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[7+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[7+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[7+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[7+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[7+31] : + 0; + + assign shiftleft[8] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[8] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[8+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[8+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[8+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[8+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[8+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[8+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[8+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[8+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[8+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[8+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[8+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[8+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[8+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[8+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[8+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[8+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[8+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[8+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[8+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[8+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[8+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[8+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[8+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[8+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[8+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[8+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[8+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[8+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[8+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[8+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[8+31] : + 0; + + assign shiftleft[9] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[9] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[9+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[9+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[9+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[9+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[9+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[9+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[9+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[9+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[9+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[9+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[9+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[9+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[9+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[9+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[9+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[9+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[9+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[9+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[9+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[9+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[9+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[9+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[9+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[9+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[9+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[9+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[9+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[9+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[9+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[9+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[9+31] : + 0; + + assign shiftleft[10] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[10] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[10+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[10+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[10+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[10+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[10+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[10+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[10+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[10+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[10+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[10+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[10+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[10+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[10+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[10+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[10+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[10+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[10+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[10+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[10+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[10+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[10+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[10+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[10+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[10+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[10+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[10+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[10+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[10+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[10+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[10+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[10+31] : + 0; + + assign shiftleft[11] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[11] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[11+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[11+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[11+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[11+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[11+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[11+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[11+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[11+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[11+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[11+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[11+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[11+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[11+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[11+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[11+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[11+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[11+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[11+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[11+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[11+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[11+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[11+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[11+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[11+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[11+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[11+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[11+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[11+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[11+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[11+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[11+31] : + 0; + + assign shiftleft[12] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[12] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[12+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[12+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[12+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[12+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[12+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[12+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[12+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[12+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[12+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[12+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[12+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[12+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[12+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[12+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[12+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[12+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[12+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[12+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[12+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[12+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[12+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[12+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[12+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[12+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[12+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[12+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[12+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[12+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[12+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[12+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[12+31] : + 0; + + assign shiftleft[13] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[13] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[13+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[13+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[13+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[13+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[13+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[13+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[13+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[13+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[13+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[13+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[13+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[13+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[13+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[13+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[13+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[13+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[13+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[13+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[13+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[13+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[13+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[13+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[13+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[13+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[13+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[13+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[13+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[13+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[13+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[13+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[13+31] : + 0; + + assign shiftleft[14] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[14] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[14+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[14+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[14+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[14+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[14+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[14+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[14+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[14+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[14+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[14+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[14+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[14+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[14+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[14+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[14+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[14+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[14+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[14+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[14+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[14+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[14+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[14+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[14+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[14+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[14+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[14+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[14+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[14+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[14+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[14+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[14+31] : + 0; + + assign shiftleft[15] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[15] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[15+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[15+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[15+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[15+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[15+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[15+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[15+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[15+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[15+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[15+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[15+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[15+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[15+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[15+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[15+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[15+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[15+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[15+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[15+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[15+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[15+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[15+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[15+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[15+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[15+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[15+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[15+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[15+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[15+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[15+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[15+31] : + 0; + + assign shiftleft[16] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[16] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[16+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[16+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[16+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[16+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[16+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[16+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[16+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[16+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[16+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[16+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[16+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[16+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[16+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[16+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[16+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[16+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[16+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[16+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[16+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[16+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[16+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[16+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[16+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[16+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[16+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[16+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[16+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[16+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[16+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[16+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[16+31] : + 0; + + assign shiftleft[17] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[17] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[17+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[17+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[17+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[17+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[17+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[17+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[17+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[17+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[17+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[17+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[17+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[17+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[17+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[17+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[17+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[17+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[17+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[17+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[17+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[17+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[17+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[17+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[17+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[17+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[17+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[17+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[17+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[17+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[17+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[17+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[17+31] : + 0; + + assign shiftleft[18] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[18] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[18+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[18+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[18+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[18+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[18+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[18+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[18+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[18+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[18+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[18+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[18+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[18+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[18+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[18+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[18+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[18+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[18+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[18+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[18+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[18+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[18+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[18+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[18+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[18+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[18+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[18+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[18+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[18+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[18+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[18+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[18+31] : + 0; + + assign shiftleft[19] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[19] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[19+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[19+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[19+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[19+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[19+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[19+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[19+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[19+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[19+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[19+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[19+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[19+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[19+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[19+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[19+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[19+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[19+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[19+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[19+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[19+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[19+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[19+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[19+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[19+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[19+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[19+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[19+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[19+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[19+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[19+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[19+31] : + 0; + + assign shiftleft[20] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[20] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[20+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[20+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[20+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[20+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[20+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[20+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[20+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[20+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[20+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[20+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[20+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[20+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[20+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[20+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[20+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[20+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[20+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[20+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[20+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[20+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[20+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[20+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[20+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[20+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[20+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[20+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[20+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[20+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[20+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[20+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[20+31] : + 0; + + assign shiftleft[21] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[21] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[21+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[21+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[21+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[21+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[21+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[21+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[21+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[21+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[21+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[21+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[21+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[21+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[21+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[21+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[21+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[21+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[21+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[21+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[21+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[21+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[21+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[21+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[21+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[21+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[21+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[21+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[21+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[21+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[21+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[21+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[21+31] : + 0; + + assign shiftleft[22] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[22] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[22+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[22+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[22+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[22+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[22+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[22+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[22+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[22+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[22+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[22+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[22+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[22+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[22+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[22+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[22+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[22+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[22+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[22+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[22+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[22+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[22+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[22+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[22+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[22+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[22+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[22+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[22+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[22+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[22+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[22+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[22+31] : + 0; + + assign shiftleft[23] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[23] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[23+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[23+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[23+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[23+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[23+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[23+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[23+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[23+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[23+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[23+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[23+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[23+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[23+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[23+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[23+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[23+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[23+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[23+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[23+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[23+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[23+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[23+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[23+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[23+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[23+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[23+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[23+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[23+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[23+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[23+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[23+31] : + 0; + assign shiftleft[24] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[24] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[24+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[24+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[24+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[24+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[24+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[24+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[24+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[24+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[24+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[24+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[24+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[24+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[24+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[24+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[24+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[24+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[24+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[24+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[24+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[24+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[24+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[24+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[24+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[24+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[24+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[24+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[24+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[24+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[24+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[24+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[24+31] : + 0; + + assign shiftleft[25] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[25] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[25+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[25+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[25+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[25+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[25+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[25+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[25+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[25+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[25+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[25+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[25+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[25+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[25+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[25+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[25+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[25+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[25+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[25+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[25+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[25+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[25+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[25+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[25+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[25+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[25+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[25+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[25+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[25+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[25+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[25+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[25+31] : + 0; + + assign shiftleft[26] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[26] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[26+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[26+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[26+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[26+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[26+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[26+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[26+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[26+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[26+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[26+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[26+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[26+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[26+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[26+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[26+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[26+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[26+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[26+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[26+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[26+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[26+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[26+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[26+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[26+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[26+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[26+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[26+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[26+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[26+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[26+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[26+31] : + 0; + + assign shiftleft[27] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[27] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[27+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[27+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[27+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[27+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[27+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[27+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[27+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[27+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[27+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[27+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[27+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[27+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[27+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[27+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[27+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[27+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[27+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[27+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[27+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[27+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[27+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[27+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[27+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[27+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[27+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[27+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[27+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[27+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[27+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[27+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[27+31] : + 0; + + assign shiftleft[28] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[28] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[28+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[28+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[28+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[28+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[28+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[28+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[28+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[28+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[28+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[28+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[28+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[28+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[28+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[28+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[28+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[28+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[28+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[28+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[28+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[28+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[28+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[28+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[28+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[28+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[28+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[28+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[28+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[28+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[28+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[28+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[28+31] : + 0; + + assign shiftleft[29] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[29] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[29+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[29+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[29+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[29+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[29+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[29+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[29+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[29+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[29+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[29+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[29+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[29+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[29+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[29+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[29+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[29+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[29+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[29+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[29+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[29+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[29+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[29+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[29+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[29+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[29+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[29+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[29+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[29+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[29+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[29+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[29+31] : + 0; + + assign shiftleft[30] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[30] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[30+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[30+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[30+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[30+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[30+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[30+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[30+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[30+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[30+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[30+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[30+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[30+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[30+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[30+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[30+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[30+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[30+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[30+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[30+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[30+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[30+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[30+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[30+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[30+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[30+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[30+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[30+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[30+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[30+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[30+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[30+31] : + 0; + + assign shiftleft[31] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[31] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[31+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[31+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[31+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[31+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[31+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[31+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[31+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[31+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[31+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[31+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[31+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[31+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[31+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[31+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[31+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[31+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[31+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[31+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[31+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[31+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[31+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[31+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[31+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[31+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[31+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[31+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[31+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[31+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[31+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[31+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[31+31] : + 0; + + assign shiftright[32] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[32] : + ( pos[0:4] == 5'b00001 ) ? shift_val[32-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[32-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[32-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[32-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[32-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[32-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[32-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[32-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[32-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[32-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[32-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[32-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[32-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[32-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[32-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[32-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[32-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[32-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[32-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[32-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[32-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[32-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[32-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[32-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[32-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[32-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[32-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[32-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[32-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[32-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[32-31] : + 0; + + assign shiftright[33] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[33] : + ( pos[0:4] == 5'b00001 ) ? shift_val[33-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[33-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[33-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[33-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[33-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[33-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[33-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[33-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[33-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[33-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[33-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[33-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[33-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[33-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[33-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[33-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[33-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[33-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[33-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[33-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[33-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[33-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[33-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[33-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[33-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[33-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[33-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[33-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[33-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[33-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[33-31] : + 0; + + assign shiftright[34] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[34] : + ( pos[0:4] == 5'b00001 ) ? shift_val[34-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[34-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[34-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[34-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[34-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[34-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[34-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[34-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[34-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[34-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[34-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[34-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[34-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[34-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[34-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[34-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[34-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[34-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[34-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[34-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[34-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[34-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[34-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[34-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[34-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[34-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[34-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[34-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[34-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[34-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[34-31] : + 0; + + assign shiftright[35] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[35] : + ( pos[0:4] == 5'b00001 ) ? shift_val[35-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[35-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[35-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[35-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[35-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[35-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[35-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[35-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[35-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[35-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[35-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[35-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[35-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[35-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[35-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[35-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[35-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[35-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[35-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[35-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[35-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[35-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[35-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[35-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[35-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[35-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[35-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[35-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[35-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[35-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[35-31] : + 0; + + assign shiftright[36] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[36] : + ( pos[0:4] == 5'b00001 ) ? shift_val[36-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[36-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[36-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[36-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[36-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[36-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[36-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[36-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[36-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[36-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[36-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[36-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[36-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[36-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[36-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[36-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[36-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[36-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[36-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[36-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[36-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[36-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[36-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[36-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[36-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[36-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[36-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[36-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[36-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[36-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[36-31] : + 0; + + assign shiftright[37] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[37] : + ( pos[0:4] == 5'b00001 ) ? shift_val[37-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[37-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[37-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[37-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[37-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[37-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[37-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[37-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[37-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[37-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[37-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[37-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[37-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[37-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[37-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[37-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[37-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[37-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[37-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[37-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[37-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[37-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[37-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[37-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[37-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[37-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[37-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[37-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[37-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[37-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[37-31] : + 0; + + assign shiftright[38] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[38] : + ( pos[0:4] == 5'b00001 ) ? shift_val[38-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[38-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[38-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[38-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[38-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[38-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[38-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[38-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[38-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[38-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[38-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[38-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[38-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[38-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[38-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[38-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[38-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[38-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[38-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[38-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[38-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[38-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[38-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[38-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[38-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[38-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[38-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[38-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[38-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[38-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[38-31] : + 0; + + assign shiftright[39] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[39] : + ( pos[0:4] == 5'b00001 ) ? shift_val[39-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[39-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[39-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[39-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[39-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[39-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[39-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[39-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[39-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[39-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[39-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[39-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[39-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[39-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[39-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[39-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[39-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[39-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[39-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[39-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[39-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[39-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[39-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[39-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[39-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[39-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[39-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[39-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[39-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[39-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[39-31] : + 0; + + assign shiftright[40] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[40] : + ( pos[0:4] == 5'b00001 ) ? shift_val[40-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[40-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[40-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[40-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[40-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[40-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[40-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[40-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[40-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[40-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[40-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[40-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[40-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[40-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[40-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[40-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[40-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[40-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[40-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[40-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[40-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[40-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[40-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[40-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[40-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[40-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[40-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[40-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[40-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[40-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[40-31] : + 0; + + assign shiftright[41] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[41] : + ( pos[0:4] == 5'b00001 ) ? shift_val[41-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[41-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[41-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[41-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[41-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[41-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[41-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[41-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[41-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[41-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[41-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[41-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[41-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[41-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[41-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[41-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[41-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[41-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[41-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[41-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[41-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[41-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[41-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[41-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[41-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[41-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[41-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[41-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[41-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[41-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[41-31] : + 0; + + assign shiftright[42] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[42] : + ( pos[0:4] == 5'b00001 ) ? shift_val[42-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[42-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[42-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[42-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[42-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[42-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[42-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[42-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[42-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[42-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[42-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[42-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[42-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[42-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[42-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[42-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[42-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[42-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[42-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[42-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[42-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[42-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[42-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[42-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[42-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[42-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[42-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[42-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[42-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[42-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[42-31] : + 0; + + + assign shiftright[43] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[43] : + ( pos[0:4] == 5'b00001 ) ? shift_val[43-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[43-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[43-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[43-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[43-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[43-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[43-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[43-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[43-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[43-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[43-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[43-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[43-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[43-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[43-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[43-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[43-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[43-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[43-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[43-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[43-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[43-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[43-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[43-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[43-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[43-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[43-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[43-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[43-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[43-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[43-31] : + 0; + + assign shiftright[44] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[44] : + ( pos[0:4] == 5'b00001 ) ? shift_val[44-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[44-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[44-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[44-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[44-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[44-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[44-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[44-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[44-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[44-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[44-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[44-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[44-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[44-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[44-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[44-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[44-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[44-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[44-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[44-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[44-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[44-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[44-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[44-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[44-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[44-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[44-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[44-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[44-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[44-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[44-31] : + 0; + + assign shiftright[45] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[45] : + ( pos[0:4] == 5'b00001 ) ? shift_val[45-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[45-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[45-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[45-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[45-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[45-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[45-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[45-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[45-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[45-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[45-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[45-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[45-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[45-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[45-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[45-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[45-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[45-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[45-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[45-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[45-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[45-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[45-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[45-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[45-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[45-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[45-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[45-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[45-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[45-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[45-31] : + 0; + + assign shiftright[46] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[46] : + ( pos[0:4] == 5'b00001 ) ? shift_val[46-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[46-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[46-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[46-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[46-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[46-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[46-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[46-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[46-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[46-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[46-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[46-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[46-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[46-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[46-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[46-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[46-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[46-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[46-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[46-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[46-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[46-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[46-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[46-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[46-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[46-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[46-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[46-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[46-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[46-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[46-31] : + 0; + + assign shiftright[47] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[47] : + ( pos[0:4] == 5'b00001 ) ? shift_val[47-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[47-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[47-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[47-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[47-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[47-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[47-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[47-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[47-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[47-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[47-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[47-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[47-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[47-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[47-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[47-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[47-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[47-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[47-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[47-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[47-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[47-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[47-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[47-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[47-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[47-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[47-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[47-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[47-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[47-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[47-31] : + 0; + + assign shiftright[48] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[48] : + ( pos[0:4] == 5'b00001 ) ? shift_val[48-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[48-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[48-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[48-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[48-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[48-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[48-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[48-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[48-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[48-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[48-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[48-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[48-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[48-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[48-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[48-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[48-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[48-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[48-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[48-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[48-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[48-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[48-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[48-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[48-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[48-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[48-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[48-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[48-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[48-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[48-31] : + 0; + + assign shiftright[49] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[49] : + ( pos[0:4] == 5'b00001 ) ? shift_val[49-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[49-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[49-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[49-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[49-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[49-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[49-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[49-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[49-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[49-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[49-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[49-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[49-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[49-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[49-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[49-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[49-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[49-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[49-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[49-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[49-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[49-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[49-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[49-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[49-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[49-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[49-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[49-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[49-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[49-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[49-31] : + 0; + + assign shiftright[50] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[50] : + ( pos[0:4] == 5'b00001 ) ? shift_val[50-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[50-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[50-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[50-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[50-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[50-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[50-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[50-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[50-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[50-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[50-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[50-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[50-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[50-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[50-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[50-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[50-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[50-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[50-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[50-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[50-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[50-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[50-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[50-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[50-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[50-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[50-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[50-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[50-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[50-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[50-31] : + 0; + + assign shiftright[51] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[51] : + ( pos[0:4] == 5'b00001 ) ? shift_val[51-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[51-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[51-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[51-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[51-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[51-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[51-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[51-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[51-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[51-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[51-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[51-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[51-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[51-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[51-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[51-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[51-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[51-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[51-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[51-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[51-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[51-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[51-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[51-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[51-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[51-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[51-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[51-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[51-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[51-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[51-31] : + 0; + + assign shiftright[52] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[52] : + ( pos[0:4] == 5'b00001 ) ? shift_val[52-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[52-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[52-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[52-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[52-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[52-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[52-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[52-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[52-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[52-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[52-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[52-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[52-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[52-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[52-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[52-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[52-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[52-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[52-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[52-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[52-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[52-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[52-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[52-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[52-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[52-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[52-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[52-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[52-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[52-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[52-31] : + 0; + + assign shiftright[53] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[53] : + ( pos[0:4] == 5'b00001 ) ? shift_val[53-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[53-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[53-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[53-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[53-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[53-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[53-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[53-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[53-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[53-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[53-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[53-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[53-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[53-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[53-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[53-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[53-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[53-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[53-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[53-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[53-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[53-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[53-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[53-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[53-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[53-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[53-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[53-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[53-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[53-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[53-31] : + 0; + + assign shiftright[54] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[54] : + ( pos[0:4] == 5'b00001 ) ? shift_val[54-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[54-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[54-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[54-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[54-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[54-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[54-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[54-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[54-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[54-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[54-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[54-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[54-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[54-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[54-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[54-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[54-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[54-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[54-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[54-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[54-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[54-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[54-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[54-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[54-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[54-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[54-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[54-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[54-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[54-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[54-31] : + 0; + + assign shiftright[55] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[55] : + ( pos[0:4] == 5'b00001 ) ? shift_val[55-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[55-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[55-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[55-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[55-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[55-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[55-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[55-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[55-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[55-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[55-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[55-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[55-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[55-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[55-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[55-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[55-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[55-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[55-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[55-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[55-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[55-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[55-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[55-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[55-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[55-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[55-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[55-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[55-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[55-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[55-31] : + 0; + + assign shiftright[56] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[56] : + ( pos[0:4] == 5'b00001 ) ? shift_val[56-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[56-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[56-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[56-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[56-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[56-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[56-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[56-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[56-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[56-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[56-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[56-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[56-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[56-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[56-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[56-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[56-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[56-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[56-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[56-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[56-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[56-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[56-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[56-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[56-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[56-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[56-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[56-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[56-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[56-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[56-31] : + 0; + + assign shiftright[57] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[57] : + ( pos[0:4] == 5'b00001 ) ? shift_val[57-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[57-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[57-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[57-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[57-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[57-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[57-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[57-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[57-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[57-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[57-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[57-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[57-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[57-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[57-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[57-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[57-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[57-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[57-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[57-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[57-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[57-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[57-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[57-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[57-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[57-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[57-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[57-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[57-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[57-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[57-31] : + 0; + + assign shiftright[58] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[58] : + ( pos[0:4] == 5'b00001 ) ? shift_val[58-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[58-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[58-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[58-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[58-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[58-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[58-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[58-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[58-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[58-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[58-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[58-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[58-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[58-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[58-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[58-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[58-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[58-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[58-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[58-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[58-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[58-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[58-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[58-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[58-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[58-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[58-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[58-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[58-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[58-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[58-31] : + 0; + + assign shiftright[59] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[59] : + ( pos[0:4] == 5'b00001 ) ? shift_val[59-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[59-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[59-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[59-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[59-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[59-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[59-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[59-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[59-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[59-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[59-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[59-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[59-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[59-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[59-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[59-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[59-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[59-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[59-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[59-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[59-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[59-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[59-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[59-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[59-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[59-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[59-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[59-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[59-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[59-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[59-31] : + 0; + + assign shiftright[60] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[60] : + ( pos[0:4] == 5'b00001 ) ? shift_val[60-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[60-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[60-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[60-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[60-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[60-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[60-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[60-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[60-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[60-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[60-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[60-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[60-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[60-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[60-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[60-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[60-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[60-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[60-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[60-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[60-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[60-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[60-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[60-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[60-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[60-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[60-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[60-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[60-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[60-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[60-31] : + 0; + + assign shiftright[61] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[61] : + ( pos[0:4] == 5'b00001 ) ? shift_val[61-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[61-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[61-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[61-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[61-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[61-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[61-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[61-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[61-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[61-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[61-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[61-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[61-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[61-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[61-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[61-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[61-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[61-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[61-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[61-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[61-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[61-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[61-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[61-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[61-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[61-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[61-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[61-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[61-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[61-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[61-31] : + 0; + + assign shiftright[62] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[62] : + ( pos[0:4] == 5'b00001 ) ? shift_val[62-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[62-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[62-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[62-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[62-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[62-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[62-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[62-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[62-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[62-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[62-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[62-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[62-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[62-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[62-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[62-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[62-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[62-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[62-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[62-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[62-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[62-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[62-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[62-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[62-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[62-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[62-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[62-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[62-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[62-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[62-31] : + 0; + + assign shiftright[63] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[63] : + ( pos[0:4] == 5'b00001 ) ? shift_val[63-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[63-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[63-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[63-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[63-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[63-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[63-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[63-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[63-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[63-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[63-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[63-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[63-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[63-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[63-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[63-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[63-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[63-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[63-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[63-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[63-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[63-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[63-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[63-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[63-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[63-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[63-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[63-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[63-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[63-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[63-31] : + 0; + + assign shift_out[0:31] = 32'b0; + + assign shift_out[32:63] = + ( shift_cmd[0:3] == 4'b0101 ) ? shiftleft[0:31] : + ( shift_cmd[0:3] == 4'b0110 ) ? shiftright[32:63] : + 32'b0; + + assign bin_ovfl = 1'b0; + +endmodule // shifter + + \ No newline at end of file diff --git a/code/vezba5-3/vezba5/v5_run.f b/code/vezba5-3/vezba5/v5_run.f new file mode 100644 index 0000000..b2054f4 --- /dev/null +++ b/code/vezba5-3/vezba5/v5_run.f @@ -0,0 +1,28 @@ +-sv +incdir+./verif +-sv +incdir+./verif/Agent + + + ./dut/alu_input_stage.v + ./dut/alu_output_stage.v + ./dut/exdbin_mac.v + ./dut/holdreg.v + ./dut/mux_out.v + ./dut/shifter.v + ./dut/priority.v + ./dut/calc_top.v + +-sv ./verif/Agent/v5_calc_agent_pkg.sv +-sv ./verif/Agent/v5_calc_seq_item.sv +-sv ./verif/calc_if.sv +-sv ./verif/v5_calc_test_pkg.sv +-sv ./verif/v5_calc_test_simple.sv +-sv ./verif/v5_calc_verif_top.sv + +-uvmhome "/eda/cadence/2019-20/RHELx86/XCELIUM_19.03.013/tools/methodology/UVM/CDNS-1.2/" +-uvm +UVM_TESTNAME=test_simple + +#-LINEDEBUG +-access +rwc +-disable_sem2009 +-nowarn "MEMODR" +-timescale 1ns/10ps diff --git a/code/vezba5-3/vezba5/verif/calc_if.sv b/code/vezba5-3/vezba5/verif/calc_if.sv new file mode 100644 index 0000000..feebbb1 --- /dev/null +++ b/code/vezba5-3/vezba5/verif/calc_if.sv @@ -0,0 +1,29 @@ +`ifndef CALC_IF_SV + `define CALC_IF_SV + +interface calc_if (input clk, logic [6 : 0] rst); + + parameter DATA_WIDTH = 32; + parameter RESP_WIDTH = 2; + parameter CMD_WIDTH = 4; + + logic [DATA_WIDTH - 1 : 0] out_data1; + logic [DATA_WIDTH - 1 : 0] out_data2; + logic [DATA_WIDTH - 1 : 0] out_data3; + logic [DATA_WIDTH - 1 : 0] out_data4; + logic [RESP_WIDTH - 1 : 0] out_resp1; + logic [RESP_WIDTH - 1 : 0] out_resp2; + logic [RESP_WIDTH - 1 : 0] out_resp3; + logic [RESP_WIDTH - 1 : 0] out_resp4; + logic [CMD_WIDTH - 1 : 0] req1_cmd_in; + logic [DATA_WIDTH - 1 : 0] req1_data_in; + logic [CMD_WIDTH - 1 : 0] req2_cmd_in; + logic [DATA_WIDTH - 1 : 0] req2_data_in; + logic [CMD_WIDTH - 1 : 0] req3_cmd_in; + logic [DATA_WIDTH - 1 : 0] req3_data_in; + logic [CMD_WIDTH - 1 : 0] req4_cmd_in; + logic [DATA_WIDTH - 1 : 0] req4_data_in; + +endinterface : calc_if + +`endif diff --git a/code/vezba5-3/vezba5/verif/calc_test_pkg.sv b/code/vezba5-3/vezba5/verif/calc_test_pkg.sv new file mode 100644 index 0000000..68fbb9f --- /dev/null +++ b/code/vezba5-3/vezba5/verif/calc_test_pkg.sv @@ -0,0 +1,11 @@ +`ifndef V5_CALC_TEST_PKG_SV + `define V5_CALC_TEST_PKG_SV +package calc_test_pkg; +// import the UVM library +`include "uvm_macros.svh" // Include the UVM macros +import uvm_pkg::*; +// import test class +`include "calc_test_simple.sv" +endpackage +`include "calc_if.sv" +`endif; diff --git a/code/vezba5-3/vezba5/verif/calc_test_simple.sv b/code/vezba5-3/vezba5/verif/calc_test_simple.sv new file mode 100644 index 0000000..d7bf783 --- /dev/null +++ b/code/vezba5-3/vezba5/verif/calc_test_simple.sv @@ -0,0 +1,49 @@ +`ifndef TEST_SIMPLE_SV + `define TEST_SIMPLE_SV + +class test_simple extends uvm_test; + + `uvm_component_utils(test_simple) + + virtual interface calc_if vif; + + function new(string name = "test_simple", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + `uvm_info(get_type_name(), "Starting build phase...", UVM_LOW) + + // Preuzimanje virtuelnog interfejsa iz konfiguracione baze podataka. + if (!uvm_config_db#(virtual calc_if)::get(null, "*", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + // ... + endfunction : build_phase + + + task main_phase(uvm_phase phase); + super.main_phase(phase); + phase.raise_objection(this); //objasnjenje u materijalu za vezbu 6 + + + `uvm_info(get_type_name(), "Starting main phase...", UVM_LOW) + //postavljanje komande + vif.req1_cmd_in = 4'b0001; + //postavljanje prvog podatka + vif.req1_data_in = 32'h0001; + //Cekanje 1 takt + @(posedge vif.clk); + //Uklanjanje komande + vif.req1_cmd_in = 4'b0000; + //Postavljanje drugog podatka + vif.req1_data_in = 32'h0002; + // ... + #1000ns; + phase.drop_objection(this); //objasnjenje u materijalu za vezbu 6 + endtask : main_phase + +endclass : test_simple + +`endif diff --git a/code/vezba5-3/vezba5/verif/calc_verif_top.sv b/code/vezba5-3/vezba5/verif/calc_verif_top.sv new file mode 100644 index 0000000..4edd6dd --- /dev/null +++ b/code/vezba5-3/vezba5/verif/calc_verif_top.sv @@ -0,0 +1,53 @@ +module calc_verif_top; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + + import calc_test_pkg::*; + + logic clk; + logic [6 : 0] rst; + + // interface + calc_if calc_vif(clk, rst); + + // DUT + calc_top DUT( + .c_clk ( clk ), + .reset ( rst ), + .out_data1 ( calc_vif.out_data1 ), + .out_data2 ( calc_vif.out_data2 ), + .out_data3 ( calc_vif.out_data3 ), + .out_data4 ( calc_vif.out_data4 ), + .out_resp1 ( calc_vif.out_resp1 ), + .out_resp2 ( calc_vif.out_resp2 ), + .out_resp3 ( calc_vif.out_resp3 ), + .out_resp4 ( calc_vif.out_resp4 ), + .req1_cmd_in ( calc_vif.req1_cmd_in ), + .req1_data_in ( calc_vif.req1_data_in ), + .req2_cmd_in ( calc_vif.req2_cmd_in ), + .req2_data_in ( calc_vif.req2_data_in ), + .req3_cmd_in ( calc_vif.req3_cmd_in ), + .req3_data_in ( calc_vif.req3_data_in ), + .req4_cmd_in ( calc_vif.req4_cmd_in ), + .req4_data_in ( calc_vif.req4_data_in ) + ); + + // run test + initial begin + // Ubacivanje interfejsa u konfiguracionu bazu podataka + uvm_config_db#(virtual calc_if)::set(null, "*", "calc_if", calc_vif); + run_test("test_simple"); + end + + // clock and reset init. + initial begin + clk <= 0; + rst <= 1; + #50 rst <= 0; + end + + // clock generation + always #50 clk = ~clk; + +endmodule : calc_verif_top diff --git a/code/vezba6_7/dut/alu_input_stage.v b/code/vezba6_7/dut/alu_input_stage.v new file mode 100644 index 0000000..cb10f05 --- /dev/null +++ b/code/vezba6_7/dut/alu_input_stage.v @@ -0,0 +1,36 @@ +// Library: calc1 +// Module: ALU Input Stage +// Author: Naseer SIddique + +module alu_input_stage (alu_data1, alu_data2, hold1_data1, hold1_data2, hold2_data1, hold2_data2, hold3_data1, hold3_data2, hold4_data1, hold4_data2, prio_alu_in_cmd, prio_alu_in_req_id); + + output [0:63] alu_data1, alu_data2; + + wire [0:63] alu_data1, alu_data2; + + input [0:31] hold1_data1, hold1_data2, + hold2_data1, hold2_data2, + hold3_data1, hold3_data2, + hold4_data1, hold4_data2; + + input [0:3] prio_alu_in_cmd; + input [0:1] prio_alu_in_req_id; + + assign alu_data1[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data1[0:31] : + 32'b0; + + assign alu_data2[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data2[0:31] : + 32'b0; + + assign alu_data1[0:31] = 32'b0; + assign alu_data2[0:31] = 32'b0; + +endmodule // alu_input_stage diff --git a/code/vezba6_7/dut/alu_output_stage.v b/code/vezba6_7/dut/alu_output_stage.v new file mode 100644 index 0000000..4ff44ad --- /dev/null +++ b/code/vezba6_7/dut/alu_output_stage.v @@ -0,0 +1,47 @@ +// Library: calc1 +// Module: ALU Output Stage +// Author: Naseer Siddique + +module alu_output_stage(out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk,alu_overflow, alu_result, local_error_found, prio_alu_out_req_id, prio_alu_out_vld, reset); + + output [0:31] out_data1, out_data2, out_data3, out_data4; + output [0:1] out_resp1, out_resp2, out_resp3, out_resp4; + + input [0:63] alu_result; + input [0:1] prio_alu_out_req_id; + input [1:7] reset; + input c_clk, + alu_overflow, + local_error_found, + prio_alu_out_vld; + + wire [0:31] hold_data; + wire [0:1] hold_resp, hold_id; + + assign hold_id[0:1] = prio_alu_out_req_id[0:1]; + + assign hold_resp[0:1] = + (~prio_alu_out_vld) ? 2'b00 : + (~local_error_found) ? 2'b01 : + (alu_result[31]) ? 2'b10 : + 2'b01; + + assign hold_data[0:31] = (prio_alu_out_vld) ? alu_result[32:63] : 32'b0; + + assign out_resp1[0:1] = (hold_id[0:1] == 2'b00) ? hold_resp[0:1] : 2'b00; + + assign out_resp2[0:1] = (hold_id[0:1] == 2'b01) ? hold_resp[0:1] : 2'b00; + + assign out_resp3[0:1] = (hold_id[0:1] == 2'b10) ? hold_resp[0:1] : 2'b00; + + assign out_resp4[0:1] = (hold_id[0:1] == 2'b11) ? hold_resp[0:1] : 2'b00; + + assign out_data1[0:31] = (hold_id[0:1] == 2'b00) ? hold_data[0:31] : 32'b0; + + assign out_data2[0:31] = (hold_id[0:1] == 2'b01) ? hold_data[0:31] : 32'b0; + + assign out_data3[0:31] = (hold_id[0:1] == 2'b10) ? hold_data[0:31] : 32'b0; + + assign out_data4[0:31] = (hold_id[0:1] == 2'b11) ? hold_data[0:31] : 32'b0; + +endmodule diff --git a/code/vezba6_7/dut/calc_top.v b/code/vezba6_7/dut/calc_top.v new file mode 100644 index 0000000..b4e1833 --- /dev/null +++ b/code/vezba6_7/dut/calc_top.v @@ -0,0 +1,278 @@ +// Library: calc1 +// Module: Top-level wiring +// Author: Naseer Siddique + +//`include "alu_input_stage.v" +//`include "alu_output_stage.v" +//`include "exdbin_mac.v" +//`include "holdreg.v" +//`include "mux_out.v" +//`include "shifter.v" +//`include "priority.v" + +module calc_top (out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk, req1_cmd_in, req1_data_in, req2_cmd_in, req2_data_in, req3_cmd_in, req3_data_in, req4_cmd_in, req4_data_in, reset); + + output [0:31] out_data1, + out_data2, + out_data3, + out_data4; + + output [0:1] out_resp1, + out_resp2, + out_resp3, + out_resp4; + + + input c_clk; + + input [0:3] req1_cmd_in, + req2_cmd_in, + req3_cmd_in, + req4_cmd_in; + + input [0:31] req1_data_in, + req2_data_in, + req3_data_in, + req4_data_in; + + input [1:7] reset; + + wire [0:63] add_sum, + fxu_areg_q, + fxu_breg_q, + shift_out, + shift_places, + shift_val; + + wire [0:31] hold1_data1, + hold1_data2, + hold2_data1, + hold2_data2, + hold3_data1, + hold3_data2, + hold4_data1, + hold4_data2, + mux1_req_data1, + mux1_req_data2, + mux2_req_data1, + mux2_req_data2, + mux3_req_data1, + mux3_req_data2, + mux4_req_data1, + mux4_req_data2; + + wire [0:3] hold1_prio_req, + hold2_prio_req, + hold3_prio_req, + hold4_prio_req, + prio_alu1_in_cmd, + prio_alu2_in_cmd; + + wire [0:1] mux1_req_resp1, + mux1_req_resp2, + mux2_req_resp1, + mux2_req_resp2, + mux3_req_resp1, + mux3_req_resp2, + mux4_req_resp1, + mux4_req_resp2, + prio_alu1_in_req_id, + prio_alu1_out_req_id, + prio_alu2_in_req_id, + prio_alu2_out_req_id; + + wire prio_alu1_out_vld, + prio_alu2_out_vld, + add_ovfl, + shift_ovfl; + + wire [0:3] error_found; + assign error_found = 4'b0000; + + exdbin_mac adder ( + .alu_cmd ( prio_alu1_in_cmd[0:3] ), + .bin_ovfl ( add_ovfl ), + .bin_sum ( add_sum[0:63] ), + .fxu_areg_q ( fxu_areg_q[0:63] ), + .fxu_breg_q ( fxu_breg_q[0:63] ), + .local_error_found ( error_found[0] ) + ); + + + holdreg holdreg1( + .c_clk ( c_clk ), + .hold_data1 ( hold1_data1[0:31] ), + .hold_data2 ( hold1_data2[0:31] ), + .hold_prio_req ( hold1_prio_req[0:3] ), + .req_cmd_in ( req1_cmd_in[0:3] ), + .req_data_in ( req1_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg2( + .c_clk ( c_clk ), + .hold_data1 ( hold2_data1[0:31] ), + .hold_data2 ( hold2_data2[0:31] ), + .hold_prio_req ( hold2_prio_req[0:3] ), + .req_cmd_in ( req2_cmd_in[0:3] ), + .req_data_in ( req2_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg3( + .c_clk ( c_clk ), + .hold_data1 ( hold3_data1[0:31] ), + .hold_data2 ( hold3_data2[0:31] ), + .hold_prio_req ( hold3_prio_req[0:3] ), + .req_cmd_in ( req3_cmd_in[0:3] ), + .req_data_in ( req3_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg4( + .c_clk ( c_clk ), + .hold_data1 ( hold4_data1[0:31] ), + .hold_data2 ( hold4_data2[0:31] ), + .hold_prio_req ( hold4_prio_req[0:3] ), + .req_cmd_in ( req4_cmd_in[0:3] ), + .req_data_in ( req4_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + alu_input_stage in_stage1( + .alu_data1 ( fxu_areg_q[0:63]), + .alu_data2 ( fxu_breg_q[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu1_in_req_id[0:1]) + ); + + alu_input_stage in_stage2( + .alu_data1 ( shift_val[0:63]), + .alu_data2 ( shift_places[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu2_in_req_id[0:1]) + ); + + mux_out mux_out1( + .req_data1 ( mux1_req_data1[0:31]), + .req_data2 ( mux1_req_data2[0:31]), + .req_data ( out_data1[0:31]), + .req_resp1 ( mux1_req_resp1[0:1]), + .req_resp2 ( mux1_req_resp2[0:1]), + .req_resp ( out_resp1[0:1]) + ); + + mux_out mux_out2( + .req_data1 ( mux2_req_data1[0:31]), + .req_data2 ( mux2_req_data2[0:31]), + .req_data ( out_data2[0:31]), + .req_resp1 ( mux2_req_resp1[0:1]), + .req_resp2 ( mux2_req_resp2[0:1]), + .req_resp ( out_resp2[0:1]) + ); + + mux_out mux_out3( + .req_data1 ( mux3_req_data1[0:31]), + .req_data2 ( mux3_req_data2[0:31]), + .req_data ( out_data3[0:31]), + .req_resp1 ( mux3_req_resp1[0:1]), + .req_resp2 ( mux3_req_resp2[0:1]), + .req_resp ( out_resp3[0:1]) + ); + + mux_out mux_out4( + .req_data1 ( mux4_req_data1[0:31]), + .req_data2 ( mux4_req_data2[0:31]), + .req_data ( out_data4[0:31]), + .req_resp1 ( mux4_req_resp1[0:1]), + .req_resp2 ( mux4_req_resp2[0:1]), + .req_resp ( out_resp4[0:1]) + ); + + alu_output_stage out_stage1( + .alu_overflow ( add_ovfl), + .alu_result ( add_sum[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data1[0:31]), + .out_data2 ( mux2_req_data1[0:31]), + .out_data3 ( mux3_req_data1[0:31]), + .out_data4 ( mux4_req_data1[0:31]), + .out_resp1 ( mux1_req_resp1[0:1]), + .out_resp2 ( mux2_req_resp1[0:1]), + .out_resp3 ( mux3_req_resp1[0:1]), + .out_resp4 ( mux4_req_resp1[0:1]), + .prio_alu_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu1_out_vld ), + .reset ( reset[1:7]) + ); + + alu_output_stage out_stage2( + .alu_overflow ( shift_ovfl), + .alu_result ( shift_out[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data2[0:31]), + .out_data2 ( mux2_req_data2[0:31]), + .out_data3 ( mux3_req_data2[0:31]), + .out_data4 ( mux4_req_data2[0:31]), + .out_resp1 ( mux1_req_resp2[0:1]), + .out_resp2 ( mux2_req_resp2[0:1]), + .out_resp3 ( mux3_req_resp2[0:1]), + .out_resp4 ( mux4_req_resp2[0:1]), + .prio_alu_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu2_out_vld ), + .reset ( reset[1:7]) + ); + + priority1 priority_logic ( + .c_clk ( c_clk), + .hold1_prio_req ( hold1_prio_req[0:3]), + .hold2_prio_req ( hold2_prio_req[0:3]), + .hold3_prio_req ( hold3_prio_req[0:3]), + .hold4_prio_req ( hold4_prio_req[0:3]), + .local_error_found ( error_found[3]), + .prio_alu1_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu1_in_req_id ( prio_alu1_in_req_id[0:1]), + .prio_alu1_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu1_out_vld ( prio_alu1_out_vld), + .prio_alu2_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu2_in_req_id ( prio_alu2_in_req_id[0:1]), + .prio_alu2_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu2_out_vld ( prio_alu2_out_vld), + .reset ( reset[1:7]) + ); + + shifter shifter1( + .bin_ovfl ( shift_ovfl), + .local_error_found ( error_found[1]), + .shift_cmd ( prio_alu2_in_cmd[0:3]), + .shift_out ( shift_out[0:63]), + .shift_places ( shift_places[0:63]), + .shift_val ( shift_val[0:63]) + ); + +endmodule // calc1_top + + + + + + + diff --git a/code/vezba6_7/dut/exdbin_mac.v b/code/vezba6_7/dut/exdbin_mac.v new file mode 100644 index 0000000..59593ef --- /dev/null +++ b/code/vezba6_7/dut/exdbin_mac.v @@ -0,0 +1,1279 @@ +// Library: calc2 +// Module: 64-bit binary adder +// Author: Naseer Siddique + +module exdbin_mac (bin_ovfl, bin_sum, alu_cmd, fxu_areg_q, local_error_found, fxu_breg_q); + + output bin_ovfl; + output [0:63] bin_sum; + + wire bin_ovfl; + wire[0:63] bin_sum; + + input [0:3] alu_cmd; + input [0:63] fxu_areg_q, fxu_breg_q; + input local_error_found; + + wire [0:63] p, p_n, g, h_n, d, a, a_n, b, b_n; + wire [0:63] fxu_areg_n_q, fxu_breg_n_q; + + wire [0:64] c, c_n; + wire [0:31] G2, P2; + wire [0:15] Gn, Pn; + wire [0:7] Gb, Pb, d8; + wire [0:5] G2b, P2b; + wire ds; + wire bin_a_z_q, bin_add_45_q; + wire [0:7] bin_by_f_e_q; + wire bin_cin_q, bin_ex_sign_q, bin_ex_sign_op_q; + wire bin_sub_45_q, bin_sub_q; + wire bin_c_0; + wire bin_c_32; + wire bin_sum_0_63_z, bin_sum_32_63_z, bin_sum_33_63_z; + wire [0:63] bruce_bin_sum; + + + integer A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S; + + assign bin_a_z_q = 1'b0; + assign bin_add_45_q = (alu_cmd[0:3] == 4'b0001) ? 1'b1: 1'b0; + assign bin_by_f_e_q = 8'b0; + assign bin_cin_q = 1'b0; + assign bin_ex_sign_q = 1'b0; + assign bin_ex_sign_op_q = 1'b0; + assign bin_sub_45_q = ( alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + assign bin_sub_q = (alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + + assign fxu_areg_n_q[0] = ~fxu_areg_q[0]; + assign fxu_breg_n_q[0] = ~fxu_breg_q[0]; + + assign fxu_areg_n_q[1] = ~fxu_areg_q[1]; + assign fxu_breg_n_q[1] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[2] = ~fxu_areg_q[2]; + assign fxu_breg_n_q[2] = ~fxu_breg_q[2]; + + assign fxu_areg_n_q[3] = ~fxu_areg_q[3]; + assign fxu_breg_n_q[3] = ~fxu_breg_q[3]; + + assign fxu_areg_n_q[4] = ~fxu_areg_q[4]; + assign fxu_breg_n_q[4] = ~fxu_breg_q[4]; + + assign fxu_areg_n_q[5] = ~fxu_areg_q[5]; + assign fxu_breg_n_q[5] = ~fxu_breg_q[5]; + + assign fxu_areg_n_q[6] = ~fxu_areg_q[6]; + assign fxu_breg_n_q[6] = ~fxu_breg_q[6]; + + assign fxu_areg_n_q[7] = ~fxu_areg_q[7]; + assign fxu_breg_n_q[7] = ~fxu_breg_q[7]; + + assign fxu_areg_n_q[8] = ~fxu_areg_q[8]; + assign fxu_breg_n_q[8] = ~fxu_breg_q[8]; + + assign fxu_areg_n_q[9] = ~fxu_areg_q[9]; + assign fxu_breg_n_q[9] = ~fxu_breg_q[9]; + + assign fxu_areg_n_q[10] = ~fxu_areg_q[10]; + assign fxu_breg_n_q[10] = ~fxu_breg_q[10]; + + assign fxu_areg_n_q[11] = ~fxu_areg_q[11]; + assign fxu_breg_n_q[11] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[12] = ~fxu_areg_q[12]; + assign fxu_breg_n_q[12] = ~fxu_breg_q[12]; + + assign fxu_areg_n_q[13] = ~fxu_areg_q[13]; + assign fxu_breg_n_q[13] = ~fxu_breg_q[13]; + + assign fxu_areg_n_q[14] = ~fxu_areg_q[14]; + assign fxu_breg_n_q[14] = ~fxu_breg_q[14]; + + assign fxu_areg_n_q[15] = ~fxu_areg_q[15]; + assign fxu_breg_n_q[15] = ~fxu_breg_q[15]; + + assign fxu_areg_n_q[16] = ~fxu_areg_q[16]; + assign fxu_breg_n_q[16] = ~fxu_breg_q[16]; + + assign fxu_areg_n_q[17] = ~fxu_areg_q[17]; + assign fxu_breg_n_q[17] = ~fxu_breg_q[17]; + + assign fxu_areg_n_q[18] = ~fxu_areg_q[18]; + assign fxu_breg_n_q[18] = ~fxu_breg_q[18]; + + assign fxu_areg_n_q[19] = ~fxu_areg_q[19]; + assign fxu_breg_n_q[19] = ~fxu_breg_q[19]; + + assign fxu_areg_n_q[20] = ~fxu_areg_q[20]; + assign fxu_breg_n_q[20] = ~fxu_breg_q[20]; + + assign fxu_areg_n_q[21] = ~fxu_areg_q[21]; + assign fxu_breg_n_q[21] = ~fxu_breg_q[21]; + + assign fxu_areg_n_q[22] = ~fxu_areg_q[22]; + assign fxu_breg_n_q[22] = ~fxu_breg_q[22]; + + assign fxu_areg_n_q[23] = ~fxu_areg_q[23]; + assign fxu_breg_n_q[23] = ~fxu_breg_q[23]; + + assign fxu_areg_n_q[24] = ~fxu_areg_q[24]; + assign fxu_breg_n_q[24] = ~fxu_breg_q[24]; + + assign fxu_areg_n_q[25] = ~fxu_areg_q[25]; + assign fxu_breg_n_q[25] = ~fxu_breg_q[25]; + + assign fxu_areg_n_q[26] = ~fxu_areg_q[26]; + assign fxu_breg_n_q[26] = ~fxu_breg_q[26]; + + assign fxu_areg_n_q[27] = ~fxu_areg_q[27]; + assign fxu_breg_n_q[27] = ~fxu_breg_q[27]; + + assign fxu_areg_n_q[28] = ~fxu_areg_q[28]; + assign fxu_breg_n_q[28] = ~fxu_breg_q[28]; + + assign fxu_areg_n_q[29] = ~fxu_areg_q[29]; + assign fxu_breg_n_q[29] = ~fxu_breg_q[29]; + + assign fxu_areg_n_q[30] = ~fxu_areg_q[30]; + assign fxu_breg_n_q[30] = ~fxu_breg_q[30]; + + assign fxu_areg_n_q[31] = ~fxu_areg_q[31]; + assign fxu_breg_n_q[31] = ~fxu_breg_q[31]; + + assign fxu_areg_n_q[32] = ~fxu_areg_q[32]; + assign fxu_breg_n_q[32] = ~fxu_breg_q[32]; + + assign fxu_areg_n_q[33] = ~fxu_areg_q[33]; + assign fxu_breg_n_q[33] = ~fxu_breg_q[33]; + + assign fxu_areg_n_q[34] = ~fxu_areg_q[34]; + assign fxu_breg_n_q[34] = ~fxu_breg_q[34]; + + assign fxu_areg_n_q[35] = ~fxu_areg_q[35]; + assign fxu_breg_n_q[35] = ~fxu_breg_q[35]; + + assign fxu_areg_n_q[36] = ~fxu_areg_q[36]; + assign fxu_breg_n_q[36] = ~fxu_breg_q[36]; + + assign fxu_areg_n_q[37] = ~fxu_areg_q[37]; + assign fxu_breg_n_q[37] = ~fxu_breg_q[37]; + + assign fxu_areg_n_q[38] = ~fxu_areg_q[38]; + assign fxu_breg_n_q[38] = ~fxu_breg_q[38]; + + assign fxu_areg_n_q[39] = ~fxu_areg_q[39]; + assign fxu_breg_n_q[39] = ~fxu_breg_q[39]; + + assign fxu_areg_n_q[40] = ~fxu_areg_q[40]; + assign fxu_breg_n_q[40] = ~fxu_breg_q[40]; + + assign fxu_areg_n_q[41] = ~fxu_areg_q[41]; + assign fxu_breg_n_q[41] = ~fxu_breg_q[41]; + + assign fxu_areg_n_q[42] = ~fxu_areg_q[42]; + assign fxu_breg_n_q[42] = ~fxu_breg_q[42]; + + assign fxu_areg_n_q[43] = ~fxu_areg_q[43]; + assign fxu_breg_n_q[43] = ~fxu_breg_q[43]; + + assign fxu_areg_n_q[44] = ~fxu_areg_q[44]; + assign fxu_breg_n_q[44] = ~fxu_breg_q[44]; + + assign fxu_areg_n_q[45] = ~fxu_areg_q[45]; + assign fxu_breg_n_q[45] = ~fxu_breg_q[45]; + + assign fxu_areg_n_q[46] = ~fxu_areg_q[46]; + assign fxu_breg_n_q[46] = ~fxu_breg_q[46]; + + assign fxu_areg_n_q[47] = ~fxu_areg_q[47]; + assign fxu_breg_n_q[47] = ~fxu_breg_q[47]; + + assign fxu_areg_n_q[48] = ~fxu_areg_q[48]; + assign fxu_breg_n_q[48] = ~fxu_breg_q[48]; + + assign fxu_areg_n_q[49] = ~fxu_areg_q[49]; + assign fxu_breg_n_q[49] = ~fxu_breg_q[49]; + + assign fxu_areg_n_q[50] = ~fxu_areg_q[50]; + assign fxu_breg_n_q[50] = ~fxu_breg_q[50]; + + assign fxu_areg_n_q[51] = ~fxu_areg_q[51]; + assign fxu_breg_n_q[51] = ~fxu_breg_q[51]; + + assign fxu_areg_n_q[52] = ~fxu_areg_q[52]; + assign fxu_breg_n_q[52] = ~fxu_breg_q[52]; + + assign fxu_areg_n_q[53] = ~fxu_areg_q[53]; + assign fxu_breg_n_q[53] = ~fxu_breg_q[53]; + + assign fxu_areg_n_q[54] = ~fxu_areg_q[54]; + assign fxu_breg_n_q[54] = ~fxu_breg_q[54]; + + assign fxu_areg_n_q[55] = ~fxu_areg_q[55]; + assign fxu_breg_n_q[55] = ~fxu_breg_q[55]; + + assign fxu_areg_n_q[56] = ~fxu_areg_q[56]; + assign fxu_breg_n_q[56] = ~fxu_breg_q[56]; + + assign fxu_areg_n_q[57] = ~fxu_areg_q[57]; + assign fxu_breg_n_q[57] = ~fxu_breg_q[57]; + + assign fxu_areg_n_q[58] = ~fxu_areg_q[58]; + assign fxu_breg_n_q[58] = ~fxu_breg_q[58]; + + assign fxu_areg_n_q[59] = ~fxu_areg_q[59]; + assign fxu_breg_n_q[59] = ~fxu_breg_q[59]; + + assign fxu_areg_n_q[60] = ~fxu_areg_q[60]; + assign fxu_breg_n_q[60] = ~fxu_breg_q[60]; + + assign fxu_areg_n_q[61] = ~fxu_areg_q[61]; + assign fxu_breg_n_q[61] = ~fxu_breg_q[61]; + + assign fxu_areg_n_q[62] = ~fxu_areg_q[62]; + assign fxu_breg_n_q[62] = ~fxu_breg_q[62]; + + assign fxu_areg_n_q[63] = ~fxu_areg_q[63]; + assign fxu_breg_n_q[63] = ~fxu_breg_q[63]; + + assign a[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0]; + assign a[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+1]; + assign a[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+2]; + assign a[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+3]; + assign a[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+4]; + assign a[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+5]; + assign a[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+6]; + assign a[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+7]; + assign a_n[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0]; + assign a_n[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+1]; + assign a_n[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+2]; + assign a_n[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+3]; + assign a_n[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+4]; + assign a_n[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+5]; + assign a_n[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+6]; + assign a_n[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+7]; + + assign a[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1]; + assign a[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+1]; + assign a[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+2]; + assign a[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+3]; + assign a[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+4]; + assign a[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+5]; + assign a[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+6]; + assign a[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+7]; + assign a_n[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1]; + assign a_n[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+1]; + assign a_n[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+2]; + assign a_n[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+3]; + assign a_n[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+4]; + assign a_n[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+5]; + assign a_n[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+6]; + assign a_n[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+7]; + + assign a[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2]; + assign a[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+1]; + assign a[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+2]; + assign a[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+3]; + assign a[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+4]; + assign a[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+5]; + assign a[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+6]; + assign a[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+7]; + assign a_n[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2]; + assign a_n[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+1]; + assign a_n[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+2]; + assign a_n[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+3]; + assign a_n[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+4]; + assign a_n[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+5]; + assign a_n[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+6]; + assign a_n[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+7]; + + assign a[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3]; + assign a[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+1]; + assign a[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+2]; + assign a[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+3]; + assign a[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+4]; + assign a[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+5]; + assign a[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+6]; + assign a[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+7]; + assign a_n[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3]; + assign a_n[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+1]; + assign a_n[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+2]; + assign a_n[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+3]; + assign a_n[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+4]; + assign a_n[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+5]; + assign a_n[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+6]; + assign a_n[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+7]; + + assign a[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4]; + assign a[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+1]; + assign a[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+2]; + assign a[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+3]; + assign a[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+4]; + assign a[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+5]; + assign a[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+6]; + assign a[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+7]; + assign a_n[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4]; + assign a_n[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+1]; + assign a_n[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+2]; + assign a_n[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+3]; + assign a_n[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+4]; + assign a_n[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+5]; + assign a_n[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+6]; + assign a_n[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+7]; + + assign a[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5]; + assign a[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+1]; + assign a[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+2]; + assign a[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+3]; + assign a[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+4]; + assign a[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+5]; + assign a[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+6]; + assign a[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+7]; + assign a_n[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5]; + assign a_n[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+1]; + assign a_n[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+2]; + assign a_n[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+3]; + assign a_n[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+4]; + assign a_n[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+5]; + assign a_n[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+6]; + assign a_n[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+7]; + + assign a[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6]; + assign a[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+1]; + assign a[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+2]; + assign a[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+3]; + assign a[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+4]; + assign a[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+5]; + assign a[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+6]; + assign a[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+7]; + assign a_n[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6]; + assign a_n[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+1]; + assign a_n[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+2]; + assign a_n[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+3]; + assign a_n[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+4]; + assign a_n[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+5]; + assign a_n[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+6]; + assign a_n[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+7]; + + assign a[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7]; + assign a[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+1]; + assign a[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+2]; + assign a[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+3]; + assign a[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+4]; + assign a[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+5]; + assign a[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+6]; + assign a[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+7]; + assign a_n[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7]; + assign a_n[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+1]; + assign a_n[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+2]; + assign a_n[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+3]; + assign a_n[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+4]; + assign a_n[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+5]; + assign a_n[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+6]; + assign a_n[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+7]; + + + assign b[8*0] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0] : fxu_breg_q[8*0]; + assign b[8*0+1] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+1] : fxu_breg_q[8*0+1]; + assign b[8*0+2] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+2] : fxu_breg_q[8*0+2]; + assign b[8*0+3] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+3] : fxu_breg_q[8*0+3]; + assign b[8*0+4] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+4] : fxu_breg_q[8*0+4]; + assign b[8*0+5] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+5] : fxu_breg_q[8*0+5]; + assign b[8*0+6] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+6] : fxu_breg_q[8*0+6]; + assign b[8*0+7] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+7] : fxu_breg_q[8*0+7]; + assign b_n[8*0] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0] : fxu_breg_n_q[8*0]; + assign b_n[8*0+1] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+1] : fxu_breg_n_q[8*0+1]; + assign b_n[8*0+2] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+2] : fxu_breg_n_q[8*0+2]; + assign b_n[8*0+3] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+3] : fxu_breg_n_q[8*0+3]; + assign b_n[8*0+4] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+4] : fxu_breg_n_q[8*0+4]; + assign b_n[8*0+5] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+5] : fxu_breg_n_q[8*0+5]; + assign b_n[8*0+6] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+6] : fxu_breg_n_q[8*0+6]; + assign b_n[8*0+7] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+7] : fxu_breg_n_q[8*0+7]; + + assign b[8*1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1] : fxu_breg_q[8*1]; + assign b[8*1+1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+1] : fxu_breg_q[8*1+1]; + assign b[8*1+2] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+2] : fxu_breg_q[8*1+2]; + assign b[8*1+3] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+3] : fxu_breg_q[8*1+3]; + assign b[8*1+4] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+4] : fxu_breg_q[8*1+4]; + assign b[8*1+5] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+5] : fxu_breg_q[8*1+5]; + assign b[8*1+6] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+6] : fxu_breg_q[8*1+6]; + assign b[8*1+7] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+7] : fxu_breg_q[8*1+7]; + assign b_n[8*1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1] : fxu_breg_n_q[8*1]; + assign b_n[8*1+1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+1] : fxu_breg_n_q[8*1+1]; + assign b_n[8*1+2] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+2] : fxu_breg_n_q[8*1+2]; + assign b_n[8*1+3] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+3] : fxu_breg_n_q[8*1+3]; + assign b_n[8*1+4] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+4] : fxu_breg_n_q[8*1+4]; + assign b_n[8*1+5] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+5] : fxu_breg_n_q[8*1+5]; + assign b_n[8*1+6] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+6] : fxu_breg_n_q[8*1+6]; + assign b_n[8*1+7] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+7] : fxu_breg_n_q[8*1+7]; + + assign b[8*2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2] : fxu_breg_q[8*2]; + assign b[8*2+1] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+1] : fxu_breg_q[8*2+1]; + assign b[8*2+2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+2] : fxu_breg_q[8*2+2]; + assign b[8*2+3] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+3] : fxu_breg_q[8*2+3]; + assign b[8*2+4] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+4] : fxu_breg_q[8*2+4]; + assign b[8*2+5] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+5] : fxu_breg_q[8*2+5]; + assign b[8*2+6] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+6] : fxu_breg_q[8*2+6]; + assign b[8*2+7] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+7] : fxu_breg_q[8*2+7]; + assign b_n[8*2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2] : fxu_breg_n_q[8*2]; + assign b_n[8*2+1] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+1] : fxu_breg_n_q[8*2+1]; + assign b_n[8*2+2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+2] : fxu_breg_n_q[8*2+2]; + assign b_n[8*2+3] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+3] : fxu_breg_n_q[8*2+3]; + assign b_n[8*2+4] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+4] : fxu_breg_n_q[8*2+4]; + assign b_n[8*2+5] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+5] : fxu_breg_n_q[8*2+5]; + assign b_n[8*2+6] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+6] : fxu_breg_n_q[8*2+6]; + assign b_n[8*2+7] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+7] : fxu_breg_n_q[8*2+7]; + + assign b[8*3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3] : fxu_breg_q[8*3]; + assign b[8*3+1] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+1] : fxu_breg_q[8*3+1]; + assign b[8*3+2] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+2] : fxu_breg_q[8*3+2]; + assign b[8*3+3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+3] : fxu_breg_q[8*3+3]; + assign b[8*3+4] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+4] : fxu_breg_q[8*3+4]; + assign b[8*3+5] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+5] : fxu_breg_q[8*3+5]; + assign b[8*3+6] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+6] : fxu_breg_q[8*3+6]; + assign b[8*3+7] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+7] : fxu_breg_q[8*3+7]; + assign b_n[8*3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3] : fxu_breg_n_q[8*3]; + assign b_n[8*3+1] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+1] : fxu_breg_n_q[8*3+1]; + assign b_n[8*3+2] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+2] : fxu_breg_n_q[8*3+2]; + assign b_n[8*3+3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+3] : fxu_breg_n_q[8*3+3]; + assign b_n[8*3+4] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+4] : fxu_breg_n_q[8*3+4]; + assign b_n[8*3+5] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+5] : fxu_breg_n_q[8*3+5]; + assign b_n[8*3+6] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+6] : fxu_breg_n_q[8*3+6]; + assign b_n[8*3+7] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+7] : fxu_breg_n_q[8*3+7]; + + assign b[8*6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6] : fxu_breg_q[8*6]; + assign b[8*6+1] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+1] : fxu_breg_q[8*6+1]; + assign b[8*6+2] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+2] : fxu_breg_q[8*6+2]; + assign b[8*6+3] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+3] : (local_error_found) ? fxu_breg_q[8*6+3] : fxu_breg_q[8*6+2]; + assign b[8*6+4] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+4] : fxu_breg_q[8*6+4]; + assign b[8*6+5] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+5] : fxu_breg_q[8*6+5]; + assign b[8*6+6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+6] : fxu_breg_q[8*6+6]; + assign b[8*6+7] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+7] : fxu_breg_q[8*6+7]; + assign b_n[8*6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6] : fxu_breg_n_q[8*6]; + assign b_n[8*6+1] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+1] : fxu_breg_n_q[8*6+1]; + assign b_n[8*6+2] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+2] : fxu_breg_n_q[8*6+2]; + assign b_n[8*6+3] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+3] : fxu_breg_n_q[8*6+3]; + assign b_n[8*6+4] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+4] : fxu_breg_n_q[8*6+4]; + assign b_n[8*6+5] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+5] : fxu_breg_n_q[8*6+5]; + assign b_n[8*6+6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+6] : fxu_breg_n_q[8*6+6]; + assign b_n[8*6+7] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+7] : fxu_breg_n_q[8*6+7]; + + assign b[8*7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7] : fxu_breg_q[8*7]; + assign b[8*7+1] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+1] : fxu_breg_q[8*7+1]; + assign b[8*7+2] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+2] : fxu_breg_q[8*7+2]; + assign b[8*7+3] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+3] : (local_error_found) ? fxu_breg_q[8*7+3] : fxu_breg_q[8*7+2]; + assign b[8*7+4] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+4] : fxu_breg_q[8*7+4]; + assign b[8*7+5] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+5] : fxu_breg_q[8*7+5]; + assign b[8*7+6] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+6] : fxu_breg_q[8*7+6]; + assign b[8*7+7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+7] : fxu_breg_q[8*7+7]; + assign b_n[8*7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7] : fxu_breg_n_q[8*7]; + assign b_n[8*7+1] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+1] : fxu_breg_n_q[8*7+1]; + assign b_n[8*7+2] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+2] : fxu_breg_n_q[8*7+2]; + assign b_n[8*7+3] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+3] : fxu_breg_n_q[8*7+3]; + assign b_n[8*7+4] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+4] : fxu_breg_n_q[8*7+4]; + assign b_n[8*7+5] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+5] : fxu_breg_n_q[8*7+5]; + assign b_n[8*7+6] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+6] : fxu_breg_n_q[8*7+6]; + assign b_n[8*7+7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+7] : fxu_breg_n_q[8*7+7]; + + assign b[8*4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4] : (bin_add_45_q) ? fxu_breg_q[8*4] : 1'b0; + assign b[8*4+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+1] : (bin_add_45_q) ? fxu_breg_q[8*4+1] : 1'b0; + assign b[8*4+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+2] : (bin_add_45_q) ? fxu_breg_q[8*4+2] : 1'b0; + assign b[8*4+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+3] : (bin_add_45_q) ? fxu_breg_q[8*4+3] : 1'b0; + assign b[8*4+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+4] : (bin_add_45_q) ? fxu_breg_q[8*4+4] : 1'b0; + assign b[8*4+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+5] : (bin_add_45_q) ? fxu_breg_q[8*4+5] : 1'b0; + assign b[8*4+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+6] : (bin_add_45_q) ? fxu_breg_q[8*4+6] : 1'b0; + assign b[8*4+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+7] : (bin_add_45_q) ? fxu_breg_q[8*4+7] : 1'b0; + assign b_n[8*4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4] : (bin_add_45_q) ? fxu_breg_n_q[8*4] : 1'b0; + assign b_n[8*4+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+1] : (bin_add_45_q) ? fxu_breg_n_q[8*4+1] : 1'b0; + assign b_n[8*4+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+2] : (bin_add_45_q) ? fxu_breg_n_q[8*4+2] : 1'b0; + assign b_n[8*4+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+3] : (bin_add_45_q) ? fxu_breg_n_q[8*4+3] : 1'b0; + assign b_n[8*4+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+4] : (bin_add_45_q) ? fxu_breg_n_q[8*4+4] : 1'b0; + assign b_n[8*4+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+5] : (bin_add_45_q) ? fxu_breg_n_q[8*4+5] : 1'b0; + assign b_n[8*4+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+6] : (bin_add_45_q) ? fxu_breg_n_q[8*4+6] : 1'b0; + assign b_n[8*4+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+7] : (bin_add_45_q) ? fxu_breg_n_q[8*4+7] : 1'b0; + + assign b[8*5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5] : (bin_add_45_q) ? fxu_breg_q[8*5] : 1'b0; + assign b[8*5+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+1] : (bin_add_45_q) ? fxu_breg_q[8*5+1] : 1'b0; + assign b[8*5+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+2] : (bin_add_45_q) ? fxu_breg_q[8*5+2] : 1'b0; + assign b[8*5+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+3] : (bin_add_45_q) ? fxu_breg_q[8*5+3] : 1'b0; + assign b[8*5+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+4] : (bin_add_45_q) ? fxu_breg_q[8*5+4] : 1'b0; + assign b[8*5+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+5] : (bin_add_45_q) ? fxu_breg_q[8*5+5] : 1'b0; + assign b[8*5+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+6] : (bin_add_45_q) ? fxu_breg_q[8*5+6] : 1'b0; + assign b[8*5+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+7] : (bin_add_45_q) ? fxu_breg_q[8*5+7] : 1'b0; + assign b_n[8*5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5] : (bin_add_45_q) ? fxu_breg_n_q[8*5] : 1'b0; + assign b_n[8*5+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+1] : (bin_add_45_q) ? fxu_breg_n_q[8*5+1] : 1'b0; + assign b_n[8*5+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+2] : (bin_add_45_q) ? fxu_breg_n_q[8*5+2] : 1'b0; + assign b_n[8*5+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+3] : (bin_add_45_q) ? fxu_breg_n_q[8*5+3] : 1'b0; + assign b_n[8*5+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+4] : (bin_add_45_q) ? fxu_breg_n_q[8*5+4] : 1'b0; + assign b_n[8*5+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+5] : (bin_add_45_q) ? fxu_breg_n_q[8*5+5] : 1'b0; + assign b_n[8*5+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+6] : (bin_add_45_q) ? fxu_breg_n_q[8*5+6] : 1'b0; + assign b_n[8*5+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+7] : (bin_add_45_q) ? fxu_breg_n_q[8*5+7] : 1'b0; + + assign c[64] = bin_cin_q; + assign c_n[64] = (~bin_cin_q); + + assign bruce_bin_sum[0] = (b_n[0] & a_n[0] & c[0+1]) | (b_n[0] & a[0] & c_n[0+1]) | (b[0] & a_n[0] & c_n[0+1]) | (b[0] & a[0] & c[0+1]); + assign p[0] = a[0] | b[0]; + assign p_n[0] = ~p[0]; + assign g[0] = a[0] & b[0]; + assign h_n[0] = g[0] | p_n[0]; + + assign bruce_bin_sum[1] = (b_n[1] & a_n[1] & c[1+1]) | (b_n[1] & a[1] & c_n[1+1]) | (b[1] & a_n[1] & c_n[1+1]) | (b[1] & a[1] & c[1+1]); + assign p[1] = a[1] | b[1]; + assign p_n[1] = ~p[1]; + assign g[1] = a[1] & b[1]; + assign h_n[1] = g[1] | p_n[1]; + + assign bruce_bin_sum[2] = (b_n[2] & a_n[2] & c[2+1]) | (b_n[2] & a[2] & c_n[2+1]) | (b[2] & a_n[2] & c_n[2+1]) | (b[2] & a[2] & c[2+1]); + assign p[2] = a[2] | b[2]; + assign p_n[2] = ~p[2]; + assign g[2] = a[2] & b[2]; + assign h_n[2] = g[2] | p_n[2]; + + assign bruce_bin_sum[3] = (b_n[3] & a_n[3] & c[3+1]) | (b_n[3] & a[3] & c_n[3+1]) | (b[3] & a_n[3] & c_n[3+1]) | (b[3] & a[3] & c[3+1]); + assign p[3] = a[3] | b[3]; + assign p_n[3] = ~p[3]; + assign g[3] = a[3] & b[3]; + assign h_n[3] = g[3] | p_n[3]; + + assign bruce_bin_sum[4] = (b_n[4] & a_n[4] & c[4+1]) | (b_n[4] & a[4] & c_n[4+1]) | (b[4] & a_n[4] & c_n[4+1]) | (b[4] & a[4] & c[4+1]); + assign p[4] = a[4] | b[4]; + assign p_n[4] = ~p[4]; + assign g[4] = a[4] & b[4]; + assign h_n[4] = g[4] | p_n[4]; + + assign bruce_bin_sum[5] = (b_n[5] & a_n[5] & c[5+1]) | (b_n[5] & a[5] & c_n[5+1]) | (b[5] & a_n[5] & c_n[5+1]) | (b[5] & a[5] & c[5+1]); + assign p[5] = a[5] | b[5]; + assign p_n[5] = ~p[5]; + assign g[5] = a[5] & b[5]; + assign h_n[5] = g[5] | p_n[5]; + + assign bruce_bin_sum[6] = (b_n[6] & a_n[6] & c[6+1]) | (b_n[6] & a[6] & c_n[6+1]) | (b[6] & a_n[6] & c_n[6+1]) | (b[6] & a[6] & c[6+1]); + assign p[6] = a[6] | b[6]; + assign p_n[6] = ~p[6]; + assign g[6] = a[6] & b[6]; + assign h_n[6] = g[6] | p_n[6]; + + assign bruce_bin_sum[7] = (b_n[7] & a_n[7] & c[7+1]) | (b_n[7] & a[7] & c_n[7+1]) | (b[7] & a_n[7] & c_n[7+1]) | (b[7] & a[7] & c[7+1]); + assign p[7] = a[7] | b[7]; + assign p_n[7] = ~p[7]; + assign g[7] = a[7] & b[7]; + assign h_n[7] = g[7] | p_n[7]; + + assign bruce_bin_sum[8] = (b_n[8] & a_n[8] & c[8+1]) | (b_n[8] & a[8] & c_n[8+1]) | (b[8] & a_n[8] & c_n[8+1]) | (b[8] & a[8] & c[8+1]); + assign p[8] = a[8] | b[8]; + assign p_n[8] = ~p[8]; + assign g[8] = a[8] & b[8]; + assign h_n[8] = g[8] | p_n[8]; + + assign bruce_bin_sum[9] = (b_n[9] & a_n[9] & c[9+1]) | (b_n[9] & a[9] & c_n[9+1]) | (b[9] & a_n[9] & c_n[9+1]) | (b[9] & a[9] & c[9+1]); + assign p[9] = a[9] | b[9]; + assign p_n[9] = ~p[9]; + assign g[9] = a[9] & b[9]; + assign h_n[9] = g[9] | p_n[9]; + + assign bruce_bin_sum[10] = (b_n[10] & a_n[10] & c[10+1]) | (b_n[10] & a[10] & c_n[10+1]) | (b[10] & a_n[10] & c_n[10+1]) | (b[10] & a[10] & c[10+1]); + assign p[10] = a[10] | b[10]; + assign p_n[10] = ~p[10]; + assign g[10] = a[10] & b[10]; + assign h_n[10] = g[10] | p_n[10]; + + assign bruce_bin_sum[11] = (b_n[11] & a_n[11] & c[11+1]) | (b_n[11] & a[11] & c_n[11+1]) | (b[11] & a_n[11] & c_n[11+1]) | (b[11] & a[11] & c[11+1]); + assign p[11] = a[11] | b[11]; + assign p_n[11] = ~p[11]; + assign g[11] = a[11] & b[11]; + assign h_n[11] = g[11] | p_n[11]; + + assign bruce_bin_sum[12] = (b_n[12] & a_n[12] & c[12+1]) | (b_n[12] & a[12] & c_n[12+1]) | (b[12] & a_n[12] & c_n[12+1]) | (b[12] & a[12] & c[12+1]); + assign p[12] = a[12] | b[12]; + assign p_n[12] = ~p[12]; + assign g[12] = a[12] & b[12]; + assign h_n[12] = g[12] | p_n[12]; + + assign bruce_bin_sum[13] = (b_n[13] & a_n[13] & c[13+1]) | (b_n[13] & a[13] & c_n[13+1]) | (b[13] & a_n[13] & c_n[13+1]) | (b[13] & a[13] & c[13+1]); + assign p[13] = a[13] | b[13]; + assign p_n[13] = ~p[13]; + assign g[13] = a[13] & b[13]; + assign h_n[13] = g[13] | p_n[13]; + + assign bruce_bin_sum[14] = (b_n[14] & a_n[14] & c[14+1]) | (b_n[14] & a[14] & c_n[14+1]) | (b[14] & a_n[14] & c_n[14+1]) | (b[14] & a[14] & c[14+1]); + assign p[14] = a[14] | b[14]; + assign p_n[14] = ~p[14]; + assign g[14] = a[14] & b[14]; + assign h_n[14] = g[14] | p_n[14]; + + assign bruce_bin_sum[15] = (b_n[15] & a_n[15] & c[15+1]) | (b_n[15] & a[15] & c_n[15+1]) | (b[15] & a_n[15] & c_n[15+1]) | (b[15] & a[15] & c[15+1]); + assign p[15] = a[15] | b[15]; + assign p_n[15] = ~p[15]; + assign g[15] = a[15] & b[15]; + assign h_n[15] = g[15] | p_n[15]; + + assign bruce_bin_sum[16] = (b_n[16] & a_n[16] & c[16+1]) | (b_n[16] & a[16] & c_n[16+1]) | (b[16] & a_n[16] & c_n[16+1]) | (b[16] & a[16] & c[16+1]); + assign p[16] = a[16] | b[16]; + assign p_n[16] = ~p[16]; + assign g[16] = a[16] & b[16]; + assign h_n[16] = g[16] | p_n[16]; + + assign bruce_bin_sum[17] = (b_n[17] & a_n[17] & c[17+1]) | (b_n[17] & a[17] & c_n[17+1]) | (b[17] & a_n[17] & c_n[17+1]) | (b[17] & a[17] & c[17+1]); + assign p[17] = a[17] | b[17]; + assign p_n[17] = ~p[17]; + assign g[17] = a[17] & b[17]; + assign h_n[17] = g[17] | p_n[17]; + + assign bruce_bin_sum[18] = (b_n[18] & a_n[18] & c[18+1]) | (b_n[18] & a[18] & c_n[18+1]) | (b[18] & a_n[18] & c_n[18+1]) | (b[18] & a[18] & c[18+1]); + assign p[18] = a[18] | b[18]; + assign p_n[18] = ~p[18]; + assign g[18] = a[18] & b[18]; + assign h_n[18] = g[18] | p_n[18]; + + assign bruce_bin_sum[19] = (b_n[19] & a_n[19] & c[19+1]) | (b_n[19] & a[19] & c_n[19+1]) | (b[19] & a_n[19] & c_n[19+1]) | (b[19] & a[19] & c[19+1]); + assign p[19] = a[19] | b[19]; + assign p_n[19] = ~p[19]; + assign g[19] = a[19] & b[19]; + assign h_n[19] = g[19] | p_n[19]; + + assign bruce_bin_sum[20] = (b_n[20] & a_n[20] & c[20+1]) | (b_n[20] & a[20] & c_n[20+1]) | (b[20] & a_n[20] & c_n[20+1]) | (b[20] & a[20] & c[20+1]); + assign p[20] = a[20] | b[20]; + assign p_n[20] = ~p[20]; + assign g[20] = a[20] & b[20]; + assign h_n[20] = g[20] | p_n[20]; + + assign bruce_bin_sum[21] = (b_n[21] & a_n[21] & c[21+1]) | (b_n[21] & a[21] & c_n[21+1]) | (b[21] & a_n[21] & c_n[21+1]) | (b[21] & a[21] & c[21+1]); + assign p[21] = a[21] | b[21]; + assign p_n[21] = ~p[21]; + assign g[21] = a[21] & b[21]; + assign h_n[21] = g[21] | p_n[21]; + + assign bruce_bin_sum[22] = (b_n[22] & a_n[22] & c[22+1]) | (b_n[22] & a[22] & c_n[22+1]) | (b[22] & a_n[22] & c_n[22+1]) | (b[22] & a[22] & c[22+1]); + assign p[22] = a[22] | b[22]; + assign p_n[22] = ~p[22]; + assign g[22] = a[22] & b[22]; + assign h_n[22] = g[22] | p_n[22]; + + assign bruce_bin_sum[23] = (b_n[23] & a_n[23] & c[23+1]) | (b_n[23] & a[23] & c_n[23+1]) | (b[23] & a_n[23] & c_n[23+1]) | (b[23] & a[23] & c[23+1]); + assign p[23] = a[23] | b[23]; + assign p_n[23] = ~p[23]; + assign g[23] = a[23] & b[23]; + assign h_n[23] = g[23] | p_n[23]; + + assign bruce_bin_sum[24] = (b_n[24] & a_n[24] & c[24+1]) | (b_n[24] & a[24] & c_n[24+1]) | (b[24] & a_n[24] & c_n[24+1]) | (b[24] & a[24] & c[24+1]); + assign p[24] = a[24] | b[24]; + assign p_n[24] = ~p[24]; + assign g[24] = a[24] & b[24]; + assign h_n[24] = g[24] | p_n[24]; + + assign bruce_bin_sum[25] = (b_n[25] & a_n[25] & c[25+1]) | (b_n[25] & a[25] & c_n[25+1]) | (b[25] & a_n[25] & c_n[25+1]) | (b[25] & a[25] & c[25+1]); + assign p[25] = a[25] | b[25]; + assign p_n[25] = ~p[25]; + assign g[25] = a[25] & b[25]; + assign h_n[25] = g[25] | p_n[25]; + + assign bruce_bin_sum[26] = (b_n[26] & a_n[26] & c[26+1]) | (b_n[26] & a[26] & c_n[26+1]) | (b[26] & a_n[26] & c_n[26+1]) | (b[26] & a[26] & c[26+1]); + assign p[26] = a[26] | b[26]; + assign p_n[26] = ~p[26]; + assign g[26] = a[26] & b[26]; + assign h_n[26] = g[26] | p_n[26]; + + assign bruce_bin_sum[27] = (b_n[27] & a_n[27] & c[27+1]) | (b_n[27] & a[27] & c_n[27+1]) | (b[27] & a_n[27] & c_n[27+1]) | (b[27] & a[27] & c[27+1]); + assign p[27] = a[27] | b[27]; + assign p_n[27] = ~p[27]; + assign g[27] = a[27] & b[27]; + assign h_n[27] = g[27] | p_n[27]; + + assign bruce_bin_sum[28] = (b_n[28] & a_n[28] & c[28+1]) | (b_n[28] & a[28] & c_n[28+1]) | (b[28] & a_n[28] & c_n[28+1]) | (b[28] & a[28] & c[28+1]); + assign p[28] = a[28] | b[28]; + assign p_n[28] = ~p[28]; + assign g[28] = a[28] & b[28]; + assign h_n[28] = g[28] | p_n[28]; + + assign bruce_bin_sum[29] = (b_n[29] & a_n[29] & c[29+1]) | (b_n[29] & a[29] & c_n[29+1]) | (b[29] & a_n[29] & c_n[29+1]) | (b[29] & a[29] & c[29+1]); + assign p[29] = a[29] | b[29]; + assign p_n[29] = ~p[29]; + assign g[29] = a[29] & b[29]; + assign h_n[29] = g[29] | p_n[29]; + + assign bruce_bin_sum[30] = (b_n[30] & a_n[30] & c[30+1]) | (b_n[30] & a[30] & c_n[30+1]) | (b[30] & a_n[30] & c_n[30+1]) | (b[30] & a[30] & c[30+1]); + assign p[30] = a[30] | b[30]; + assign p_n[30] = ~p[30]; + assign g[30] = a[30] & b[30]; + assign h_n[30] = g[30] | p_n[30]; + + assign bruce_bin_sum[31] = (b_n[31] & a_n[31] & c[31+1]) | (b_n[31] & a[31] & c_n[31+1]) | (b[31] & a_n[31] & c_n[31+1]) | (b[31] & a[31] & c[31+1]); + assign p[31] = a[31] | b[31]; + assign p_n[31] = ~p[31]; + assign g[31] = a[31] & b[31]; + assign h_n[31] = g[31] | p_n[31]; + + assign bruce_bin_sum[32] = (b_n[32] & a_n[32] & c[32+1]) | (b_n[32] & a[32] & c_n[32+1]) | (b[32] & a_n[32] & c_n[32+1]) | (b[32] & a[32] & c[32+1]); + assign p[32] = a[32] | b[32]; + assign p_n[32] = ~p[32]; + assign g[32] = a[32] & b[32]; + assign h_n[32] = g[32] | p_n[32]; + + assign bruce_bin_sum[33] = (b_n[33] & a_n[33] & c[33+1]) | (b_n[33] & a[33] & c_n[33+1]) | (b[33] & a_n[33] & c_n[33+1]) | (b[33] & a[33] & c[33+1]); + assign p[33] = a[33] | b[33]; + assign p_n[33] = ~p[33]; + assign g[33] = a[33] & b[33]; + assign h_n[33] = g[33] | p_n[33]; + + assign bruce_bin_sum[34] = (b_n[34] & a_n[34] & c[34+1]) | (b_n[34] & a[34] & c_n[34+1]) | (b[34] & a_n[34] & c_n[34+1]) | (b[34] & a[34] & c[34+1]); + assign p[34] = a[34] | b[34]; + assign p_n[34] = ~p[34]; + assign g[34] = a[34] & b[34]; + assign h_n[34] = g[34] | p_n[34]; + + assign bruce_bin_sum[35] = (b_n[35] & a_n[35] & c[35+1]) | (b_n[35] & a[35] & c_n[35+1]) | (b[35] & a_n[35] & c_n[35+1]) | (b[35] & a[35] & c[35+1]); + assign p[35] = a[35] | b[35]; + assign p_n[35] = ~p[35]; + assign g[35] = a[35] & b[35]; + assign h_n[35] = g[35] | p_n[35]; + + assign bruce_bin_sum[36] = (b_n[36] & a_n[36] & c[36+1]) | (b_n[36] & a[36] & c_n[36+1]) | (b[36] & a_n[36] & c_n[36+1]) | (b[36] & a[36] & c[36+1]); + assign p[36] = a[36] | b[36]; + assign p_n[36] = ~p[36]; + assign g[36] = a[36] & b[36]; + assign h_n[36] = g[36] | p_n[36]; + + assign bruce_bin_sum[37] = (b_n[37] & a_n[37] & c[37+1]) | (b_n[37] & a[37] & c_n[37+1]) | (b[37] & a_n[37] & c_n[37+1]) | (b[37] & a[37] & c[37+1]); + assign p[37] = a[37] | b[37]; + assign p_n[37] = ~p[37]; + assign g[37] = a[37] & b[37]; + assign h_n[37] = g[37] | p_n[37]; + + assign bruce_bin_sum[38] = (b_n[38] & a_n[38] & c[38+1]) | (b_n[38] & a[38] & c_n[38+1]) | (b[38] & a_n[38] & c_n[38+1]) | (b[38] & a[38] & c[38+1]); + assign p[38] = a[38] | b[38]; + assign p_n[38] = ~p[38]; + assign g[38] = a[38] & b[38]; + assign h_n[38] = g[38] | p_n[38]; + + assign bruce_bin_sum[39] = (b_n[39] & a_n[39] & c[39+1]) | (b_n[39] & a[39] & c_n[39+1]) | (b[39] & a_n[39] & c_n[39+1]) | (b[39] & a[39] & c[39+1]); + assign p[39] = a[39] | b[39]; + assign p_n[39] = ~p[39]; + assign g[39] = a[39] & b[39]; + assign h_n[39] = g[39] | p_n[39]; + + assign bruce_bin_sum[40] = (b_n[40] & a_n[40] & c[40+1]) | (b_n[40] & a[40] & c_n[40+1]) | (b[40] & a_n[40] & c_n[40+1]) | (b[40] & a[40] & c[40+1]); + assign p[40] = a[40] | b[40]; + assign p_n[40] = ~p[40]; + assign g[40] = a[40] & b[40]; + assign h_n[40] = g[40] | p_n[40]; + + assign bruce_bin_sum[41] = (b_n[41] & a_n[41] & c[41+1]) | (b_n[41] & a[41] & c_n[41+1]) | (b[41] & a_n[41] & c_n[41+1]) | (b[41] & a[41] & c[41+1]); + assign p[41] = a[41] | b[41]; + assign p_n[41] = ~p[41]; + assign g[41] = a[41] & b[41]; + assign h_n[41] = g[41] | p_n[41]; + + assign bruce_bin_sum[42] = (b_n[42] & a_n[42] & c[42+1]) | (b_n[42] & a[42] & c_n[42+1]) | (b[42] & a_n[42] & c_n[42+1]) | (b[42] & a[42] & c[42+1]); + assign p[42] = a[42] | b[42]; + assign p_n[42] = ~p[42]; + assign g[42] = a[42] & b[42]; + assign h_n[42] = g[42] | p_n[42]; + + assign bruce_bin_sum[43] = (b_n[43] & a_n[43] & c[43+1]) | (b_n[43] & a[43] & c_n[43+1]) | (b[43] & a_n[43] & c_n[43+1]) | (b[43] & a[43] & c[43+1]); + assign p[43] = a[43] | b[43]; + assign p_n[43] = ~p[43]; + assign g[43] = a[43] & b[43]; + assign h_n[43] = g[43] | p_n[43]; + + assign bruce_bin_sum[44] = (b_n[44] & a_n[44] & c[44+1]) | (b_n[44] & a[44] & c_n[44+1]) | (b[44] & a_n[44] & c_n[44+1]) | (b[44] & a[44] & c[44+1]); + assign p[44] = a[44] | b[44]; + assign p_n[44] = ~p[44]; + assign g[44] = a[44] & b[44]; + assign h_n[44] = g[44] | p_n[44]; + + assign bruce_bin_sum[45] = (b_n[45] & a_n[45] & c[45+1]) | (b_n[45] & a[45] & c_n[45+1]) | (b[45] & a_n[45] & c_n[45+1]) | (b[45] & a[45] & c[45+1]); + assign p[45] = a[45] | b[45]; + assign p_n[45] = ~p[45]; + assign g[45] = a[45] & b[45]; + assign h_n[45] = g[45] | p_n[45]; + + assign bruce_bin_sum[46] = (b_n[46] & a_n[46] & c[46+1]) | (b_n[46] & a[46] & c_n[46+1]) | (b[46] & a_n[46] & c_n[46+1]) | (b[46] & a[46] & c[46+1]); + assign p[46] = a[46] | b[46]; + assign p_n[46] = ~p[46]; + assign g[46] = a[46] & b[46]; + assign h_n[46] = g[46] | p_n[46]; + + assign bruce_bin_sum[47] = (b_n[47] & a_n[47] & c[47+1]) | (b_n[47] & a[47] & c_n[47+1]) | (b[47] & a_n[47] & c_n[47+1]) | (b[47] & a[47] & c[47+1]); + assign p[47] = a[47] | b[47]; + assign p_n[47] = ~p[47]; + assign g[47] = a[47] & b[47]; + assign h_n[47] = g[47] | p_n[47]; + + assign bruce_bin_sum[48] = (b_n[48] & a_n[48] & c[48+1]) | (b_n[48] & a[48] & c_n[48+1]) | (b[48] & a_n[48] & c_n[48+1]) | (b[48] & a[48] & c[48+1]); + assign p[48] = a[48] | b[48]; + assign p_n[48] = ~p[48]; + assign g[48] = a[48] & b[48]; + assign h_n[48] = g[48] | p_n[48]; + + assign bruce_bin_sum[49] = (b_n[49] & a_n[49] & c[49+1]) | (b_n[49] & a[49] & c_n[49+1]) | (b[49] & a_n[49] & c_n[49+1]) | (b[49] & a[49] & c[49+1]); + assign p[49] = a[49] | b[49]; + assign p_n[49] = ~p[49]; + assign g[49] = a[49] & b[49]; + assign h_n[49] = g[49] | p_n[49]; + + assign bruce_bin_sum[50] = (b_n[50] & a_n[50] & c[50+1]) | (b_n[50] & a[50] & c_n[50+1]) | (b[50] & a_n[50] & c_n[50+1]) | (b[50] & a[50] & c[50+1]); + assign p[50] = a[50] | b[50]; + assign p_n[50] = ~p[50]; + assign g[50] = a[50] & b[50]; + assign h_n[50] = g[50] | p_n[50]; + + assign bruce_bin_sum[51] = (b_n[51] & a_n[51] & c[51+1]) | (b_n[51] & a[51] & c_n[51+1]) | (b[51] & a_n[51] & c_n[51+1]) | (b[51] & a[51] & c[51+1]); + assign p[51] = a[51] | b[51]; + assign p_n[51] = ~p[51]; + assign g[51] = a[51] & b[51]; + assign h_n[51] = g[51] | p_n[51]; + + assign bruce_bin_sum[52] = (b_n[52] & a_n[52] & c[52+1]) | (b_n[52] & a[52] & c_n[52+1]) | (b[52] & a_n[52] & c_n[52+1]) | (b[52] & a[52] & c[52+1]); + assign p[52] = a[52] | b[52]; + assign p_n[52] = ~p[52]; + assign g[52] = a[52] & b[52]; + assign h_n[52] = g[52] | p_n[52]; + + assign bruce_bin_sum[53] = (b_n[53] & a_n[53] & c[53+1]) | (b_n[53] & a[53] & c_n[53+1]) | (b[53] & a_n[53] & c_n[53+1]) | (b[53] & a[53] & c[53+1]); + assign p[53] = a[53] | b[53]; + assign p_n[53] = ~p[53]; + assign g[53] = a[53] & b[53]; + assign h_n[53] = g[53] | p_n[53]; + + assign bruce_bin_sum[54] = (b_n[54] & a_n[54] & c[54+1]) | (b_n[54] & a[54] & c_n[54+1]) | (b[54] & a_n[54] & c_n[54+1]) | (b[54] & a[54] & c[54+1]); + assign p[54] = a[54] | b[54]; + assign p_n[54] = ~p[54]; + assign g[54] = a[54] & b[54]; + assign h_n[54] = g[54] | p_n[54]; + + assign bruce_bin_sum[55] = (b_n[55] & a_n[55] & c[55+1]) | (b_n[55] & a[55] & c_n[55+1]) | (b[55] & a_n[55] & c_n[55+1]) | (b[55] & a[55] & c[55+1]); + assign p[55] = a[55] | b[55]; + assign p_n[55] = ~p[55]; + assign g[55] = a[55] & b[55]; + assign h_n[55] = g[55] | p_n[55]; + + assign bruce_bin_sum[56] = (b_n[56] & a_n[56] & c[56+1]) | (b_n[56] & a[56] & c_n[56+1]) | (b[56] & a_n[56] & c_n[56+1]) | (b[56] & a[56] & c[56+1]); + assign p[56] = a[56] | b[56]; + assign p_n[56] = ~p[56]; + assign g[56] = a[56] & b[56]; + assign h_n[56] = g[56] | p_n[56]; + + assign bruce_bin_sum[57] = (b_n[57] & a_n[57] & c[57+1]) | (b_n[57] & a[57] & c_n[57+1]) | (b[57] & a_n[57] & c_n[57+1]) | (b[57] & a[57] & c[57+1]); + assign p[57] = a[57] | b[57]; + assign p_n[57] = ~p[57]; + assign g[57] = a[57] & b[57]; + assign h_n[57] = g[57] | p_n[57]; + + assign bruce_bin_sum[58] = (b_n[58] & a_n[58] & c[58+1]) | (b_n[58] & a[58] & c_n[58+1]) | (b[58] & a_n[58] & c_n[58+1]) | (b[58] & a[58] & c[58+1]); + assign p[58] = a[58] | b[58]; + assign p_n[58] = ~p[58]; + assign g[58] = a[58] & b[58]; + assign h_n[58] = g[58] | p_n[58]; + + assign bruce_bin_sum[59] = (b_n[59] & a_n[59] & c[59+1]) | (b_n[59] & a[59] & c_n[59+1]) | (b[59] & a_n[59] & c_n[59+1]) | (b[59] & a[59] & c[59+1]); + assign p[59] = a[59] | b[59]; + assign p_n[59] = ~p[59]; + assign g[59] = a[59] & b[59]; + assign h_n[59] = g[59] | p_n[59]; + + assign bruce_bin_sum[60] = (b_n[60] & a_n[60] & c[60+1]) | (b_n[60] & a[60] & c_n[60+1]) | (b[60] & a_n[60] & c_n[60+1]) | (b[60] & a[60] & c[60+1]); + assign p[60] = a[60] | b[60]; + assign p_n[60] = ~p[60]; + assign g[60] = a[60] & b[60]; + assign h_n[60] = g[60] | p_n[60]; + + assign bruce_bin_sum[61] = (b_n[61] & a_n[61] & c[61+1]) | (b_n[61] & a[61] & c_n[61+1]) | (b[61] & a_n[61] & c_n[61+1]) | (b[61] & a[61] & c[61+1]); + assign p[61] = a[61] | b[61]; + assign p_n[61] = ~p[61]; + assign g[61] = a[61] & b[61]; + assign h_n[61] = g[61] | p_n[61]; + + assign bruce_bin_sum[62] = (b_n[62] & a_n[62] & c[62+1]) | (b_n[62] & a[62] & c_n[62+1]) | (b[62] & a_n[62] & c_n[62+1]) | (b[62] & a[62] & c[62+1]); + assign p[62] = a[62] | b[62]; + assign p_n[62] = ~p[62]; + assign g[62] = a[62] & b[62]; + assign h_n[62] = g[62] | p_n[62]; + + assign bruce_bin_sum[63] = (b_n[63] & a_n[63] & c[63+1]) | (b_n[63] & a[63] & c_n[63+1]) | (b[63] & a_n[63] & c_n[63+1]) | (b[63] & a[63] & c[63+1]); + assign p[63] = a[63] | b[63]; + assign p_n[63] = ~p[63]; + assign g[63] = a[63] & b[63]; + assign h_n[63] = g[63] | p_n[63]; + + assign bin_sum[0:63] = (alu_cmd[0:3] == 4'b0010) ? bruce_bin_sum[0:63] + 2'b01 : bruce_bin_sum[0:63]; + + assign d[0] = h_n[0] ^ p[0+1]; + assign d[1] = h_n[1] ^ p[1+1]; + assign d[2] = h_n[2] ^ p[2+1]; + assign d[3] = h_n[3] ^ p[3+1]; + assign d[4] = h_n[4] ^ p[4+1]; + assign d[5] = h_n[5] ^ p[5+1]; + assign d[6] = h_n[6] ^ p[6+1]; + assign d[7] = h_n[7] ^ p[7+1]; + assign d[8] = h_n[8] ^ p[8+1]; + assign d[9] = h_n[9] ^ p[9+1]; + assign d[10] = h_n[10] ^ p[10+1]; + assign d[11] = h_n[11] ^ p[11+1]; + assign d[12] = h_n[12] ^ p[12+1]; + assign d[13] = h_n[13] ^ p[13+1]; + assign d[14] = h_n[14] ^ p[14+1]; + assign d[15] = h_n[15] ^ p[15+1]; + assign d[16] = h_n[16] ^ p[16+1]; + assign d[17] = h_n[17] ^ p[17+1]; + assign d[18] = h_n[18] ^ p[18+1]; + assign d[19] = h_n[19] ^ p[19+1]; + assign d[20] = h_n[20] ^ p[20+1]; + assign d[21] = h_n[21] ^ p[21+1]; + assign d[22] = h_n[22] ^ p[22+1]; + assign d[23] = h_n[23] ^ p[23+1]; + assign d[24] = h_n[24] ^ p[24+1]; + assign d[25] = h_n[25] ^ p[25+1]; + assign d[26] = h_n[26] ^ p[26+1]; + assign d[27] = h_n[27] ^ p[27+1]; + assign d[28] = h_n[28] ^ p[28+1]; + assign d[29] = h_n[29] ^ p[29+1]; + assign d[30] = h_n[30] ^ p[30+1]; + assign d[31] = h_n[31] ^ p[31+1]; + assign d[32] = h_n[32] ^ p[32+1]; + assign d[33] = h_n[33] ^ p[33+1]; + assign d[34] = h_n[34] ^ p[34+1]; + assign d[35] = h_n[35] ^ p[35+1]; + assign d[36] = h_n[36] ^ p[36+1]; + assign d[37] = h_n[37] ^ p[37+1]; + assign d[38] = h_n[38] ^ p[38+1]; + assign d[39] = h_n[39] ^ p[39+1]; + assign d[40] = h_n[40] ^ p[40+1]; + assign d[41] = h_n[41] ^ p[41+1]; + assign d[42] = h_n[42] ^ p[42+1]; + assign d[43] = h_n[43] ^ p[43+1]; + assign d[44] = h_n[44] ^ p[44+1]; + assign d[45] = h_n[45] ^ p[45+1]; + assign d[46] = h_n[46] ^ p[46+1]; + assign d[47] = h_n[47] ^ p[47+1]; + assign d[48] = h_n[48] ^ p[48+1]; + assign d[49] = h_n[49] ^ p[49+1]; + assign d[50] = h_n[50] ^ p[50+1]; + assign d[51] = h_n[51] ^ p[51+1]; + assign d[52] = h_n[52] ^ p[52+1]; + assign d[53] = h_n[53] ^ p[53+1]; + assign d[54] = h_n[54] ^ p[54+1]; + assign d[55] = h_n[55] ^ p[55+1]; + assign d[56] = h_n[56] ^ p[56+1]; + assign d[57] = h_n[57] ^ p[57+1]; + assign d[58] = h_n[58] ^ p[58+1]; + assign d[59] = h_n[59] ^ p[59+1]; + assign d[60] = h_n[60] ^ p[60+1]; + assign d[61] = h_n[61] ^ p[61+1]; + assign d[62] = h_n[62] ^ p[62+1]; + + assign d[63] = h_n[63] ^ bin_sub_q; + + assign d8[0] = d[8*0] & d[8*0+1] & d[8*0+2] & d[8*0+3] & d[8*0+4] & d[8*0+5] & d[8*0+6] & d[8*0+7]; + assign d8[1] = d[8*1] & d[8*1+1] & d[8*1+2] & d[8*1+3] & d[8*1+4] & d[8*1+5] & d[8*1+6] & d[8*1+7]; + assign d8[2] = d[8*2] & d[8*2+1] & d[8*2+2] & d[8*2+3] & d[8*2+4] & d[8*2+5] & d[8*2+6] & d[8*2+7]; + assign d8[3] = d[8*3] & d[8*3+1] & d[8*3+2] & d[8*3+3] & d[8*3+4] & d[8*3+5] & d[8*3+6] & d[8*3+7]; + assign d8[4] = d[8*4] & d[8*4+1] & d[8*4+2] & d[8*4+3] & d[8*4+4] & d[8*4+5] & d[8*4+6] & d[8*4+7]; + assign d8[5] = d[8*5] & d[8*5+1] & d[8*5+2] & d[8*5+3] & d[8*5+4] & d[8*5+5] & d[8*5+6] & d[8*5+7]; + assign d8[6] = d[8*6] & d[8*6+1] & d[8*6+2] & d[8*6+3] & d[8*6+4] & d[8*6+5] & d[8*6+6] & d[8*6+7]; + assign d8[7] = d[8*7] & d[8*7+1] & d[8*7+2] & d[8*7+3] & d[8*7+4] & d[8*7+5] & d[8*7+6] & d[8*7+7]; + + assign ds = d[33] & d[34] & d[35] & d[36] & d[37] & d[38] & d[39]; + + assign bin_sum_0_63_z = d8[0] & d8[1] & d8[2] & d8[3] & d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_32_63_z = d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_33_63_z = ds & d8[5] & d8[6] & d8[7]; + + assign G2[0] = g[2*0] | (p[2*0] & g[2*0+1]); + assign P2[0] = p[2*0] & p[2*0+1]; + assign G2[1] = g[2*1] | (p[2*1] & g[2*1+1]); + assign P2[1] = p[2*1] & p[2*1+1]; + assign G2[2] = g[2*2] | (p[2*2] & g[2*2+1]); + assign P2[2] = p[2*2] & p[2*2+1]; + assign G2[3] = g[2*3] | (p[2*3] & g[2*3+1]); + assign P2[3] = p[2*3] & p[2*3+1]; + assign G2[4] = g[2*4] | (p[2*4] & g[2*4+1]); + assign P2[4] = p[2*4] & p[2*4+1]; + assign G2[5] = g[2*5] | (p[2*5] & g[2*5+1]); + assign P2[5] = p[2*5] & p[2*5+1]; + assign G2[6] = g[2*6] | (p[2*6] & g[2*6+1]); + assign P2[6] = p[2*6] & p[2*6+1]; + assign G2[7] = g[2*7] | (p[2*7] & g[2*7+1]); + assign P2[7] = p[2*7] & p[2*7+1]; + assign G2[8] = g[2*8] | (p[2*8] & g[2*8+1]); + assign P2[8] = p[2*8] & p[2*8+1]; + assign G2[9] = g[2*9] | (p[2*9] & g[2*9+1]); + assign P2[9] = p[2*9] & p[2*9+1]; + assign G2[10] = g[2*10] | (p[2*10] & g[2*10+1]); + assign P2[10] = p[2*10] & p[2*10+1]; + assign G2[11] = g[2*11] | (p[2*11] & g[2*11+1]); + assign P2[11] = p[2*11] & p[2*11+1]; + assign G2[12] = g[2*12] | (p[2*12] & g[2*12+1]); + assign P2[12] = p[2*12] & p[2*12+1]; + assign G2[13] = g[2*13] | (p[2*13] & g[2*13+1]); + assign P2[13] = p[2*13] & p[2*13+1]; + assign G2[14] = g[2*14] | (p[2*14] & g[2*14+1]); + assign P2[14] = p[2*14] & p[2*14+1]; + assign G2[15] = g[2*15] | (p[2*15] & g[2*15+1]); + assign P2[15] = p[2*15] & p[2*15+1]; + assign G2[16] = g[2*16] | (p[2*16] & g[2*16+1]); + assign P2[16] = p[2*16] & p[2*16+1]; + assign G2[17] = g[2*17] | (p[2*17] & g[2*17+1]); + assign P2[17] = p[2*17] & p[2*17+1]; + assign G2[18] = g[2*18] | (p[2*18] & g[2*18+1]); + assign P2[18] = p[2*18] & p[2*18+1]; + assign G2[19] = g[2*19] | (p[2*19] & g[2*19+1]); + assign P2[19] = p[2*19] & p[2*19+1]; + assign G2[20] = g[2*20] | (p[2*20] & g[2*20+1]); + assign P2[20] = p[2*20] & p[2*20+1]; + assign G2[21] = g[2*21] | (p[2*21] & g[2*21+1]); + assign P2[21] = p[2*21] & p[2*21+1]; + assign G2[22] = g[2*22] | (p[2*22] & g[2*22+1]); + assign P2[22] = p[2*22] & p[2*22+1]; + assign G2[23] = g[2*23] | (p[2*23] & g[2*23+1]); + assign P2[23] = p[2*23] & p[2*23+1]; + assign G2[24] = g[2*24] | (p[2*24] & g[2*24+1]); + assign P2[24] = p[2*24] & p[2*24+1]; + assign G2[25] = g[2*25] | (p[2*25] & g[2*25+1]); + assign P2[25] = p[2*25] & p[2*25+1]; + assign G2[26] = g[2*26] | (p[2*26] & g[2*26+1]); + assign P2[26] = p[2*26] & p[2*26+1]; + assign G2[27] = g[2*27] | (p[2*27] & g[2*27+1]); + assign P2[27] = p[2*27] & p[2*27+1]; + assign G2[28] = g[2*28] | (p[2*28] & g[2*28+1]); + assign P2[28] = p[2*28] & p[2*28+1]; + assign G2[29] = g[2*29] | (p[2*29] & g[2*29+1]); + assign P2[29] = p[2*29] & p[2*29+1]; + assign G2[30] = g[2*30] | (p[2*30] & g[2*30+1]); + assign P2[30] = p[2*30] & p[2*30+1]; + assign G2[31] = g[2*31] | (p[2*31] & g[2*31+1]); + assign P2[31] = p[2*31] & p[2*31+1]; + + assign Gn[0] = G2[2*0] | (P2[2*0] & G2[2*0+1]); + assign Pn[0] = P2[2*0] & P2[2*0+1]; + + assign Gn[1] = G2[2*1] | (P2[2*1] & G2[2*1+1]); + assign Pn[1] = P2[2*1] & P2[2*1+1]; + + assign Gn[2] = G2[2*2] | (P2[2*2] & G2[2*2+1]); + assign Pn[2] = P2[2*2] & P2[2*2+1]; + + assign Gn[3] = G2[2*3] | (P2[2*3] & G2[2*3+1]); + assign Pn[3] = P2[2*3] & P2[2*3+1]; + + assign Gn[4] = G2[2*4] | (P2[2*4] & G2[2*4+1]); + assign Pn[4] = P2[2*4] & P2[2*4+1]; + + assign Gn[5] = G2[2*5] | (P2[2*5] & G2[2*5+1]); + assign Pn[5] = P2[2*5] & P2[2*5+1]; + + assign Gn[6] = G2[2*6] | (P2[2*6] & G2[2*6+1]); + assign Pn[6] = P2[2*6] & P2[2*6+1]; + + assign Gn[7] = G2[2*7] | (P2[2*7] & G2[2*7+1]); + assign Pn[7] = P2[2*7] & P2[2*7+1]; + + assign Gn[8] = G2[2*8] | (P2[2*8] & G2[2*8+1]); + assign Pn[8] = P2[2*8] & P2[2*8+1]; + + assign Gn[9] = G2[2*9] | (P2[2*9] & G2[2*9+1]); + assign Pn[9] = P2[2*9] & P2[2*9+1]; + + assign Gn[10] = G2[2*10] | (P2[2*10] & G2[2*10+1]); + assign Pn[10] = P2[2*10] & P2[2*10+1]; + + assign Gn[11] = G2[2*11] | (P2[2*11] & G2[2*11+1]); + assign Pn[11] = P2[2*11] & P2[2*11+1]; + + assign Gn[12] = G2[2*12] | (P2[2*12] & G2[2*12+1]); + assign Pn[12] = P2[2*12] & P2[2*12+1]; + + assign Gn[13] = G2[2*13] | (P2[2*13] & G2[2*13+1]); + assign Pn[13] = P2[2*13] & P2[2*13+1]; + + assign Gn[14] = G2[2*14] | (P2[2*14] & G2[2*14+1]); + assign Pn[14] = P2[2*14] & P2[2*14+1]; + + assign Gn[15] = G2[2*15] | (P2[2*15] & G2[2*15+1]); + assign Pn[15] = P2[2*15] & P2[2*15+1]; + + assign Gb[0] = Gn[2*0] | (Pn[2*0] & Gn[2*0+1]); + assign Pb[0] = Pn[2*0] & Pn[2*0+1]; + + assign Gb[1] = Gn[2*1] | (Pn[2*1] & Gn[2*1+1]); + assign Pb[1] = Pn[2*1] & Pn[2*1+1]; + + assign Gb[2] = Gn[2*2] | (Pn[2*2] & Gn[2*2+1]); + assign Pb[2] = Pn[2*2] & Pn[2*2+1]; + + assign Gb[3] = Gn[2*3] | (Pn[2*3] & Gn[2*3+1]); + assign Pb[3] = Pn[2*3] & Pn[2*3+1]; + + assign Gb[4] = Gn[2*4] | (Pn[2*4] & Gn[2*4+1]); + assign Pb[4] = Pn[2*4] & Pn[2*4+1]; + + assign Gb[5] = Gn[2*5] | (Pn[2*5] & Gn[2*5+1]); + assign Pb[5] = Pn[2*5] & Pn[2*5+1]; + + assign Gb[6] = Gn[2*6] | (Pn[2*6] & Gn[2*6+1]); + assign Pb[6] = Pn[2*6] & Pn[2*6+1]; + + assign Gb[7] = Gn[2*7] | (Pn[2*7] & Gn[2*7+1]); + assign Pb[7] = Pn[2*7] & Pn[2*7+1]; + + assign G2b[2] = Gb[2+1] | (Pb[2+1] & Gb[2+2]); + assign P2b[2] = Pb[2+1] & Pb[2+2]; + + assign G2b[3] = Gb[3+1] | (Pb[3+1] & Gb[3+2]); + assign P2b[3] = Pb[3+1] & Pb[3+2]; + + assign G2b[4] = Gb[4+1] | (Pb[4+1] & Gb[4+2]); + assign P2b[4] = Pb[4+1] & Pb[4+2]; + + assign G2b[5] = Gb[5+1] | (Pb[5+1] & Gb[5+2]); + assign P2b[5] = Pb[5+1] & Pb[5+2]; + + + assign G2b[0] = Gb[1] | (Pb[1] & Gb[2]); + assign P2b[0] = Pb[1] & Pb[2]; + assign G2b[1] = Gb[2] | (Pb[2] & Gb[3]); + assign P2b[1] = Pb[2] & Pb[3]; + + assign c[56] = Gb[7] | (Pb[7] & c[64]); + assign c[48] = G2b[5] | (P2b[5] & c[64]); + assign c[40] = G2b[4] | (P2b[4] & c[56]); + assign c[32] = G2b[3] | (P2b[3] & c[48]); + assign bin_c_32 = Gb[4] | (Pb[4] & c[40]); + assign c[24] = G2b[2] | (P2b[2] & c[40]); + assign c[16] = G2b[1] | (P2b[1] & c[24]); + assign c[8] = G2b[0] | (P2b[0] & c[24]); + assign c[0] = Gb[0] | (Pb[0] & c[8]); + + assign c[8*0+4] = Gn[2*0+1] | (Pn[2*0+1] & c[8*0+8]); + assign c[8*1+4] = Gn[2*1+1] | (Pn[2*1+1] & c[8*1+8]); + assign c[8*2+4] = Gn[2*2+1] | (Pn[2*2+1] & c[8*2+8]); + assign c[8*3+4] = Gn[2*3+1] | (Pn[2*3+1] & c[8*3+8]); + assign c[8*4+4] = Gn[2*4+1] | (Pn[2*4+1] & c[8*4+8]); + assign c[8*5+4] = Gn[2*5+1] | (Pn[2*5+1] & c[8*5+8]); + assign c[8*6+4] = Gn[2*6+1] | (Pn[2*6+1] & c[8*6+8]); + assign c[8*7+4] = Gn[2*7+1] | (Pn[2*7+1] & c[8*7+8]); + + assign c[4*0+2] = G2[2*0+1] | (P2[2*0+1] & c[4*0+4]); + assign c[4*1+2] = G2[2*1+1] | (P2[2*1+1] & c[4*1+4]); + assign c[4*2+2] = G2[2*2+1] | (P2[2*2+1] & c[4*2+4]); + assign c[4*3+2] = G2[2*3+1] | (P2[2*3+1] & c[4*3+4]); + assign c[4*4+2] = G2[2*4+1] | (P2[2*4+1] & c[4*4+4]); + assign c[4*5+2] = G2[2*5+1] | (P2[2*5+1] & c[4*5+4]); + assign c[4*6+2] = G2[2*6+1] | (P2[2*6+1] & c[4*6+4]); + assign c[4*7+2] = G2[2*7+1] | (P2[2*7+1] & c[4*7+4]); + assign c[4*8+2] = G2[2*8+1] | (P2[2*8+1] & c[4*8+4]); + assign c[4*9+2] = G2[2*9+1] | (P2[2*9+1] & c[4*9+4]); + assign c[4*10+2] = G2[2*10+1] | (P2[2*10+1] & c[4*10+4]); + assign c[4*11+2] = G2[2*11+1] | (P2[2*11+1] & c[4*11+4]); + assign c[4*12+2] = G2[2*12+1] | (P2[2*12+1] & c[4*12+4]); + assign c[4*13+2] = G2[2*13+1] | (P2[2*13+1] & c[4*13+4]); + assign c[4*14+2] = G2[2*14+1] | (P2[2*14+1] & c[4*14+4]); + assign c[4*15+2] = G2[2*15+1] | (P2[2*15+1] & c[4*15+4]); + + assign c[2*0+1] = g[2*0+1] | (p[2*0+1] & c[2*0+2]); + assign c[2*1+1] = g[2*1+1] | (p[2*1+1] & c[2*1+2]); + assign c[2*2+1] = g[2*2+1] | (p[2*2+1] & c[2*2+2]); + assign c[2*3+1] = g[2*3+1] | (p[2*3+1] & c[2*3+2]); + assign c[2*4+1] = g[2*4+1] | (p[2*4+1] & c[2*4+2]); + assign c[2*5+1] = g[2*5+1] | (p[2*5+1] & c[2*5+2]); + assign c[2*6+1] = g[2*6+1] | (p[2*6+1] & c[2*6+2]); + assign c[2*7+1] = g[2*7+1] | (p[2*7+1] & c[2*7+2]); + assign c[2*8+1] = g[2*8+1] | (p[2*8+1] & c[2*8+2]); + assign c[2*9+1] = g[2*9+1] | (p[2*9+1] & c[2*9+2]); + assign c[2*10+1] = g[2*10+1] | (p[2*10+1] & c[2*10+2]); + assign c[2*11+1] = g[2*11+1] | (p[2*11+1] & c[2*11+2]); + assign c[2*12+1] = g[2*12+1] | (p[2*12+1] & c[2*12+2]); + assign c[2*13+1] = g[2*13+1] | (p[2*13+1] & c[2*13+2]); + assign c[2*14+1] = g[2*14+1] | (p[2*14+1] & c[2*14+2]); + assign c[2*15+1] = g[2*15+1] | (p[2*15+1] & c[2*15+2]); + assign c[2*16+1] = g[2*16+1] | (p[2*16+1] & c[2*16+2]); + assign c[2*17+1] = g[2*17+1] | (p[2*17+1] & c[2*17+2]); + assign c[2*18+1] = g[2*18+1] | (p[2*18+1] & c[2*18+2]); + assign c[2*19+1] = g[2*19+1] | (p[2*19+1] & c[2*19+2]); + assign c[2*20+1] = g[2*20+1] | (p[2*20+1] & c[2*20+2]); + assign c[2*21+1] = g[2*21+1] | (p[2*21+1] & c[2*21+2]); + assign c[2*22+1] = g[2*22+1] | (p[2*22+1] & c[2*22+2]); + assign c[2*23+1] = g[2*23+1] | (p[2*23+1] & c[2*23+2]); + assign c[2*24+1] = g[2*24+1] | (p[2*24+1] & c[2*24+2]); + assign c[2*25+1] = g[2*25+1] | (p[2*25+1] & c[2*25+2]); + assign c[2*26+1] = g[2*26+1] | (p[2*26+1] & c[2*26+2]); + assign c[2*27+1] = g[2*27+1] | (p[2*27+1] & c[2*27+2]); + assign c[2*28+1] = g[2*28+1] | (p[2*28+1] & c[2*28+2]); + assign c[2*29+1] = g[2*29+1] | (p[2*29+1] & c[2*29+2]); + assign c[2*30+1] = g[2*30+1] | (p[2*30+1] & c[2*30+2]); + assign c[2*31+1] = g[2*31+1] | (p[2*31+1] & c[2*31+2]); + + assign c_n[0] = ~c[0]; + assign c_n[1] = ~c[1]; + assign c_n[2] = ~c[2]; + assign c_n[3] = ~c[3]; + assign c_n[4] = ~c[4]; + assign c_n[5] = ~c[5]; + assign c_n[6] = ~c[6]; + assign c_n[7] = ~c[7]; + assign c_n[8] = ~c[8]; + assign c_n[9] = ~c[9]; + assign c_n[10] = ~c[10]; + assign c_n[11] = ~c[11]; + assign c_n[12] = ~c[12]; + assign c_n[13] = ~c[13]; + assign c_n[14] = ~c[14]; + assign c_n[15] = ~c[15]; + assign c_n[16] = ~c[16]; + assign c_n[17] = ~c[17]; + assign c_n[18] = ~c[18]; + assign c_n[19] = ~c[19]; + assign c_n[20] = ~c[20]; + assign c_n[21] = ~c[21]; + assign c_n[22] = ~c[22]; + assign c_n[23] = ~c[23]; + assign c_n[24] = ~c[24]; + assign c_n[25] = ~c[25]; + assign c_n[26] = ~c[26]; + assign c_n[27] = ~c[27]; + assign c_n[28] = ~c[28]; + assign c_n[29] = ~c[29]; + assign c_n[30] = ~c[30]; + assign c_n[31] = ~c[31]; + assign c_n[32] = ~c[32]; + assign c_n[33] = ~c[33]; + assign c_n[34] = ~c[34]; + assign c_n[35] = ~c[35]; + assign c_n[36] = ~c[36]; + assign c_n[37] = ~c[37]; + assign c_n[38] = ~c[38]; + assign c_n[39] = ~c[39]; + assign c_n[40] = ~c[40]; + assign c_n[41] = ~c[41]; + assign c_n[42] = ~c[42]; + assign c_n[43] = ~c[43]; + assign c_n[44] = ~c[44]; + assign c_n[45] = ~c[45]; + assign c_n[46] = ~c[46]; + assign c_n[47] = ~c[47]; + assign c_n[48] = ~c[48]; + assign c_n[49] = ~c[49]; + assign c_n[50] = ~c[50]; + assign c_n[51] = ~c[51]; + assign c_n[52] = ~c[52]; + assign c_n[53] = ~c[53]; + assign c_n[54] = ~c[54]; + assign c_n[55] = ~c[55]; + assign c_n[56] = ~c[56]; + assign c_n[57] = ~c[57]; + assign c_n[58] = ~c[58]; + assign c_n[59] = ~c[59]; + assign c_n[60] = ~c[60]; + assign c_n[61] = ~c[61]; + assign c_n[62] = ~c[62]; + assign c_n[63] = ~c[63]; + + assign bin_c_0 = c[0]; + assign bin_ovfl = (c[32] & c_n[33]) | (c_n[32] & c[33]); + +endmodule // exdbin_mac + + + diff --git a/code/vezba6_7/dut/holdreg.v b/code/vezba6_7/dut/holdreg.v new file mode 100644 index 0000000..e49f552 --- /dev/null +++ b/code/vezba6_7/dut/holdreg.v @@ -0,0 +1,56 @@ +// Library: calc1 +// Module: Hold Register +// Author: Naseer Siddique + + module holdreg(hold_data1, hold_data2, hold_prio_req, c_clk, req_cmd_in, req_data_in, reset); + + input c_clk; + input [0:3] req_cmd_in; + input [1:7] reset; + input [0:31] req_data_in; + + output [0:3] hold_prio_req; + output [0:31] hold_data1, hold_data2; + + + reg [0:3] cmd_hold, hold_prio_reg; + wire [0:3] cmd_hold_q; + reg [0:31] hold_data1_q, hold_data2_q; + + always + @ (posedge c_clk) begin + fork + + cmd_hold[0:3] <= (reset[1] == 1) ? 4'b0 : req_cmd_in[0:3]; + hold_prio_reg[0:3] <= cmd_hold[0:3]; + + join + + end + + + always + @ (posedge c_clk) begin + fork + hold_data1_q[0:31] <= + (reset[1]) ? 32'b0 : + (req_cmd_in[0:3] != 4'b0) ? req_data_in[0:31] : + hold_data1_q[0:31]; + + hold_data2_q[0:31] <= + (reset[1]) ? 32'b0 : (cmd_hold[0:3] != 4'b0) ? + req_data_in[0:31] : hold_data2_q[0:31]; + join + + end + + + assign hold_data1 = hold_data1_q; + assign hold_data2 = hold_data2_q; + assign hold_prio_req = hold_prio_reg; + +endmodule // holdreg + + + + diff --git a/code/vezba6_7/dut/mux_out.v b/code/vezba6_7/dut/mux_out.v new file mode 100644 index 0000000..41e732d --- /dev/null +++ b/code/vezba6_7/dut/mux_out.v @@ -0,0 +1,27 @@ +// Library: calc1 +// Module: Output Mux +// Author: Naseer Siddique + +module mux_out(req_data, req_resp, req_data1, req_data2, req_resp1, req_resp2); + + output [0:31] req_data; + output [0:1] req_resp; + + input [0:31] req_data1, req_data2; + input [0:1] req_resp1, req_resp2; + + assign req_resp[0:1] = + (req_resp1[0:1] != 2'b00) ? req_resp1 : + ( req_resp2[0:1] != 2'b00 ) ? req_resp2 : + 2'b00; + + assign req_data[0:31] = + ( req_resp1[0:1] != 2'b00 ) ? req_data1 : + ( req_resp2[0:1] != 2'b00 ) ? req_data2 : + 32'b0; + + + +endmodule // mux_out + + diff --git a/code/vezba6_7/dut/priority.v b/code/vezba6_7/dut/priority.v new file mode 100644 index 0000000..7e020ab --- /dev/null +++ b/code/vezba6_7/dut/priority.v @@ -0,0 +1,155 @@ +// Library: calc1 +// Priority Logic +// Author: Naseer Siddique +module priority1 ( prio_alu1_in_cmd, prio_alu1_in_req_id, prio_alu1_out_req_id, prio_alu1_out_vld, prio_alu2_in_cmd, prio_alu2_in_req_id, prio_alu2_out_req_id, prio_alu2_out_vld, c_clk, hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req, local_error_found, reset); + + + output [0:3] prio_alu1_in_cmd, prio_alu2_in_cmd; + output [0:1] prio_alu1_out_req_id, prio_alu1_in_req_id, prio_alu2_in_req_id, prio_alu2_out_req_id; + output prio_alu1_out_vld, prio_alu2_out_vld; + + input c_clk, local_error_found; + input [0:3] hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req; + input [1:7] reset; + + reg [0:3] cmd1, cmd2, cmd3, cmd4; + reg delay1, delay2; + + wire cmd1_reset, cmd2_reset, cmd3_reset, cmd4_reset; + + reg [0:1] prio_req1_id_q, prio_req2_id_q; + + reg prio_alu1_out_vld_q, prio_alu2_out_vld_q; + + always + @ (posedge c_clk) begin + if (reset[1]) begin + cmd1 <= 0; + cmd2 <= 0; + cmd3 <= 0; + cmd4 <= 0; + end + else begin + fork + delay1 <= prio_alu1_out_vld_q; + delay2 <= prio_alu2_out_vld_q; + + cmd1[0:3] <= + (hold1_prio_req[0:3] != 4'b0) ? hold1_prio_req[0:3] : + (cmd1_reset) ? 4'b0 : + cmd1[0:3]; + + cmd2[0:3] <= + (hold2_prio_req[0:3] != 4'b0) ? hold2_prio_req[0:3] : + (cmd2_reset) ? 4'b0 : + cmd2[0:3]; + + cmd3[0:3] <= + (hold3_prio_req[0:3] != 4'b0) ? hold3_prio_req[0:3] : + (cmd3_reset) ? 4'b0 : + cmd3[0:3]; + + cmd4[0:3] <= + (hold4_prio_req[0:3] != 4'b0) ? hold4_prio_req[0:3] : + (cmd4_reset) ? 4'b0 : + cmd4[0:3]; + join + end + + + end // always @ (posedge c_clk) + + always + @ (delay1 or delay2 or cmd1 or cmd2 or cmd3 or cmd4) begin + + if (delay1) + prio_alu1_out_vld_q <= 1'b0; + else if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) && local_error_found ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b0; + else prio_alu1_out_vld_q <= 1'b0; + + if (delay2) + prio_alu2_out_vld_q <= 1'b0; + else if (cmd1 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd2 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd3 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd4 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else prio_alu2_out_vld_q <= 1'b0; + + if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b00; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b01; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b10; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b11; + else prio_req1_id_q[0:1] <= 2'b00; + + if ( cmd1 > 4'b0011 ) + prio_req2_id_q <= 2'b00; + else if ( cmd2 > 4'b0011 ) + prio_req2_id_q <= 2'b01; + else if ( cmd3 > 4'b0011 ) + prio_req2_id_q <= 2'b10; + else if ( cmd4 > 4'b0011 ) + prio_req2_id_q <= 2'b11; + else prio_req2_id_q <= 2'b00; + + end // always @ (delay1 or or delay2 or cmd1 or cmd2 or cmd3 or cmd4) + + assign prio_alu1_in_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_in_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_out_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_vld = prio_alu1_out_vld_q; + assign prio_alu2_out_vld = prio_alu2_out_vld_q; + + assign prio_alu1_in_cmd[0:3] = + (prio_req1_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req1_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req1_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req1_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + assign prio_alu2_in_cmd[0:3] = + (prio_req2_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req2_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req2_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req2_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + + assign cmd1_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b00) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b00) ) ? 1 : + 0; + + assign cmd2_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b01) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b01) ) ? 1 : + 0; + + assign cmd3_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b10) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b10) ) ? 1 : + 0; + + assign cmd4_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b11) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b11) ) ? 1 : + 0; + +endmodule // priority diff --git a/code/vezba6_7/dut/shifter.v b/code/vezba6_7/dut/shifter.v new file mode 100644 index 0000000..a2d9b47 --- /dev/null +++ b/code/vezba6_7/dut/shifter.v @@ -0,0 +1,2310 @@ +// Library: calc1 +// Module: 32-bit shifter +// Author: Naseer Siddique + +module shifter ( bin_ovfl, shift_out, shift_cmd, shift_places, local_error_found, shift_val); + + output bin_ovfl; + output [0:63] shift_out; + + input [0:3] shift_cmd; + input [0:63] shift_places, shift_val; + input local_error_found; + + wire [0:4] pos; + + + wire [0:63] shiftleft, shiftright, tempshiftl; + + wire bin_ovfl; + wire [0:63] shift_out; + + assign pos[0:4] = shift_places[59:63]; + + assign tempshiftl[0:31] = shift_val[32:63]; + assign tempshiftl[32:63] = 32'b0; + + assign shiftleft[0] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[0] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[0+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[0+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[0+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[0+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[0+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[0+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[0+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[0+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[0+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[0+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[0+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[0+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[0+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[0+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[0+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[0+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[0+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[0+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[0+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[0+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[0+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[0+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[0+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[0+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[0+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[0+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[0+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[0+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[0+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[0+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[0+31] : + 0; + + assign shiftleft[1] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[1] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[1+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[1+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[1+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[1+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[1+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[1+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[1+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[1+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[1+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[1+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[1+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[1+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[1+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[1+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[1+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[1+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[1+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[1+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[1+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[1+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[1+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[1+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[1+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[1+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[1+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[1+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[1+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[1+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[1+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[1+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[1+31] : + 0; + + assign shiftleft[2] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[2] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[2+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[2+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[2+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[2+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[2+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[2+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[2+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[2+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[2+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[2+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[2+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[2+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[2+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[2+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[2+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[2+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[2+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[2+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[2+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[2+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[2+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[2+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[2+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[2+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[2+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[2+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[2+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[2+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[2+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[2+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[2+31] : + 0; + + assign shiftleft[3] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[3] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[3+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[3+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[3+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[3+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[3+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[3+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[3+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[3+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[3+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[3+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[3+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[3+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[3+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[3+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[3+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[3+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[3+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[3+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[3+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[3+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[3+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[3+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[3+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[3+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[3+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[3+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[3+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[3+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[3+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[3+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[3+31] : + 0; + + assign shiftleft[4] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[4] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[4+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[4+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[4+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[4+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[4+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[4+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[4+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[4+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[4+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[4+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[4+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[4+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[4+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[4+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[4+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[4+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[4+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[4+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[4+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[4+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[4+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[4+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[4+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[4+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[4+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[4+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[4+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[4+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[4+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[4+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[4+31] : + 0; + + assign shiftleft[5] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[5] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[5+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[5+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[5+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[5+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[5+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[5+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[5+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[5+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[5+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[5+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[5+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[5+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[5+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[5+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[5+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[5+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[5+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[5+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[5+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[5+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[5+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[5+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[5+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[5+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[5+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[5+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[5+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[5+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[5+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[5+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[5+31] : + 0; + + assign shiftleft[6] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[6] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[6+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[6+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[6+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[6+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[6+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[6+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[6+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[6+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[6+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[6+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[6+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[6+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[6+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[6+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[6+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[6+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[6+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[6+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[6+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[6+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[6+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[6+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[6+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[6+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[6+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[6+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[6+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[6+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[6+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[6+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[6+31] : + 0; + + assign shiftleft[7] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[7] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[7+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[7+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[7+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[7+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[7+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[7+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[7+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[7+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[7+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[7+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[7+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[7+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[7+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[7+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[7+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[7+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[7+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[7+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[7+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[7+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[7+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[7+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[7+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[7+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[7+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[7+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[7+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[7+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[7+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[7+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[7+31] : + 0; + + assign shiftleft[8] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[8] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[8+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[8+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[8+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[8+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[8+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[8+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[8+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[8+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[8+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[8+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[8+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[8+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[8+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[8+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[8+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[8+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[8+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[8+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[8+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[8+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[8+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[8+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[8+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[8+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[8+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[8+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[8+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[8+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[8+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[8+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[8+31] : + 0; + + assign shiftleft[9] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[9] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[9+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[9+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[9+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[9+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[9+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[9+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[9+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[9+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[9+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[9+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[9+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[9+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[9+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[9+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[9+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[9+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[9+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[9+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[9+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[9+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[9+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[9+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[9+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[9+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[9+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[9+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[9+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[9+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[9+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[9+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[9+31] : + 0; + + assign shiftleft[10] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[10] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[10+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[10+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[10+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[10+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[10+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[10+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[10+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[10+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[10+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[10+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[10+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[10+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[10+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[10+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[10+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[10+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[10+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[10+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[10+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[10+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[10+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[10+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[10+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[10+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[10+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[10+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[10+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[10+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[10+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[10+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[10+31] : + 0; + + assign shiftleft[11] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[11] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[11+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[11+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[11+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[11+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[11+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[11+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[11+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[11+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[11+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[11+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[11+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[11+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[11+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[11+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[11+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[11+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[11+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[11+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[11+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[11+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[11+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[11+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[11+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[11+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[11+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[11+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[11+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[11+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[11+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[11+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[11+31] : + 0; + + assign shiftleft[12] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[12] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[12+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[12+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[12+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[12+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[12+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[12+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[12+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[12+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[12+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[12+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[12+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[12+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[12+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[12+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[12+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[12+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[12+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[12+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[12+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[12+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[12+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[12+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[12+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[12+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[12+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[12+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[12+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[12+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[12+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[12+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[12+31] : + 0; + + assign shiftleft[13] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[13] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[13+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[13+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[13+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[13+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[13+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[13+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[13+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[13+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[13+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[13+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[13+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[13+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[13+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[13+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[13+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[13+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[13+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[13+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[13+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[13+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[13+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[13+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[13+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[13+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[13+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[13+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[13+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[13+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[13+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[13+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[13+31] : + 0; + + assign shiftleft[14] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[14] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[14+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[14+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[14+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[14+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[14+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[14+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[14+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[14+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[14+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[14+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[14+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[14+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[14+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[14+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[14+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[14+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[14+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[14+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[14+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[14+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[14+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[14+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[14+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[14+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[14+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[14+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[14+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[14+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[14+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[14+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[14+31] : + 0; + + assign shiftleft[15] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[15] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[15+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[15+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[15+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[15+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[15+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[15+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[15+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[15+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[15+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[15+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[15+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[15+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[15+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[15+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[15+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[15+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[15+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[15+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[15+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[15+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[15+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[15+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[15+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[15+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[15+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[15+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[15+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[15+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[15+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[15+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[15+31] : + 0; + + assign shiftleft[16] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[16] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[16+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[16+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[16+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[16+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[16+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[16+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[16+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[16+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[16+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[16+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[16+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[16+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[16+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[16+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[16+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[16+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[16+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[16+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[16+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[16+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[16+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[16+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[16+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[16+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[16+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[16+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[16+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[16+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[16+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[16+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[16+31] : + 0; + + assign shiftleft[17] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[17] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[17+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[17+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[17+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[17+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[17+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[17+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[17+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[17+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[17+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[17+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[17+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[17+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[17+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[17+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[17+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[17+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[17+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[17+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[17+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[17+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[17+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[17+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[17+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[17+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[17+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[17+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[17+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[17+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[17+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[17+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[17+31] : + 0; + + assign shiftleft[18] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[18] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[18+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[18+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[18+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[18+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[18+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[18+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[18+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[18+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[18+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[18+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[18+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[18+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[18+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[18+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[18+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[18+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[18+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[18+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[18+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[18+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[18+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[18+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[18+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[18+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[18+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[18+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[18+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[18+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[18+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[18+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[18+31] : + 0; + + assign shiftleft[19] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[19] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[19+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[19+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[19+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[19+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[19+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[19+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[19+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[19+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[19+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[19+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[19+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[19+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[19+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[19+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[19+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[19+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[19+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[19+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[19+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[19+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[19+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[19+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[19+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[19+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[19+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[19+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[19+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[19+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[19+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[19+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[19+31] : + 0; + + assign shiftleft[20] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[20] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[20+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[20+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[20+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[20+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[20+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[20+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[20+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[20+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[20+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[20+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[20+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[20+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[20+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[20+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[20+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[20+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[20+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[20+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[20+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[20+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[20+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[20+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[20+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[20+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[20+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[20+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[20+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[20+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[20+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[20+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[20+31] : + 0; + + assign shiftleft[21] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[21] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[21+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[21+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[21+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[21+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[21+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[21+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[21+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[21+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[21+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[21+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[21+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[21+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[21+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[21+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[21+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[21+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[21+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[21+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[21+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[21+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[21+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[21+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[21+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[21+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[21+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[21+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[21+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[21+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[21+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[21+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[21+31] : + 0; + + assign shiftleft[22] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[22] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[22+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[22+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[22+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[22+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[22+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[22+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[22+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[22+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[22+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[22+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[22+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[22+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[22+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[22+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[22+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[22+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[22+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[22+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[22+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[22+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[22+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[22+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[22+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[22+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[22+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[22+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[22+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[22+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[22+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[22+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[22+31] : + 0; + + assign shiftleft[23] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[23] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[23+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[23+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[23+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[23+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[23+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[23+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[23+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[23+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[23+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[23+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[23+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[23+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[23+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[23+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[23+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[23+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[23+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[23+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[23+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[23+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[23+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[23+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[23+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[23+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[23+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[23+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[23+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[23+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[23+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[23+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[23+31] : + 0; + assign shiftleft[24] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[24] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[24+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[24+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[24+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[24+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[24+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[24+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[24+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[24+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[24+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[24+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[24+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[24+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[24+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[24+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[24+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[24+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[24+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[24+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[24+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[24+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[24+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[24+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[24+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[24+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[24+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[24+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[24+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[24+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[24+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[24+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[24+31] : + 0; + + assign shiftleft[25] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[25] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[25+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[25+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[25+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[25+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[25+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[25+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[25+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[25+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[25+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[25+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[25+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[25+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[25+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[25+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[25+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[25+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[25+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[25+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[25+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[25+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[25+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[25+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[25+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[25+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[25+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[25+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[25+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[25+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[25+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[25+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[25+31] : + 0; + + assign shiftleft[26] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[26] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[26+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[26+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[26+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[26+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[26+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[26+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[26+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[26+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[26+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[26+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[26+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[26+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[26+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[26+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[26+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[26+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[26+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[26+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[26+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[26+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[26+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[26+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[26+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[26+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[26+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[26+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[26+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[26+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[26+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[26+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[26+31] : + 0; + + assign shiftleft[27] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[27] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[27+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[27+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[27+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[27+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[27+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[27+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[27+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[27+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[27+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[27+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[27+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[27+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[27+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[27+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[27+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[27+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[27+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[27+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[27+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[27+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[27+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[27+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[27+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[27+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[27+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[27+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[27+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[27+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[27+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[27+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[27+31] : + 0; + + assign shiftleft[28] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[28] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[28+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[28+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[28+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[28+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[28+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[28+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[28+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[28+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[28+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[28+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[28+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[28+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[28+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[28+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[28+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[28+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[28+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[28+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[28+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[28+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[28+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[28+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[28+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[28+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[28+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[28+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[28+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[28+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[28+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[28+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[28+31] : + 0; + + assign shiftleft[29] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[29] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[29+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[29+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[29+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[29+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[29+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[29+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[29+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[29+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[29+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[29+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[29+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[29+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[29+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[29+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[29+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[29+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[29+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[29+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[29+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[29+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[29+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[29+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[29+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[29+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[29+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[29+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[29+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[29+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[29+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[29+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[29+31] : + 0; + + assign shiftleft[30] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[30] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[30+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[30+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[30+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[30+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[30+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[30+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[30+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[30+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[30+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[30+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[30+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[30+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[30+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[30+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[30+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[30+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[30+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[30+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[30+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[30+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[30+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[30+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[30+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[30+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[30+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[30+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[30+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[30+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[30+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[30+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[30+31] : + 0; + + assign shiftleft[31] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[31] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[31+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[31+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[31+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[31+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[31+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[31+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[31+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[31+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[31+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[31+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[31+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[31+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[31+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[31+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[31+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[31+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[31+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[31+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[31+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[31+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[31+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[31+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[31+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[31+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[31+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[31+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[31+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[31+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[31+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[31+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[31+31] : + 0; + + assign shiftright[32] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[32] : + ( pos[0:4] == 5'b00001 ) ? shift_val[32-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[32-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[32-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[32-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[32-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[32-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[32-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[32-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[32-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[32-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[32-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[32-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[32-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[32-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[32-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[32-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[32-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[32-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[32-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[32-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[32-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[32-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[32-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[32-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[32-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[32-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[32-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[32-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[32-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[32-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[32-31] : + 0; + + assign shiftright[33] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[33] : + ( pos[0:4] == 5'b00001 ) ? shift_val[33-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[33-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[33-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[33-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[33-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[33-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[33-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[33-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[33-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[33-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[33-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[33-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[33-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[33-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[33-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[33-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[33-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[33-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[33-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[33-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[33-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[33-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[33-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[33-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[33-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[33-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[33-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[33-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[33-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[33-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[33-31] : + 0; + + assign shiftright[34] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[34] : + ( pos[0:4] == 5'b00001 ) ? shift_val[34-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[34-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[34-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[34-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[34-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[34-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[34-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[34-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[34-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[34-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[34-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[34-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[34-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[34-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[34-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[34-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[34-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[34-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[34-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[34-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[34-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[34-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[34-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[34-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[34-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[34-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[34-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[34-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[34-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[34-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[34-31] : + 0; + + assign shiftright[35] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[35] : + ( pos[0:4] == 5'b00001 ) ? shift_val[35-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[35-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[35-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[35-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[35-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[35-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[35-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[35-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[35-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[35-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[35-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[35-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[35-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[35-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[35-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[35-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[35-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[35-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[35-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[35-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[35-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[35-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[35-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[35-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[35-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[35-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[35-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[35-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[35-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[35-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[35-31] : + 0; + + assign shiftright[36] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[36] : + ( pos[0:4] == 5'b00001 ) ? shift_val[36-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[36-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[36-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[36-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[36-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[36-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[36-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[36-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[36-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[36-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[36-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[36-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[36-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[36-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[36-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[36-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[36-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[36-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[36-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[36-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[36-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[36-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[36-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[36-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[36-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[36-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[36-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[36-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[36-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[36-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[36-31] : + 0; + + assign shiftright[37] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[37] : + ( pos[0:4] == 5'b00001 ) ? shift_val[37-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[37-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[37-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[37-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[37-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[37-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[37-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[37-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[37-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[37-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[37-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[37-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[37-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[37-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[37-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[37-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[37-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[37-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[37-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[37-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[37-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[37-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[37-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[37-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[37-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[37-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[37-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[37-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[37-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[37-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[37-31] : + 0; + + assign shiftright[38] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[38] : + ( pos[0:4] == 5'b00001 ) ? shift_val[38-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[38-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[38-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[38-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[38-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[38-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[38-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[38-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[38-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[38-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[38-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[38-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[38-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[38-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[38-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[38-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[38-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[38-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[38-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[38-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[38-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[38-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[38-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[38-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[38-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[38-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[38-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[38-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[38-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[38-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[38-31] : + 0; + + assign shiftright[39] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[39] : + ( pos[0:4] == 5'b00001 ) ? shift_val[39-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[39-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[39-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[39-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[39-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[39-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[39-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[39-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[39-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[39-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[39-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[39-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[39-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[39-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[39-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[39-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[39-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[39-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[39-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[39-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[39-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[39-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[39-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[39-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[39-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[39-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[39-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[39-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[39-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[39-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[39-31] : + 0; + + assign shiftright[40] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[40] : + ( pos[0:4] == 5'b00001 ) ? shift_val[40-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[40-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[40-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[40-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[40-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[40-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[40-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[40-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[40-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[40-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[40-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[40-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[40-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[40-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[40-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[40-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[40-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[40-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[40-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[40-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[40-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[40-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[40-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[40-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[40-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[40-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[40-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[40-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[40-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[40-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[40-31] : + 0; + + assign shiftright[41] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[41] : + ( pos[0:4] == 5'b00001 ) ? shift_val[41-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[41-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[41-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[41-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[41-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[41-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[41-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[41-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[41-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[41-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[41-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[41-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[41-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[41-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[41-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[41-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[41-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[41-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[41-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[41-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[41-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[41-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[41-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[41-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[41-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[41-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[41-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[41-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[41-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[41-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[41-31] : + 0; + + assign shiftright[42] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[42] : + ( pos[0:4] == 5'b00001 ) ? shift_val[42-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[42-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[42-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[42-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[42-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[42-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[42-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[42-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[42-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[42-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[42-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[42-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[42-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[42-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[42-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[42-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[42-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[42-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[42-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[42-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[42-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[42-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[42-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[42-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[42-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[42-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[42-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[42-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[42-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[42-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[42-31] : + 0; + + + assign shiftright[43] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[43] : + ( pos[0:4] == 5'b00001 ) ? shift_val[43-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[43-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[43-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[43-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[43-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[43-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[43-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[43-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[43-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[43-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[43-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[43-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[43-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[43-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[43-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[43-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[43-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[43-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[43-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[43-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[43-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[43-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[43-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[43-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[43-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[43-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[43-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[43-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[43-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[43-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[43-31] : + 0; + + assign shiftright[44] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[44] : + ( pos[0:4] == 5'b00001 ) ? shift_val[44-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[44-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[44-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[44-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[44-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[44-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[44-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[44-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[44-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[44-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[44-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[44-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[44-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[44-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[44-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[44-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[44-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[44-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[44-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[44-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[44-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[44-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[44-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[44-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[44-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[44-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[44-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[44-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[44-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[44-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[44-31] : + 0; + + assign shiftright[45] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[45] : + ( pos[0:4] == 5'b00001 ) ? shift_val[45-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[45-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[45-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[45-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[45-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[45-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[45-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[45-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[45-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[45-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[45-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[45-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[45-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[45-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[45-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[45-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[45-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[45-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[45-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[45-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[45-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[45-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[45-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[45-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[45-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[45-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[45-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[45-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[45-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[45-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[45-31] : + 0; + + assign shiftright[46] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[46] : + ( pos[0:4] == 5'b00001 ) ? shift_val[46-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[46-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[46-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[46-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[46-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[46-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[46-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[46-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[46-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[46-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[46-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[46-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[46-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[46-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[46-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[46-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[46-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[46-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[46-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[46-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[46-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[46-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[46-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[46-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[46-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[46-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[46-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[46-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[46-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[46-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[46-31] : + 0; + + assign shiftright[47] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[47] : + ( pos[0:4] == 5'b00001 ) ? shift_val[47-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[47-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[47-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[47-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[47-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[47-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[47-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[47-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[47-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[47-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[47-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[47-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[47-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[47-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[47-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[47-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[47-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[47-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[47-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[47-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[47-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[47-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[47-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[47-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[47-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[47-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[47-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[47-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[47-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[47-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[47-31] : + 0; + + assign shiftright[48] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[48] : + ( pos[0:4] == 5'b00001 ) ? shift_val[48-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[48-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[48-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[48-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[48-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[48-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[48-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[48-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[48-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[48-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[48-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[48-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[48-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[48-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[48-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[48-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[48-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[48-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[48-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[48-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[48-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[48-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[48-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[48-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[48-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[48-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[48-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[48-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[48-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[48-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[48-31] : + 0; + + assign shiftright[49] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[49] : + ( pos[0:4] == 5'b00001 ) ? shift_val[49-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[49-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[49-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[49-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[49-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[49-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[49-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[49-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[49-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[49-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[49-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[49-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[49-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[49-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[49-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[49-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[49-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[49-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[49-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[49-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[49-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[49-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[49-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[49-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[49-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[49-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[49-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[49-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[49-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[49-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[49-31] : + 0; + + assign shiftright[50] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[50] : + ( pos[0:4] == 5'b00001 ) ? shift_val[50-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[50-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[50-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[50-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[50-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[50-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[50-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[50-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[50-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[50-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[50-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[50-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[50-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[50-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[50-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[50-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[50-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[50-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[50-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[50-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[50-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[50-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[50-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[50-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[50-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[50-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[50-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[50-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[50-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[50-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[50-31] : + 0; + + assign shiftright[51] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[51] : + ( pos[0:4] == 5'b00001 ) ? shift_val[51-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[51-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[51-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[51-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[51-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[51-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[51-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[51-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[51-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[51-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[51-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[51-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[51-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[51-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[51-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[51-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[51-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[51-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[51-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[51-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[51-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[51-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[51-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[51-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[51-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[51-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[51-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[51-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[51-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[51-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[51-31] : + 0; + + assign shiftright[52] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[52] : + ( pos[0:4] == 5'b00001 ) ? shift_val[52-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[52-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[52-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[52-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[52-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[52-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[52-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[52-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[52-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[52-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[52-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[52-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[52-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[52-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[52-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[52-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[52-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[52-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[52-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[52-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[52-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[52-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[52-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[52-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[52-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[52-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[52-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[52-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[52-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[52-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[52-31] : + 0; + + assign shiftright[53] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[53] : + ( pos[0:4] == 5'b00001 ) ? shift_val[53-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[53-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[53-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[53-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[53-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[53-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[53-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[53-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[53-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[53-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[53-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[53-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[53-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[53-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[53-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[53-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[53-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[53-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[53-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[53-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[53-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[53-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[53-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[53-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[53-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[53-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[53-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[53-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[53-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[53-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[53-31] : + 0; + + assign shiftright[54] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[54] : + ( pos[0:4] == 5'b00001 ) ? shift_val[54-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[54-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[54-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[54-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[54-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[54-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[54-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[54-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[54-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[54-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[54-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[54-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[54-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[54-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[54-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[54-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[54-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[54-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[54-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[54-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[54-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[54-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[54-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[54-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[54-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[54-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[54-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[54-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[54-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[54-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[54-31] : + 0; + + assign shiftright[55] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[55] : + ( pos[0:4] == 5'b00001 ) ? shift_val[55-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[55-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[55-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[55-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[55-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[55-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[55-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[55-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[55-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[55-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[55-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[55-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[55-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[55-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[55-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[55-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[55-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[55-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[55-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[55-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[55-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[55-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[55-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[55-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[55-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[55-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[55-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[55-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[55-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[55-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[55-31] : + 0; + + assign shiftright[56] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[56] : + ( pos[0:4] == 5'b00001 ) ? shift_val[56-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[56-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[56-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[56-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[56-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[56-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[56-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[56-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[56-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[56-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[56-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[56-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[56-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[56-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[56-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[56-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[56-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[56-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[56-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[56-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[56-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[56-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[56-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[56-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[56-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[56-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[56-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[56-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[56-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[56-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[56-31] : + 0; + + assign shiftright[57] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[57] : + ( pos[0:4] == 5'b00001 ) ? shift_val[57-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[57-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[57-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[57-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[57-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[57-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[57-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[57-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[57-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[57-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[57-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[57-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[57-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[57-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[57-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[57-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[57-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[57-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[57-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[57-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[57-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[57-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[57-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[57-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[57-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[57-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[57-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[57-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[57-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[57-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[57-31] : + 0; + + assign shiftright[58] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[58] : + ( pos[0:4] == 5'b00001 ) ? shift_val[58-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[58-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[58-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[58-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[58-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[58-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[58-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[58-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[58-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[58-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[58-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[58-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[58-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[58-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[58-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[58-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[58-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[58-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[58-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[58-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[58-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[58-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[58-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[58-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[58-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[58-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[58-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[58-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[58-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[58-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[58-31] : + 0; + + assign shiftright[59] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[59] : + ( pos[0:4] == 5'b00001 ) ? shift_val[59-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[59-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[59-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[59-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[59-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[59-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[59-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[59-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[59-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[59-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[59-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[59-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[59-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[59-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[59-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[59-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[59-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[59-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[59-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[59-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[59-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[59-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[59-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[59-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[59-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[59-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[59-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[59-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[59-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[59-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[59-31] : + 0; + + assign shiftright[60] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[60] : + ( pos[0:4] == 5'b00001 ) ? shift_val[60-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[60-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[60-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[60-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[60-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[60-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[60-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[60-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[60-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[60-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[60-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[60-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[60-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[60-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[60-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[60-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[60-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[60-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[60-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[60-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[60-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[60-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[60-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[60-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[60-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[60-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[60-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[60-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[60-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[60-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[60-31] : + 0; + + assign shiftright[61] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[61] : + ( pos[0:4] == 5'b00001 ) ? shift_val[61-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[61-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[61-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[61-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[61-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[61-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[61-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[61-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[61-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[61-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[61-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[61-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[61-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[61-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[61-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[61-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[61-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[61-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[61-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[61-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[61-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[61-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[61-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[61-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[61-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[61-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[61-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[61-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[61-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[61-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[61-31] : + 0; + + assign shiftright[62] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[62] : + ( pos[0:4] == 5'b00001 ) ? shift_val[62-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[62-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[62-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[62-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[62-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[62-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[62-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[62-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[62-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[62-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[62-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[62-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[62-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[62-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[62-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[62-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[62-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[62-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[62-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[62-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[62-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[62-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[62-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[62-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[62-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[62-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[62-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[62-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[62-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[62-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[62-31] : + 0; + + assign shiftright[63] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[63] : + ( pos[0:4] == 5'b00001 ) ? shift_val[63-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[63-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[63-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[63-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[63-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[63-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[63-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[63-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[63-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[63-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[63-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[63-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[63-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[63-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[63-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[63-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[63-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[63-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[63-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[63-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[63-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[63-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[63-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[63-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[63-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[63-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[63-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[63-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[63-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[63-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[63-31] : + 0; + + assign shift_out[0:31] = 32'b0; + + assign shift_out[32:63] = + ( shift_cmd[0:3] == 4'b0101 ) ? shiftleft[0:31] : + ( shift_cmd[0:3] == 4'b0110 ) ? shiftright[32:63] : + 32'b0; + + assign bin_ovfl = 1'b0; + +endmodule // shifter + + \ No newline at end of file diff --git a/code/vezba6_7/v6_run.f b/code/vezba6_7/v6_run.f new file mode 100644 index 0000000..1789f8f --- /dev/null +++ b/code/vezba6_7/v6_run.f @@ -0,0 +1,32 @@ +-uvmhome "/eda/cadence/2019-20/RHELx86/XCELIUM_19.03.013/tools/methodology/UVM/CDNS-1.2/" +-uvm +UVM_TESTNAME=test_simple +-sv +incdir+./verif +-sv +incdir+./verif/Agent +-sv +incdir+./verif/Sequences + + + ./dut/alu_input_stage.v + ./dut/alu_output_stage.v + ./dut/exdbin_mac.v + ./dut/holdreg.v + ./dut/mux_out.v + ./dut/shifter.v + ./dut/priority.v + ./dut/calc_top.v + + + +-sv ./verif/Agent/calc_agent_pkg.sv +-sv ./verif/Sequences/calc_seq_pkg.sv +-sv ./verif/calc_test_pkg.sv + +-sv ./verif/calc_verif_top.sv + + + + +#-LINEDEBUG +-access +rwc +-disable_sem2009 +-nowarn "MEMODR" +-timescale 1ns/10ps diff --git a/code/vezba6_7/verif/Agent/calc_agent_pkg.sv b/code/vezba6_7/verif/Agent/calc_agent_pkg.sv new file mode 100644 index 0000000..223226a --- /dev/null +++ b/code/vezba6_7/verif/Agent/calc_agent_pkg.sv @@ -0,0 +1,21 @@ +`ifndef CALC_AGENT_PKG +`define CALC_AGENT_PKG + +package calc_agent_pkg; + + import uvm_pkg::*; + `include "uvm_macros.svh" + + ////////////////////////////////////////////////////////// + // include Agent components : driver,monitor,sequencer + ///////////////////////////////////////////////////////// + `include "calc_seq_item.sv" + `include "calc_sequencer.sv" + `include "calc_driver.sv" + +endpackage + +`endif + + + diff --git a/code/vezba6_7/verif/Agent/calc_driver.sv b/code/vezba6_7/verif/Agent/calc_driver.sv new file mode 100644 index 0000000..c0ecbff --- /dev/null +++ b/code/vezba6_7/verif/Agent/calc_driver.sv @@ -0,0 +1,41 @@ +`ifndef CALC_DRIVER_SV +`define CALC_DRIVER_SV +class calc_driver extends uvm_driver#(calc_seq_item); + + `uvm_component_utils(calc_driver) + virtual interface calc_if vif; + function new(string name = "calc_driver", uvm_component parent = null); + super.new(name,parent); + endfunction // new + + function void build_phase(uvm_phase phase); + if (!uvm_config_db#(virtual calc_if)::get(null, "*", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + + endfunction // build_phase + + task main_phase(uvm_phase phase); + forever begin + @(posedge vif.clk); + if (!vif.rst) + begin + seq_item_port.get_next_item(req); + + `uvm_info(get_type_name(), + $sformatf("Driver sending...\n%s", req.sprint()), + UVM_HIGH) + vif.req1_data_in = req.operand1; + vif.req1_cmd_in = req.cmd; + @(posedge vif.clk); + vif.req1_data_in = req.operand2; + vif.req1_cmd_in = 0; + + seq_item_port.item_done(); + end + end + endtask : main_phase + +endclass : calc_driver + +`endif + diff --git a/code/vezba6_7/verif/Agent/calc_seq_item.sv b/code/vezba6_7/verif/Agent/calc_seq_item.sv new file mode 100644 index 0000000..234fef4 --- /dev/null +++ b/code/vezba6_7/verif/Agent/calc_seq_item.sv @@ -0,0 +1,20 @@ +`ifndef CALC_SEQ_ITEM_SV + `define CALC_SEQ_ITEM_SV + +class calc_seq_item extends uvm_sequence_item; + + rand logic [31:0] operand1; + rand logic [31:0] operand2; + rand logic [3:0] cmd; + + + `uvm_object_utils_begin(calc_seq_item) + `uvm_object_utils_end + + function new (string name = "calc_seq_item"); + super.new(name); + endfunction // new + +endclass : calc_seq_item + +`endif diff --git a/code/vezba6_7/verif/Agent/calc_sequencer.sv b/code/vezba6_7/verif/Agent/calc_sequencer.sv new file mode 100644 index 0000000..d01a629 --- /dev/null +++ b/code/vezba6_7/verif/Agent/calc_sequencer.sv @@ -0,0 +1,15 @@ +`ifndef CALC_SEQUENCER_SV + `define CALC_SEQUENCER_SV + +class calc_sequencer extends uvm_sequencer#(calc_seq_item); + + `uvm_component_utils(calc_sequencer) + + function new(string name = "calc_sequencer", uvm_component parent = null); + super.new(name,parent); + endfunction + +endclass : calc_sequencer + +`endif + diff --git a/code/vezba6_7/verif/Sequences/calc_base_seq.sv b/code/vezba6_7/verif/Sequences/calc_base_seq.sv new file mode 100644 index 0000000..db6e7bb --- /dev/null +++ b/code/vezba6_7/verif/Sequences/calc_base_seq.sv @@ -0,0 +1,30 @@ +`ifndef CALC_BASE_SEQ_SV + `define CALC_BASE_SEQ_SV + +class calc_base_seq extends uvm_sequence#(calc_seq_item); + + `uvm_object_utils(calc_base_seq) + `uvm_declare_p_sequencer(calc_sequencer) + + function new(string name = "calc_base_seq"); + super.new(name); + endfunction + + // objections are raised in pre_body + virtual task pre_body(); + uvm_phase phase = get_starting_phase(); + if (phase != null) + phase.raise_objection(this, {"Running sequence '", get_full_name(), "'"}); + uvm_test_done.set_drain_time(this, 200ms); + endtask : pre_body + + // objections are dropped in post_body + virtual task post_body(); + uvm_phase phase = get_starting_phase(); + if (phase != null) + phase.drop_objection(this, {"Completed sequence '", get_full_name(), "'"}); + endtask : post_body + +endclass : calc_base_seq + +`endif diff --git a/code/vezba6_7/verif/Sequences/calc_seq_pkg.sv b/code/vezba6_7/verif/Sequences/calc_seq_pkg.sv new file mode 100644 index 0000000..0ea3e99 --- /dev/null +++ b/code/vezba6_7/verif/Sequences/calc_seq_pkg.sv @@ -0,0 +1,11 @@ +`ifndef CALC_SEQ_PKG_SV + `define CALC_SEQ_PKG_SV +package calc_seq_pkg; + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + import calc_agent_pkg::calc_seq_item; + import calc_agent_pkg::calc_sequencer; + `include "calc_base_seq.sv" + `include "calc_simple_seq.sv" + endpackage +`endif diff --git a/code/vezba6_7/verif/Sequences/calc_simple_seq.sv b/code/vezba6_7/verif/Sequences/calc_simple_seq.sv new file mode 100644 index 0000000..4114064 --- /dev/null +++ b/code/vezba6_7/verif/Sequences/calc_simple_seq.sv @@ -0,0 +1,29 @@ +`ifndef CALC_SIMPLE_SEQ_SV + `define CALC_SIMPLE_SEQ_SV + +class calc_simple_seq extends calc_base_seq; + + `uvm_object_utils (calc_simple_seq) + + function new(string name = "calc_simple_seq"); + super.new(name); + endfunction + + virtual task body(); + // simple example - just send one item + calc_seq_item calc_it; + // prvi korak kreiranje transakcije + calc_it = calc_seq_item::type_id::create("calc_it"); + // drugi korak − start + start_item(calc_it); + // treci korak priprema + // po potrebi moguce prosiriti sa npr. inline ogranicenjima + assert (calc_it.randomize() with {calc_it.cmd==1; calc_it.operand1==3;}); + // cetvrti korak − finish + finish_item(calc_it); + + endtask : body + +endclass : calc_simple_seq + +`endif diff --git a/code/vezba6_7/verif/calc_if.sv b/code/vezba6_7/verif/calc_if.sv new file mode 100644 index 0000000..feebbb1 --- /dev/null +++ b/code/vezba6_7/verif/calc_if.sv @@ -0,0 +1,29 @@ +`ifndef CALC_IF_SV + `define CALC_IF_SV + +interface calc_if (input clk, logic [6 : 0] rst); + + parameter DATA_WIDTH = 32; + parameter RESP_WIDTH = 2; + parameter CMD_WIDTH = 4; + + logic [DATA_WIDTH - 1 : 0] out_data1; + logic [DATA_WIDTH - 1 : 0] out_data2; + logic [DATA_WIDTH - 1 : 0] out_data3; + logic [DATA_WIDTH - 1 : 0] out_data4; + logic [RESP_WIDTH - 1 : 0] out_resp1; + logic [RESP_WIDTH - 1 : 0] out_resp2; + logic [RESP_WIDTH - 1 : 0] out_resp3; + logic [RESP_WIDTH - 1 : 0] out_resp4; + logic [CMD_WIDTH - 1 : 0] req1_cmd_in; + logic [DATA_WIDTH - 1 : 0] req1_data_in; + logic [CMD_WIDTH - 1 : 0] req2_cmd_in; + logic [DATA_WIDTH - 1 : 0] req2_data_in; + logic [CMD_WIDTH - 1 : 0] req3_cmd_in; + logic [DATA_WIDTH - 1 : 0] req3_data_in; + logic [CMD_WIDTH - 1 : 0] req4_cmd_in; + logic [DATA_WIDTH - 1 : 0] req4_data_in; + +endinterface : calc_if + +`endif diff --git a/code/vezba6_7/verif/calc_test_pkg.sv b/code/vezba6_7/verif/calc_test_pkg.sv new file mode 100644 index 0000000..fda3e54 --- /dev/null +++ b/code/vezba6_7/verif/calc_test_pkg.sv @@ -0,0 +1,23 @@ +`ifndef CALC_TEST_PKG_SV + `define CALC_TEST_PKG_SV + +package calc_test_pkg; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + + import calc_agent_pkg::*; + import calc_seq_pkg::*; + + + `include "test_base.sv" + `include "test_simple.sv" + `include "test_simple_2.sv" + + +endpackage : calc_test_pkg +`include "calc_if.sv" + + +`endif + diff --git a/code/vezba6_7/verif/calc_verif_top.sv b/code/vezba6_7/verif/calc_verif_top.sv new file mode 100644 index 0000000..85c5bc4 --- /dev/null +++ b/code/vezba6_7/verif/calc_verif_top.sv @@ -0,0 +1,52 @@ +module calc_verif_top; + + import uvm_pkg::*; // import the UVM library +`include "uvm_macros.svh" // Include the UVM macros + + import calc_test_pkg::*; + + logic clk; + logic [6 : 0] rst; + + // interface + calc_if calc_vif(clk, rst); + + // DUT + calc_top DUT( + .c_clk ( clk ), + .reset ( rst ), + .out_data1 ( calc_vif.out_data1 ), + .out_data2 ( calc_vif.out_data2 ), + .out_data3 ( calc_vif.out_data3 ), + .out_data4 ( calc_vif.out_data4 ), + .out_resp1 ( calc_vif.out_resp1 ), + .out_resp2 ( calc_vif.out_resp2 ), + .out_resp3 ( calc_vif.out_resp3 ), + .out_resp4 ( calc_vif.out_resp4 ), + .req1_cmd_in ( calc_vif.req1_cmd_in ), + .req1_data_in ( calc_vif.req1_data_in ), + .req2_cmd_in ( calc_vif.req2_cmd_in ), + .req2_data_in ( calc_vif.req2_data_in ), + .req3_cmd_in ( calc_vif.req3_cmd_in ), + .req3_data_in ( calc_vif.req3_data_in ), + .req4_cmd_in ( calc_vif.req4_cmd_in ), + .req4_data_in ( calc_vif.req4_data_in ) + ); + + // run test + initial begin + uvm_config_db#(virtual calc_if)::set(null, "*", "calc_if", calc_vif); + run_test(); + end + + // clock and reset init. + initial begin + clk <= 0; + rst <= 1; + #50 rst <= 0; + end + + // clock generation + always #50 clk = ~clk; + +endmodule : calc_verif_top diff --git a/code/vezba6_7/verif/test_base.sv b/code/vezba6_7/verif/test_base.sv new file mode 100644 index 0000000..1e4c608 --- /dev/null +++ b/code/vezba6_7/verif/test_base.sv @@ -0,0 +1,27 @@ +`ifndef TEST_BASE_SV + `define TEST_BASE_SV + + class test_base extends uvm_test; + + `uvm_component_utils(test_base) + + calc_driver drv; + calc_sequencer seqr; + calc_seq_item seq_item1; + function new(string name = "test_base", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + drv = calc_driver::type_id::create("drv", this); + seqr = calc_sequencer::type_id::create("seqr", this); + endfunction : build_phase + + function void connect_phase(uvm_phase phase); + drv.seq_item_port.connect(seqr.seq_item_export); + endfunction : connect_phase + +endclass : test_base + +`endif diff --git a/code/vezba6_7/verif/test_simple.sv b/code/vezba6_7/verif/test_simple.sv new file mode 100644 index 0000000..7a2b576 --- /dev/null +++ b/code/vezba6_7/verif/test_simple.sv @@ -0,0 +1,28 @@ +`ifndef TEST_SIMPLE_SV + `define TEST_SIMPLE_SV + +class test_simple extends test_base; + + `uvm_component_utils(test_simple) + + calc_simple_seq simple_seq; + + function new(string name = "test_simple", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + simple_seq = calc_simple_seq::type_id::create("simple_seq"); + endfunction : build_phase + + task main_phase(uvm_phase phase); + phase.raise_objection(this); + simple_seq.start(seqr); + #100ms; + phase.drop_objection(this); + endtask : main_phase + +endclass + +`endif diff --git a/code/vezba6_7/verif/test_simple_2.sv b/code/vezba6_7/verif/test_simple_2.sv new file mode 100644 index 0000000..57ad9f6 --- /dev/null +++ b/code/vezba6_7/verif/test_simple_2.sv @@ -0,0 +1,23 @@ +`ifndef TEST_SIMPLE_2_SV + `define TEST_SIMPLE_2_SV + +class test_simple_2 extends test_base; + + `uvm_component_utils(test_simple_2) + + function new(string name = "test_simple_2", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + uvm_config_db#(uvm_object_wrapper)::set(this, + "seqr.main_phase", + "default_sequence", + calc_simple_seq::type_id::get()); + endfunction : build_phase + +endclass + +`endif diff --git a/code/vezba8/dut/alu_input_stage.v b/code/vezba8/dut/alu_input_stage.v new file mode 100644 index 0000000..cb10f05 --- /dev/null +++ b/code/vezba8/dut/alu_input_stage.v @@ -0,0 +1,36 @@ +// Library: calc1 +// Module: ALU Input Stage +// Author: Naseer SIddique + +module alu_input_stage (alu_data1, alu_data2, hold1_data1, hold1_data2, hold2_data1, hold2_data2, hold3_data1, hold3_data2, hold4_data1, hold4_data2, prio_alu_in_cmd, prio_alu_in_req_id); + + output [0:63] alu_data1, alu_data2; + + wire [0:63] alu_data1, alu_data2; + + input [0:31] hold1_data1, hold1_data2, + hold2_data1, hold2_data2, + hold3_data1, hold3_data2, + hold4_data1, hold4_data2; + + input [0:3] prio_alu_in_cmd; + input [0:1] prio_alu_in_req_id; + + assign alu_data1[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data1[0:31] : + 32'b0; + + assign alu_data2[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data2[0:31] : + 32'b0; + + assign alu_data1[0:31] = 32'b0; + assign alu_data2[0:31] = 32'b0; + +endmodule // alu_input_stage diff --git a/code/vezba8/dut/alu_output_stage.v b/code/vezba8/dut/alu_output_stage.v new file mode 100644 index 0000000..4ff44ad --- /dev/null +++ b/code/vezba8/dut/alu_output_stage.v @@ -0,0 +1,47 @@ +// Library: calc1 +// Module: ALU Output Stage +// Author: Naseer Siddique + +module alu_output_stage(out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk,alu_overflow, alu_result, local_error_found, prio_alu_out_req_id, prio_alu_out_vld, reset); + + output [0:31] out_data1, out_data2, out_data3, out_data4; + output [0:1] out_resp1, out_resp2, out_resp3, out_resp4; + + input [0:63] alu_result; + input [0:1] prio_alu_out_req_id; + input [1:7] reset; + input c_clk, + alu_overflow, + local_error_found, + prio_alu_out_vld; + + wire [0:31] hold_data; + wire [0:1] hold_resp, hold_id; + + assign hold_id[0:1] = prio_alu_out_req_id[0:1]; + + assign hold_resp[0:1] = + (~prio_alu_out_vld) ? 2'b00 : + (~local_error_found) ? 2'b01 : + (alu_result[31]) ? 2'b10 : + 2'b01; + + assign hold_data[0:31] = (prio_alu_out_vld) ? alu_result[32:63] : 32'b0; + + assign out_resp1[0:1] = (hold_id[0:1] == 2'b00) ? hold_resp[0:1] : 2'b00; + + assign out_resp2[0:1] = (hold_id[0:1] == 2'b01) ? hold_resp[0:1] : 2'b00; + + assign out_resp3[0:1] = (hold_id[0:1] == 2'b10) ? hold_resp[0:1] : 2'b00; + + assign out_resp4[0:1] = (hold_id[0:1] == 2'b11) ? hold_resp[0:1] : 2'b00; + + assign out_data1[0:31] = (hold_id[0:1] == 2'b00) ? hold_data[0:31] : 32'b0; + + assign out_data2[0:31] = (hold_id[0:1] == 2'b01) ? hold_data[0:31] : 32'b0; + + assign out_data3[0:31] = (hold_id[0:1] == 2'b10) ? hold_data[0:31] : 32'b0; + + assign out_data4[0:31] = (hold_id[0:1] == 2'b11) ? hold_data[0:31] : 32'b0; + +endmodule diff --git a/code/vezba8/dut/calc_top.v b/code/vezba8/dut/calc_top.v new file mode 100644 index 0000000..b4e1833 --- /dev/null +++ b/code/vezba8/dut/calc_top.v @@ -0,0 +1,278 @@ +// Library: calc1 +// Module: Top-level wiring +// Author: Naseer Siddique + +//`include "alu_input_stage.v" +//`include "alu_output_stage.v" +//`include "exdbin_mac.v" +//`include "holdreg.v" +//`include "mux_out.v" +//`include "shifter.v" +//`include "priority.v" + +module calc_top (out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk, req1_cmd_in, req1_data_in, req2_cmd_in, req2_data_in, req3_cmd_in, req3_data_in, req4_cmd_in, req4_data_in, reset); + + output [0:31] out_data1, + out_data2, + out_data3, + out_data4; + + output [0:1] out_resp1, + out_resp2, + out_resp3, + out_resp4; + + + input c_clk; + + input [0:3] req1_cmd_in, + req2_cmd_in, + req3_cmd_in, + req4_cmd_in; + + input [0:31] req1_data_in, + req2_data_in, + req3_data_in, + req4_data_in; + + input [1:7] reset; + + wire [0:63] add_sum, + fxu_areg_q, + fxu_breg_q, + shift_out, + shift_places, + shift_val; + + wire [0:31] hold1_data1, + hold1_data2, + hold2_data1, + hold2_data2, + hold3_data1, + hold3_data2, + hold4_data1, + hold4_data2, + mux1_req_data1, + mux1_req_data2, + mux2_req_data1, + mux2_req_data2, + mux3_req_data1, + mux3_req_data2, + mux4_req_data1, + mux4_req_data2; + + wire [0:3] hold1_prio_req, + hold2_prio_req, + hold3_prio_req, + hold4_prio_req, + prio_alu1_in_cmd, + prio_alu2_in_cmd; + + wire [0:1] mux1_req_resp1, + mux1_req_resp2, + mux2_req_resp1, + mux2_req_resp2, + mux3_req_resp1, + mux3_req_resp2, + mux4_req_resp1, + mux4_req_resp2, + prio_alu1_in_req_id, + prio_alu1_out_req_id, + prio_alu2_in_req_id, + prio_alu2_out_req_id; + + wire prio_alu1_out_vld, + prio_alu2_out_vld, + add_ovfl, + shift_ovfl; + + wire [0:3] error_found; + assign error_found = 4'b0000; + + exdbin_mac adder ( + .alu_cmd ( prio_alu1_in_cmd[0:3] ), + .bin_ovfl ( add_ovfl ), + .bin_sum ( add_sum[0:63] ), + .fxu_areg_q ( fxu_areg_q[0:63] ), + .fxu_breg_q ( fxu_breg_q[0:63] ), + .local_error_found ( error_found[0] ) + ); + + + holdreg holdreg1( + .c_clk ( c_clk ), + .hold_data1 ( hold1_data1[0:31] ), + .hold_data2 ( hold1_data2[0:31] ), + .hold_prio_req ( hold1_prio_req[0:3] ), + .req_cmd_in ( req1_cmd_in[0:3] ), + .req_data_in ( req1_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg2( + .c_clk ( c_clk ), + .hold_data1 ( hold2_data1[0:31] ), + .hold_data2 ( hold2_data2[0:31] ), + .hold_prio_req ( hold2_prio_req[0:3] ), + .req_cmd_in ( req2_cmd_in[0:3] ), + .req_data_in ( req2_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg3( + .c_clk ( c_clk ), + .hold_data1 ( hold3_data1[0:31] ), + .hold_data2 ( hold3_data2[0:31] ), + .hold_prio_req ( hold3_prio_req[0:3] ), + .req_cmd_in ( req3_cmd_in[0:3] ), + .req_data_in ( req3_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg4( + .c_clk ( c_clk ), + .hold_data1 ( hold4_data1[0:31] ), + .hold_data2 ( hold4_data2[0:31] ), + .hold_prio_req ( hold4_prio_req[0:3] ), + .req_cmd_in ( req4_cmd_in[0:3] ), + .req_data_in ( req4_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + alu_input_stage in_stage1( + .alu_data1 ( fxu_areg_q[0:63]), + .alu_data2 ( fxu_breg_q[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu1_in_req_id[0:1]) + ); + + alu_input_stage in_stage2( + .alu_data1 ( shift_val[0:63]), + .alu_data2 ( shift_places[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu2_in_req_id[0:1]) + ); + + mux_out mux_out1( + .req_data1 ( mux1_req_data1[0:31]), + .req_data2 ( mux1_req_data2[0:31]), + .req_data ( out_data1[0:31]), + .req_resp1 ( mux1_req_resp1[0:1]), + .req_resp2 ( mux1_req_resp2[0:1]), + .req_resp ( out_resp1[0:1]) + ); + + mux_out mux_out2( + .req_data1 ( mux2_req_data1[0:31]), + .req_data2 ( mux2_req_data2[0:31]), + .req_data ( out_data2[0:31]), + .req_resp1 ( mux2_req_resp1[0:1]), + .req_resp2 ( mux2_req_resp2[0:1]), + .req_resp ( out_resp2[0:1]) + ); + + mux_out mux_out3( + .req_data1 ( mux3_req_data1[0:31]), + .req_data2 ( mux3_req_data2[0:31]), + .req_data ( out_data3[0:31]), + .req_resp1 ( mux3_req_resp1[0:1]), + .req_resp2 ( mux3_req_resp2[0:1]), + .req_resp ( out_resp3[0:1]) + ); + + mux_out mux_out4( + .req_data1 ( mux4_req_data1[0:31]), + .req_data2 ( mux4_req_data2[0:31]), + .req_data ( out_data4[0:31]), + .req_resp1 ( mux4_req_resp1[0:1]), + .req_resp2 ( mux4_req_resp2[0:1]), + .req_resp ( out_resp4[0:1]) + ); + + alu_output_stage out_stage1( + .alu_overflow ( add_ovfl), + .alu_result ( add_sum[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data1[0:31]), + .out_data2 ( mux2_req_data1[0:31]), + .out_data3 ( mux3_req_data1[0:31]), + .out_data4 ( mux4_req_data1[0:31]), + .out_resp1 ( mux1_req_resp1[0:1]), + .out_resp2 ( mux2_req_resp1[0:1]), + .out_resp3 ( mux3_req_resp1[0:1]), + .out_resp4 ( mux4_req_resp1[0:1]), + .prio_alu_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu1_out_vld ), + .reset ( reset[1:7]) + ); + + alu_output_stage out_stage2( + .alu_overflow ( shift_ovfl), + .alu_result ( shift_out[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data2[0:31]), + .out_data2 ( mux2_req_data2[0:31]), + .out_data3 ( mux3_req_data2[0:31]), + .out_data4 ( mux4_req_data2[0:31]), + .out_resp1 ( mux1_req_resp2[0:1]), + .out_resp2 ( mux2_req_resp2[0:1]), + .out_resp3 ( mux3_req_resp2[0:1]), + .out_resp4 ( mux4_req_resp2[0:1]), + .prio_alu_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu2_out_vld ), + .reset ( reset[1:7]) + ); + + priority1 priority_logic ( + .c_clk ( c_clk), + .hold1_prio_req ( hold1_prio_req[0:3]), + .hold2_prio_req ( hold2_prio_req[0:3]), + .hold3_prio_req ( hold3_prio_req[0:3]), + .hold4_prio_req ( hold4_prio_req[0:3]), + .local_error_found ( error_found[3]), + .prio_alu1_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu1_in_req_id ( prio_alu1_in_req_id[0:1]), + .prio_alu1_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu1_out_vld ( prio_alu1_out_vld), + .prio_alu2_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu2_in_req_id ( prio_alu2_in_req_id[0:1]), + .prio_alu2_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu2_out_vld ( prio_alu2_out_vld), + .reset ( reset[1:7]) + ); + + shifter shifter1( + .bin_ovfl ( shift_ovfl), + .local_error_found ( error_found[1]), + .shift_cmd ( prio_alu2_in_cmd[0:3]), + .shift_out ( shift_out[0:63]), + .shift_places ( shift_places[0:63]), + .shift_val ( shift_val[0:63]) + ); + +endmodule // calc1_top + + + + + + + diff --git a/code/vezba8/dut/exdbin_mac.v b/code/vezba8/dut/exdbin_mac.v new file mode 100644 index 0000000..59593ef --- /dev/null +++ b/code/vezba8/dut/exdbin_mac.v @@ -0,0 +1,1279 @@ +// Library: calc2 +// Module: 64-bit binary adder +// Author: Naseer Siddique + +module exdbin_mac (bin_ovfl, bin_sum, alu_cmd, fxu_areg_q, local_error_found, fxu_breg_q); + + output bin_ovfl; + output [0:63] bin_sum; + + wire bin_ovfl; + wire[0:63] bin_sum; + + input [0:3] alu_cmd; + input [0:63] fxu_areg_q, fxu_breg_q; + input local_error_found; + + wire [0:63] p, p_n, g, h_n, d, a, a_n, b, b_n; + wire [0:63] fxu_areg_n_q, fxu_breg_n_q; + + wire [0:64] c, c_n; + wire [0:31] G2, P2; + wire [0:15] Gn, Pn; + wire [0:7] Gb, Pb, d8; + wire [0:5] G2b, P2b; + wire ds; + wire bin_a_z_q, bin_add_45_q; + wire [0:7] bin_by_f_e_q; + wire bin_cin_q, bin_ex_sign_q, bin_ex_sign_op_q; + wire bin_sub_45_q, bin_sub_q; + wire bin_c_0; + wire bin_c_32; + wire bin_sum_0_63_z, bin_sum_32_63_z, bin_sum_33_63_z; + wire [0:63] bruce_bin_sum; + + + integer A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S; + + assign bin_a_z_q = 1'b0; + assign bin_add_45_q = (alu_cmd[0:3] == 4'b0001) ? 1'b1: 1'b0; + assign bin_by_f_e_q = 8'b0; + assign bin_cin_q = 1'b0; + assign bin_ex_sign_q = 1'b0; + assign bin_ex_sign_op_q = 1'b0; + assign bin_sub_45_q = ( alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + assign bin_sub_q = (alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + + assign fxu_areg_n_q[0] = ~fxu_areg_q[0]; + assign fxu_breg_n_q[0] = ~fxu_breg_q[0]; + + assign fxu_areg_n_q[1] = ~fxu_areg_q[1]; + assign fxu_breg_n_q[1] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[2] = ~fxu_areg_q[2]; + assign fxu_breg_n_q[2] = ~fxu_breg_q[2]; + + assign fxu_areg_n_q[3] = ~fxu_areg_q[3]; + assign fxu_breg_n_q[3] = ~fxu_breg_q[3]; + + assign fxu_areg_n_q[4] = ~fxu_areg_q[4]; + assign fxu_breg_n_q[4] = ~fxu_breg_q[4]; + + assign fxu_areg_n_q[5] = ~fxu_areg_q[5]; + assign fxu_breg_n_q[5] = ~fxu_breg_q[5]; + + assign fxu_areg_n_q[6] = ~fxu_areg_q[6]; + assign fxu_breg_n_q[6] = ~fxu_breg_q[6]; + + assign fxu_areg_n_q[7] = ~fxu_areg_q[7]; + assign fxu_breg_n_q[7] = ~fxu_breg_q[7]; + + assign fxu_areg_n_q[8] = ~fxu_areg_q[8]; + assign fxu_breg_n_q[8] = ~fxu_breg_q[8]; + + assign fxu_areg_n_q[9] = ~fxu_areg_q[9]; + assign fxu_breg_n_q[9] = ~fxu_breg_q[9]; + + assign fxu_areg_n_q[10] = ~fxu_areg_q[10]; + assign fxu_breg_n_q[10] = ~fxu_breg_q[10]; + + assign fxu_areg_n_q[11] = ~fxu_areg_q[11]; + assign fxu_breg_n_q[11] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[12] = ~fxu_areg_q[12]; + assign fxu_breg_n_q[12] = ~fxu_breg_q[12]; + + assign fxu_areg_n_q[13] = ~fxu_areg_q[13]; + assign fxu_breg_n_q[13] = ~fxu_breg_q[13]; + + assign fxu_areg_n_q[14] = ~fxu_areg_q[14]; + assign fxu_breg_n_q[14] = ~fxu_breg_q[14]; + + assign fxu_areg_n_q[15] = ~fxu_areg_q[15]; + assign fxu_breg_n_q[15] = ~fxu_breg_q[15]; + + assign fxu_areg_n_q[16] = ~fxu_areg_q[16]; + assign fxu_breg_n_q[16] = ~fxu_breg_q[16]; + + assign fxu_areg_n_q[17] = ~fxu_areg_q[17]; + assign fxu_breg_n_q[17] = ~fxu_breg_q[17]; + + assign fxu_areg_n_q[18] = ~fxu_areg_q[18]; + assign fxu_breg_n_q[18] = ~fxu_breg_q[18]; + + assign fxu_areg_n_q[19] = ~fxu_areg_q[19]; + assign fxu_breg_n_q[19] = ~fxu_breg_q[19]; + + assign fxu_areg_n_q[20] = ~fxu_areg_q[20]; + assign fxu_breg_n_q[20] = ~fxu_breg_q[20]; + + assign fxu_areg_n_q[21] = ~fxu_areg_q[21]; + assign fxu_breg_n_q[21] = ~fxu_breg_q[21]; + + assign fxu_areg_n_q[22] = ~fxu_areg_q[22]; + assign fxu_breg_n_q[22] = ~fxu_breg_q[22]; + + assign fxu_areg_n_q[23] = ~fxu_areg_q[23]; + assign fxu_breg_n_q[23] = ~fxu_breg_q[23]; + + assign fxu_areg_n_q[24] = ~fxu_areg_q[24]; + assign fxu_breg_n_q[24] = ~fxu_breg_q[24]; + + assign fxu_areg_n_q[25] = ~fxu_areg_q[25]; + assign fxu_breg_n_q[25] = ~fxu_breg_q[25]; + + assign fxu_areg_n_q[26] = ~fxu_areg_q[26]; + assign fxu_breg_n_q[26] = ~fxu_breg_q[26]; + + assign fxu_areg_n_q[27] = ~fxu_areg_q[27]; + assign fxu_breg_n_q[27] = ~fxu_breg_q[27]; + + assign fxu_areg_n_q[28] = ~fxu_areg_q[28]; + assign fxu_breg_n_q[28] = ~fxu_breg_q[28]; + + assign fxu_areg_n_q[29] = ~fxu_areg_q[29]; + assign fxu_breg_n_q[29] = ~fxu_breg_q[29]; + + assign fxu_areg_n_q[30] = ~fxu_areg_q[30]; + assign fxu_breg_n_q[30] = ~fxu_breg_q[30]; + + assign fxu_areg_n_q[31] = ~fxu_areg_q[31]; + assign fxu_breg_n_q[31] = ~fxu_breg_q[31]; + + assign fxu_areg_n_q[32] = ~fxu_areg_q[32]; + assign fxu_breg_n_q[32] = ~fxu_breg_q[32]; + + assign fxu_areg_n_q[33] = ~fxu_areg_q[33]; + assign fxu_breg_n_q[33] = ~fxu_breg_q[33]; + + assign fxu_areg_n_q[34] = ~fxu_areg_q[34]; + assign fxu_breg_n_q[34] = ~fxu_breg_q[34]; + + assign fxu_areg_n_q[35] = ~fxu_areg_q[35]; + assign fxu_breg_n_q[35] = ~fxu_breg_q[35]; + + assign fxu_areg_n_q[36] = ~fxu_areg_q[36]; + assign fxu_breg_n_q[36] = ~fxu_breg_q[36]; + + assign fxu_areg_n_q[37] = ~fxu_areg_q[37]; + assign fxu_breg_n_q[37] = ~fxu_breg_q[37]; + + assign fxu_areg_n_q[38] = ~fxu_areg_q[38]; + assign fxu_breg_n_q[38] = ~fxu_breg_q[38]; + + assign fxu_areg_n_q[39] = ~fxu_areg_q[39]; + assign fxu_breg_n_q[39] = ~fxu_breg_q[39]; + + assign fxu_areg_n_q[40] = ~fxu_areg_q[40]; + assign fxu_breg_n_q[40] = ~fxu_breg_q[40]; + + assign fxu_areg_n_q[41] = ~fxu_areg_q[41]; + assign fxu_breg_n_q[41] = ~fxu_breg_q[41]; + + assign fxu_areg_n_q[42] = ~fxu_areg_q[42]; + assign fxu_breg_n_q[42] = ~fxu_breg_q[42]; + + assign fxu_areg_n_q[43] = ~fxu_areg_q[43]; + assign fxu_breg_n_q[43] = ~fxu_breg_q[43]; + + assign fxu_areg_n_q[44] = ~fxu_areg_q[44]; + assign fxu_breg_n_q[44] = ~fxu_breg_q[44]; + + assign fxu_areg_n_q[45] = ~fxu_areg_q[45]; + assign fxu_breg_n_q[45] = ~fxu_breg_q[45]; + + assign fxu_areg_n_q[46] = ~fxu_areg_q[46]; + assign fxu_breg_n_q[46] = ~fxu_breg_q[46]; + + assign fxu_areg_n_q[47] = ~fxu_areg_q[47]; + assign fxu_breg_n_q[47] = ~fxu_breg_q[47]; + + assign fxu_areg_n_q[48] = ~fxu_areg_q[48]; + assign fxu_breg_n_q[48] = ~fxu_breg_q[48]; + + assign fxu_areg_n_q[49] = ~fxu_areg_q[49]; + assign fxu_breg_n_q[49] = ~fxu_breg_q[49]; + + assign fxu_areg_n_q[50] = ~fxu_areg_q[50]; + assign fxu_breg_n_q[50] = ~fxu_breg_q[50]; + + assign fxu_areg_n_q[51] = ~fxu_areg_q[51]; + assign fxu_breg_n_q[51] = ~fxu_breg_q[51]; + + assign fxu_areg_n_q[52] = ~fxu_areg_q[52]; + assign fxu_breg_n_q[52] = ~fxu_breg_q[52]; + + assign fxu_areg_n_q[53] = ~fxu_areg_q[53]; + assign fxu_breg_n_q[53] = ~fxu_breg_q[53]; + + assign fxu_areg_n_q[54] = ~fxu_areg_q[54]; + assign fxu_breg_n_q[54] = ~fxu_breg_q[54]; + + assign fxu_areg_n_q[55] = ~fxu_areg_q[55]; + assign fxu_breg_n_q[55] = ~fxu_breg_q[55]; + + assign fxu_areg_n_q[56] = ~fxu_areg_q[56]; + assign fxu_breg_n_q[56] = ~fxu_breg_q[56]; + + assign fxu_areg_n_q[57] = ~fxu_areg_q[57]; + assign fxu_breg_n_q[57] = ~fxu_breg_q[57]; + + assign fxu_areg_n_q[58] = ~fxu_areg_q[58]; + assign fxu_breg_n_q[58] = ~fxu_breg_q[58]; + + assign fxu_areg_n_q[59] = ~fxu_areg_q[59]; + assign fxu_breg_n_q[59] = ~fxu_breg_q[59]; + + assign fxu_areg_n_q[60] = ~fxu_areg_q[60]; + assign fxu_breg_n_q[60] = ~fxu_breg_q[60]; + + assign fxu_areg_n_q[61] = ~fxu_areg_q[61]; + assign fxu_breg_n_q[61] = ~fxu_breg_q[61]; + + assign fxu_areg_n_q[62] = ~fxu_areg_q[62]; + assign fxu_breg_n_q[62] = ~fxu_breg_q[62]; + + assign fxu_areg_n_q[63] = ~fxu_areg_q[63]; + assign fxu_breg_n_q[63] = ~fxu_breg_q[63]; + + assign a[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0]; + assign a[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+1]; + assign a[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+2]; + assign a[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+3]; + assign a[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+4]; + assign a[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+5]; + assign a[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+6]; + assign a[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+7]; + assign a_n[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0]; + assign a_n[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+1]; + assign a_n[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+2]; + assign a_n[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+3]; + assign a_n[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+4]; + assign a_n[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+5]; + assign a_n[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+6]; + assign a_n[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+7]; + + assign a[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1]; + assign a[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+1]; + assign a[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+2]; + assign a[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+3]; + assign a[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+4]; + assign a[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+5]; + assign a[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+6]; + assign a[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+7]; + assign a_n[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1]; + assign a_n[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+1]; + assign a_n[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+2]; + assign a_n[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+3]; + assign a_n[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+4]; + assign a_n[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+5]; + assign a_n[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+6]; + assign a_n[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+7]; + + assign a[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2]; + assign a[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+1]; + assign a[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+2]; + assign a[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+3]; + assign a[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+4]; + assign a[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+5]; + assign a[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+6]; + assign a[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+7]; + assign a_n[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2]; + assign a_n[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+1]; + assign a_n[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+2]; + assign a_n[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+3]; + assign a_n[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+4]; + assign a_n[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+5]; + assign a_n[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+6]; + assign a_n[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+7]; + + assign a[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3]; + assign a[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+1]; + assign a[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+2]; + assign a[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+3]; + assign a[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+4]; + assign a[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+5]; + assign a[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+6]; + assign a[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+7]; + assign a_n[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3]; + assign a_n[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+1]; + assign a_n[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+2]; + assign a_n[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+3]; + assign a_n[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+4]; + assign a_n[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+5]; + assign a_n[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+6]; + assign a_n[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+7]; + + assign a[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4]; + assign a[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+1]; + assign a[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+2]; + assign a[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+3]; + assign a[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+4]; + assign a[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+5]; + assign a[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+6]; + assign a[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+7]; + assign a_n[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4]; + assign a_n[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+1]; + assign a_n[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+2]; + assign a_n[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+3]; + assign a_n[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+4]; + assign a_n[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+5]; + assign a_n[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+6]; + assign a_n[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+7]; + + assign a[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5]; + assign a[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+1]; + assign a[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+2]; + assign a[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+3]; + assign a[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+4]; + assign a[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+5]; + assign a[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+6]; + assign a[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+7]; + assign a_n[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5]; + assign a_n[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+1]; + assign a_n[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+2]; + assign a_n[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+3]; + assign a_n[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+4]; + assign a_n[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+5]; + assign a_n[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+6]; + assign a_n[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+7]; + + assign a[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6]; + assign a[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+1]; + assign a[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+2]; + assign a[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+3]; + assign a[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+4]; + assign a[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+5]; + assign a[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+6]; + assign a[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+7]; + assign a_n[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6]; + assign a_n[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+1]; + assign a_n[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+2]; + assign a_n[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+3]; + assign a_n[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+4]; + assign a_n[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+5]; + assign a_n[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+6]; + assign a_n[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+7]; + + assign a[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7]; + assign a[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+1]; + assign a[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+2]; + assign a[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+3]; + assign a[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+4]; + assign a[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+5]; + assign a[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+6]; + assign a[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+7]; + assign a_n[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7]; + assign a_n[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+1]; + assign a_n[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+2]; + assign a_n[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+3]; + assign a_n[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+4]; + assign a_n[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+5]; + assign a_n[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+6]; + assign a_n[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+7]; + + + assign b[8*0] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0] : fxu_breg_q[8*0]; + assign b[8*0+1] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+1] : fxu_breg_q[8*0+1]; + assign b[8*0+2] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+2] : fxu_breg_q[8*0+2]; + assign b[8*0+3] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+3] : fxu_breg_q[8*0+3]; + assign b[8*0+4] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+4] : fxu_breg_q[8*0+4]; + assign b[8*0+5] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+5] : fxu_breg_q[8*0+5]; + assign b[8*0+6] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+6] : fxu_breg_q[8*0+6]; + assign b[8*0+7] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+7] : fxu_breg_q[8*0+7]; + assign b_n[8*0] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0] : fxu_breg_n_q[8*0]; + assign b_n[8*0+1] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+1] : fxu_breg_n_q[8*0+1]; + assign b_n[8*0+2] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+2] : fxu_breg_n_q[8*0+2]; + assign b_n[8*0+3] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+3] : fxu_breg_n_q[8*0+3]; + assign b_n[8*0+4] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+4] : fxu_breg_n_q[8*0+4]; + assign b_n[8*0+5] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+5] : fxu_breg_n_q[8*0+5]; + assign b_n[8*0+6] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+6] : fxu_breg_n_q[8*0+6]; + assign b_n[8*0+7] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+7] : fxu_breg_n_q[8*0+7]; + + assign b[8*1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1] : fxu_breg_q[8*1]; + assign b[8*1+1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+1] : fxu_breg_q[8*1+1]; + assign b[8*1+2] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+2] : fxu_breg_q[8*1+2]; + assign b[8*1+3] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+3] : fxu_breg_q[8*1+3]; + assign b[8*1+4] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+4] : fxu_breg_q[8*1+4]; + assign b[8*1+5] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+5] : fxu_breg_q[8*1+5]; + assign b[8*1+6] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+6] : fxu_breg_q[8*1+6]; + assign b[8*1+7] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+7] : fxu_breg_q[8*1+7]; + assign b_n[8*1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1] : fxu_breg_n_q[8*1]; + assign b_n[8*1+1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+1] : fxu_breg_n_q[8*1+1]; + assign b_n[8*1+2] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+2] : fxu_breg_n_q[8*1+2]; + assign b_n[8*1+3] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+3] : fxu_breg_n_q[8*1+3]; + assign b_n[8*1+4] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+4] : fxu_breg_n_q[8*1+4]; + assign b_n[8*1+5] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+5] : fxu_breg_n_q[8*1+5]; + assign b_n[8*1+6] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+6] : fxu_breg_n_q[8*1+6]; + assign b_n[8*1+7] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+7] : fxu_breg_n_q[8*1+7]; + + assign b[8*2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2] : fxu_breg_q[8*2]; + assign b[8*2+1] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+1] : fxu_breg_q[8*2+1]; + assign b[8*2+2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+2] : fxu_breg_q[8*2+2]; + assign b[8*2+3] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+3] : fxu_breg_q[8*2+3]; + assign b[8*2+4] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+4] : fxu_breg_q[8*2+4]; + assign b[8*2+5] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+5] : fxu_breg_q[8*2+5]; + assign b[8*2+6] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+6] : fxu_breg_q[8*2+6]; + assign b[8*2+7] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+7] : fxu_breg_q[8*2+7]; + assign b_n[8*2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2] : fxu_breg_n_q[8*2]; + assign b_n[8*2+1] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+1] : fxu_breg_n_q[8*2+1]; + assign b_n[8*2+2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+2] : fxu_breg_n_q[8*2+2]; + assign b_n[8*2+3] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+3] : fxu_breg_n_q[8*2+3]; + assign b_n[8*2+4] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+4] : fxu_breg_n_q[8*2+4]; + assign b_n[8*2+5] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+5] : fxu_breg_n_q[8*2+5]; + assign b_n[8*2+6] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+6] : fxu_breg_n_q[8*2+6]; + assign b_n[8*2+7] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+7] : fxu_breg_n_q[8*2+7]; + + assign b[8*3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3] : fxu_breg_q[8*3]; + assign b[8*3+1] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+1] : fxu_breg_q[8*3+1]; + assign b[8*3+2] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+2] : fxu_breg_q[8*3+2]; + assign b[8*3+3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+3] : fxu_breg_q[8*3+3]; + assign b[8*3+4] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+4] : fxu_breg_q[8*3+4]; + assign b[8*3+5] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+5] : fxu_breg_q[8*3+5]; + assign b[8*3+6] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+6] : fxu_breg_q[8*3+6]; + assign b[8*3+7] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+7] : fxu_breg_q[8*3+7]; + assign b_n[8*3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3] : fxu_breg_n_q[8*3]; + assign b_n[8*3+1] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+1] : fxu_breg_n_q[8*3+1]; + assign b_n[8*3+2] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+2] : fxu_breg_n_q[8*3+2]; + assign b_n[8*3+3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+3] : fxu_breg_n_q[8*3+3]; + assign b_n[8*3+4] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+4] : fxu_breg_n_q[8*3+4]; + assign b_n[8*3+5] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+5] : fxu_breg_n_q[8*3+5]; + assign b_n[8*3+6] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+6] : fxu_breg_n_q[8*3+6]; + assign b_n[8*3+7] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+7] : fxu_breg_n_q[8*3+7]; + + assign b[8*6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6] : fxu_breg_q[8*6]; + assign b[8*6+1] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+1] : fxu_breg_q[8*6+1]; + assign b[8*6+2] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+2] : fxu_breg_q[8*6+2]; + assign b[8*6+3] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+3] : (local_error_found) ? fxu_breg_q[8*6+3] : fxu_breg_q[8*6+2]; + assign b[8*6+4] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+4] : fxu_breg_q[8*6+4]; + assign b[8*6+5] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+5] : fxu_breg_q[8*6+5]; + assign b[8*6+6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+6] : fxu_breg_q[8*6+6]; + assign b[8*6+7] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+7] : fxu_breg_q[8*6+7]; + assign b_n[8*6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6] : fxu_breg_n_q[8*6]; + assign b_n[8*6+1] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+1] : fxu_breg_n_q[8*6+1]; + assign b_n[8*6+2] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+2] : fxu_breg_n_q[8*6+2]; + assign b_n[8*6+3] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+3] : fxu_breg_n_q[8*6+3]; + assign b_n[8*6+4] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+4] : fxu_breg_n_q[8*6+4]; + assign b_n[8*6+5] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+5] : fxu_breg_n_q[8*6+5]; + assign b_n[8*6+6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+6] : fxu_breg_n_q[8*6+6]; + assign b_n[8*6+7] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+7] : fxu_breg_n_q[8*6+7]; + + assign b[8*7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7] : fxu_breg_q[8*7]; + assign b[8*7+1] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+1] : fxu_breg_q[8*7+1]; + assign b[8*7+2] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+2] : fxu_breg_q[8*7+2]; + assign b[8*7+3] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+3] : (local_error_found) ? fxu_breg_q[8*7+3] : fxu_breg_q[8*7+2]; + assign b[8*7+4] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+4] : fxu_breg_q[8*7+4]; + assign b[8*7+5] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+5] : fxu_breg_q[8*7+5]; + assign b[8*7+6] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+6] : fxu_breg_q[8*7+6]; + assign b[8*7+7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+7] : fxu_breg_q[8*7+7]; + assign b_n[8*7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7] : fxu_breg_n_q[8*7]; + assign b_n[8*7+1] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+1] : fxu_breg_n_q[8*7+1]; + assign b_n[8*7+2] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+2] : fxu_breg_n_q[8*7+2]; + assign b_n[8*7+3] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+3] : fxu_breg_n_q[8*7+3]; + assign b_n[8*7+4] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+4] : fxu_breg_n_q[8*7+4]; + assign b_n[8*7+5] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+5] : fxu_breg_n_q[8*7+5]; + assign b_n[8*7+6] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+6] : fxu_breg_n_q[8*7+6]; + assign b_n[8*7+7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+7] : fxu_breg_n_q[8*7+7]; + + assign b[8*4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4] : (bin_add_45_q) ? fxu_breg_q[8*4] : 1'b0; + assign b[8*4+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+1] : (bin_add_45_q) ? fxu_breg_q[8*4+1] : 1'b0; + assign b[8*4+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+2] : (bin_add_45_q) ? fxu_breg_q[8*4+2] : 1'b0; + assign b[8*4+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+3] : (bin_add_45_q) ? fxu_breg_q[8*4+3] : 1'b0; + assign b[8*4+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+4] : (bin_add_45_q) ? fxu_breg_q[8*4+4] : 1'b0; + assign b[8*4+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+5] : (bin_add_45_q) ? fxu_breg_q[8*4+5] : 1'b0; + assign b[8*4+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+6] : (bin_add_45_q) ? fxu_breg_q[8*4+6] : 1'b0; + assign b[8*4+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+7] : (bin_add_45_q) ? fxu_breg_q[8*4+7] : 1'b0; + assign b_n[8*4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4] : (bin_add_45_q) ? fxu_breg_n_q[8*4] : 1'b0; + assign b_n[8*4+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+1] : (bin_add_45_q) ? fxu_breg_n_q[8*4+1] : 1'b0; + assign b_n[8*4+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+2] : (bin_add_45_q) ? fxu_breg_n_q[8*4+2] : 1'b0; + assign b_n[8*4+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+3] : (bin_add_45_q) ? fxu_breg_n_q[8*4+3] : 1'b0; + assign b_n[8*4+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+4] : (bin_add_45_q) ? fxu_breg_n_q[8*4+4] : 1'b0; + assign b_n[8*4+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+5] : (bin_add_45_q) ? fxu_breg_n_q[8*4+5] : 1'b0; + assign b_n[8*4+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+6] : (bin_add_45_q) ? fxu_breg_n_q[8*4+6] : 1'b0; + assign b_n[8*4+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+7] : (bin_add_45_q) ? fxu_breg_n_q[8*4+7] : 1'b0; + + assign b[8*5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5] : (bin_add_45_q) ? fxu_breg_q[8*5] : 1'b0; + assign b[8*5+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+1] : (bin_add_45_q) ? fxu_breg_q[8*5+1] : 1'b0; + assign b[8*5+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+2] : (bin_add_45_q) ? fxu_breg_q[8*5+2] : 1'b0; + assign b[8*5+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+3] : (bin_add_45_q) ? fxu_breg_q[8*5+3] : 1'b0; + assign b[8*5+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+4] : (bin_add_45_q) ? fxu_breg_q[8*5+4] : 1'b0; + assign b[8*5+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+5] : (bin_add_45_q) ? fxu_breg_q[8*5+5] : 1'b0; + assign b[8*5+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+6] : (bin_add_45_q) ? fxu_breg_q[8*5+6] : 1'b0; + assign b[8*5+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+7] : (bin_add_45_q) ? fxu_breg_q[8*5+7] : 1'b0; + assign b_n[8*5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5] : (bin_add_45_q) ? fxu_breg_n_q[8*5] : 1'b0; + assign b_n[8*5+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+1] : (bin_add_45_q) ? fxu_breg_n_q[8*5+1] : 1'b0; + assign b_n[8*5+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+2] : (bin_add_45_q) ? fxu_breg_n_q[8*5+2] : 1'b0; + assign b_n[8*5+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+3] : (bin_add_45_q) ? fxu_breg_n_q[8*5+3] : 1'b0; + assign b_n[8*5+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+4] : (bin_add_45_q) ? fxu_breg_n_q[8*5+4] : 1'b0; + assign b_n[8*5+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+5] : (bin_add_45_q) ? fxu_breg_n_q[8*5+5] : 1'b0; + assign b_n[8*5+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+6] : (bin_add_45_q) ? fxu_breg_n_q[8*5+6] : 1'b0; + assign b_n[8*5+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+7] : (bin_add_45_q) ? fxu_breg_n_q[8*5+7] : 1'b0; + + assign c[64] = bin_cin_q; + assign c_n[64] = (~bin_cin_q); + + assign bruce_bin_sum[0] = (b_n[0] & a_n[0] & c[0+1]) | (b_n[0] & a[0] & c_n[0+1]) | (b[0] & a_n[0] & c_n[0+1]) | (b[0] & a[0] & c[0+1]); + assign p[0] = a[0] | b[0]; + assign p_n[0] = ~p[0]; + assign g[0] = a[0] & b[0]; + assign h_n[0] = g[0] | p_n[0]; + + assign bruce_bin_sum[1] = (b_n[1] & a_n[1] & c[1+1]) | (b_n[1] & a[1] & c_n[1+1]) | (b[1] & a_n[1] & c_n[1+1]) | (b[1] & a[1] & c[1+1]); + assign p[1] = a[1] | b[1]; + assign p_n[1] = ~p[1]; + assign g[1] = a[1] & b[1]; + assign h_n[1] = g[1] | p_n[1]; + + assign bruce_bin_sum[2] = (b_n[2] & a_n[2] & c[2+1]) | (b_n[2] & a[2] & c_n[2+1]) | (b[2] & a_n[2] & c_n[2+1]) | (b[2] & a[2] & c[2+1]); + assign p[2] = a[2] | b[2]; + assign p_n[2] = ~p[2]; + assign g[2] = a[2] & b[2]; + assign h_n[2] = g[2] | p_n[2]; + + assign bruce_bin_sum[3] = (b_n[3] & a_n[3] & c[3+1]) | (b_n[3] & a[3] & c_n[3+1]) | (b[3] & a_n[3] & c_n[3+1]) | (b[3] & a[3] & c[3+1]); + assign p[3] = a[3] | b[3]; + assign p_n[3] = ~p[3]; + assign g[3] = a[3] & b[3]; + assign h_n[3] = g[3] | p_n[3]; + + assign bruce_bin_sum[4] = (b_n[4] & a_n[4] & c[4+1]) | (b_n[4] & a[4] & c_n[4+1]) | (b[4] & a_n[4] & c_n[4+1]) | (b[4] & a[4] & c[4+1]); + assign p[4] = a[4] | b[4]; + assign p_n[4] = ~p[4]; + assign g[4] = a[4] & b[4]; + assign h_n[4] = g[4] | p_n[4]; + + assign bruce_bin_sum[5] = (b_n[5] & a_n[5] & c[5+1]) | (b_n[5] & a[5] & c_n[5+1]) | (b[5] & a_n[5] & c_n[5+1]) | (b[5] & a[5] & c[5+1]); + assign p[5] = a[5] | b[5]; + assign p_n[5] = ~p[5]; + assign g[5] = a[5] & b[5]; + assign h_n[5] = g[5] | p_n[5]; + + assign bruce_bin_sum[6] = (b_n[6] & a_n[6] & c[6+1]) | (b_n[6] & a[6] & c_n[6+1]) | (b[6] & a_n[6] & c_n[6+1]) | (b[6] & a[6] & c[6+1]); + assign p[6] = a[6] | b[6]; + assign p_n[6] = ~p[6]; + assign g[6] = a[6] & b[6]; + assign h_n[6] = g[6] | p_n[6]; + + assign bruce_bin_sum[7] = (b_n[7] & a_n[7] & c[7+1]) | (b_n[7] & a[7] & c_n[7+1]) | (b[7] & a_n[7] & c_n[7+1]) | (b[7] & a[7] & c[7+1]); + assign p[7] = a[7] | b[7]; + assign p_n[7] = ~p[7]; + assign g[7] = a[7] & b[7]; + assign h_n[7] = g[7] | p_n[7]; + + assign bruce_bin_sum[8] = (b_n[8] & a_n[8] & c[8+1]) | (b_n[8] & a[8] & c_n[8+1]) | (b[8] & a_n[8] & c_n[8+1]) | (b[8] & a[8] & c[8+1]); + assign p[8] = a[8] | b[8]; + assign p_n[8] = ~p[8]; + assign g[8] = a[8] & b[8]; + assign h_n[8] = g[8] | p_n[8]; + + assign bruce_bin_sum[9] = (b_n[9] & a_n[9] & c[9+1]) | (b_n[9] & a[9] & c_n[9+1]) | (b[9] & a_n[9] & c_n[9+1]) | (b[9] & a[9] & c[9+1]); + assign p[9] = a[9] | b[9]; + assign p_n[9] = ~p[9]; + assign g[9] = a[9] & b[9]; + assign h_n[9] = g[9] | p_n[9]; + + assign bruce_bin_sum[10] = (b_n[10] & a_n[10] & c[10+1]) | (b_n[10] & a[10] & c_n[10+1]) | (b[10] & a_n[10] & c_n[10+1]) | (b[10] & a[10] & c[10+1]); + assign p[10] = a[10] | b[10]; + assign p_n[10] = ~p[10]; + assign g[10] = a[10] & b[10]; + assign h_n[10] = g[10] | p_n[10]; + + assign bruce_bin_sum[11] = (b_n[11] & a_n[11] & c[11+1]) | (b_n[11] & a[11] & c_n[11+1]) | (b[11] & a_n[11] & c_n[11+1]) | (b[11] & a[11] & c[11+1]); + assign p[11] = a[11] | b[11]; + assign p_n[11] = ~p[11]; + assign g[11] = a[11] & b[11]; + assign h_n[11] = g[11] | p_n[11]; + + assign bruce_bin_sum[12] = (b_n[12] & a_n[12] & c[12+1]) | (b_n[12] & a[12] & c_n[12+1]) | (b[12] & a_n[12] & c_n[12+1]) | (b[12] & a[12] & c[12+1]); + assign p[12] = a[12] | b[12]; + assign p_n[12] = ~p[12]; + assign g[12] = a[12] & b[12]; + assign h_n[12] = g[12] | p_n[12]; + + assign bruce_bin_sum[13] = (b_n[13] & a_n[13] & c[13+1]) | (b_n[13] & a[13] & c_n[13+1]) | (b[13] & a_n[13] & c_n[13+1]) | (b[13] & a[13] & c[13+1]); + assign p[13] = a[13] | b[13]; + assign p_n[13] = ~p[13]; + assign g[13] = a[13] & b[13]; + assign h_n[13] = g[13] | p_n[13]; + + assign bruce_bin_sum[14] = (b_n[14] & a_n[14] & c[14+1]) | (b_n[14] & a[14] & c_n[14+1]) | (b[14] & a_n[14] & c_n[14+1]) | (b[14] & a[14] & c[14+1]); + assign p[14] = a[14] | b[14]; + assign p_n[14] = ~p[14]; + assign g[14] = a[14] & b[14]; + assign h_n[14] = g[14] | p_n[14]; + + assign bruce_bin_sum[15] = (b_n[15] & a_n[15] & c[15+1]) | (b_n[15] & a[15] & c_n[15+1]) | (b[15] & a_n[15] & c_n[15+1]) | (b[15] & a[15] & c[15+1]); + assign p[15] = a[15] | b[15]; + assign p_n[15] = ~p[15]; + assign g[15] = a[15] & b[15]; + assign h_n[15] = g[15] | p_n[15]; + + assign bruce_bin_sum[16] = (b_n[16] & a_n[16] & c[16+1]) | (b_n[16] & a[16] & c_n[16+1]) | (b[16] & a_n[16] & c_n[16+1]) | (b[16] & a[16] & c[16+1]); + assign p[16] = a[16] | b[16]; + assign p_n[16] = ~p[16]; + assign g[16] = a[16] & b[16]; + assign h_n[16] = g[16] | p_n[16]; + + assign bruce_bin_sum[17] = (b_n[17] & a_n[17] & c[17+1]) | (b_n[17] & a[17] & c_n[17+1]) | (b[17] & a_n[17] & c_n[17+1]) | (b[17] & a[17] & c[17+1]); + assign p[17] = a[17] | b[17]; + assign p_n[17] = ~p[17]; + assign g[17] = a[17] & b[17]; + assign h_n[17] = g[17] | p_n[17]; + + assign bruce_bin_sum[18] = (b_n[18] & a_n[18] & c[18+1]) | (b_n[18] & a[18] & c_n[18+1]) | (b[18] & a_n[18] & c_n[18+1]) | (b[18] & a[18] & c[18+1]); + assign p[18] = a[18] | b[18]; + assign p_n[18] = ~p[18]; + assign g[18] = a[18] & b[18]; + assign h_n[18] = g[18] | p_n[18]; + + assign bruce_bin_sum[19] = (b_n[19] & a_n[19] & c[19+1]) | (b_n[19] & a[19] & c_n[19+1]) | (b[19] & a_n[19] & c_n[19+1]) | (b[19] & a[19] & c[19+1]); + assign p[19] = a[19] | b[19]; + assign p_n[19] = ~p[19]; + assign g[19] = a[19] & b[19]; + assign h_n[19] = g[19] | p_n[19]; + + assign bruce_bin_sum[20] = (b_n[20] & a_n[20] & c[20+1]) | (b_n[20] & a[20] & c_n[20+1]) | (b[20] & a_n[20] & c_n[20+1]) | (b[20] & a[20] & c[20+1]); + assign p[20] = a[20] | b[20]; + assign p_n[20] = ~p[20]; + assign g[20] = a[20] & b[20]; + assign h_n[20] = g[20] | p_n[20]; + + assign bruce_bin_sum[21] = (b_n[21] & a_n[21] & c[21+1]) | (b_n[21] & a[21] & c_n[21+1]) | (b[21] & a_n[21] & c_n[21+1]) | (b[21] & a[21] & c[21+1]); + assign p[21] = a[21] | b[21]; + assign p_n[21] = ~p[21]; + assign g[21] = a[21] & b[21]; + assign h_n[21] = g[21] | p_n[21]; + + assign bruce_bin_sum[22] = (b_n[22] & a_n[22] & c[22+1]) | (b_n[22] & a[22] & c_n[22+1]) | (b[22] & a_n[22] & c_n[22+1]) | (b[22] & a[22] & c[22+1]); + assign p[22] = a[22] | b[22]; + assign p_n[22] = ~p[22]; + assign g[22] = a[22] & b[22]; + assign h_n[22] = g[22] | p_n[22]; + + assign bruce_bin_sum[23] = (b_n[23] & a_n[23] & c[23+1]) | (b_n[23] & a[23] & c_n[23+1]) | (b[23] & a_n[23] & c_n[23+1]) | (b[23] & a[23] & c[23+1]); + assign p[23] = a[23] | b[23]; + assign p_n[23] = ~p[23]; + assign g[23] = a[23] & b[23]; + assign h_n[23] = g[23] | p_n[23]; + + assign bruce_bin_sum[24] = (b_n[24] & a_n[24] & c[24+1]) | (b_n[24] & a[24] & c_n[24+1]) | (b[24] & a_n[24] & c_n[24+1]) | (b[24] & a[24] & c[24+1]); + assign p[24] = a[24] | b[24]; + assign p_n[24] = ~p[24]; + assign g[24] = a[24] & b[24]; + assign h_n[24] = g[24] | p_n[24]; + + assign bruce_bin_sum[25] = (b_n[25] & a_n[25] & c[25+1]) | (b_n[25] & a[25] & c_n[25+1]) | (b[25] & a_n[25] & c_n[25+1]) | (b[25] & a[25] & c[25+1]); + assign p[25] = a[25] | b[25]; + assign p_n[25] = ~p[25]; + assign g[25] = a[25] & b[25]; + assign h_n[25] = g[25] | p_n[25]; + + assign bruce_bin_sum[26] = (b_n[26] & a_n[26] & c[26+1]) | (b_n[26] & a[26] & c_n[26+1]) | (b[26] & a_n[26] & c_n[26+1]) | (b[26] & a[26] & c[26+1]); + assign p[26] = a[26] | b[26]; + assign p_n[26] = ~p[26]; + assign g[26] = a[26] & b[26]; + assign h_n[26] = g[26] | p_n[26]; + + assign bruce_bin_sum[27] = (b_n[27] & a_n[27] & c[27+1]) | (b_n[27] & a[27] & c_n[27+1]) | (b[27] & a_n[27] & c_n[27+1]) | (b[27] & a[27] & c[27+1]); + assign p[27] = a[27] | b[27]; + assign p_n[27] = ~p[27]; + assign g[27] = a[27] & b[27]; + assign h_n[27] = g[27] | p_n[27]; + + assign bruce_bin_sum[28] = (b_n[28] & a_n[28] & c[28+1]) | (b_n[28] & a[28] & c_n[28+1]) | (b[28] & a_n[28] & c_n[28+1]) | (b[28] & a[28] & c[28+1]); + assign p[28] = a[28] | b[28]; + assign p_n[28] = ~p[28]; + assign g[28] = a[28] & b[28]; + assign h_n[28] = g[28] | p_n[28]; + + assign bruce_bin_sum[29] = (b_n[29] & a_n[29] & c[29+1]) | (b_n[29] & a[29] & c_n[29+1]) | (b[29] & a_n[29] & c_n[29+1]) | (b[29] & a[29] & c[29+1]); + assign p[29] = a[29] | b[29]; + assign p_n[29] = ~p[29]; + assign g[29] = a[29] & b[29]; + assign h_n[29] = g[29] | p_n[29]; + + assign bruce_bin_sum[30] = (b_n[30] & a_n[30] & c[30+1]) | (b_n[30] & a[30] & c_n[30+1]) | (b[30] & a_n[30] & c_n[30+1]) | (b[30] & a[30] & c[30+1]); + assign p[30] = a[30] | b[30]; + assign p_n[30] = ~p[30]; + assign g[30] = a[30] & b[30]; + assign h_n[30] = g[30] | p_n[30]; + + assign bruce_bin_sum[31] = (b_n[31] & a_n[31] & c[31+1]) | (b_n[31] & a[31] & c_n[31+1]) | (b[31] & a_n[31] & c_n[31+1]) | (b[31] & a[31] & c[31+1]); + assign p[31] = a[31] | b[31]; + assign p_n[31] = ~p[31]; + assign g[31] = a[31] & b[31]; + assign h_n[31] = g[31] | p_n[31]; + + assign bruce_bin_sum[32] = (b_n[32] & a_n[32] & c[32+1]) | (b_n[32] & a[32] & c_n[32+1]) | (b[32] & a_n[32] & c_n[32+1]) | (b[32] & a[32] & c[32+1]); + assign p[32] = a[32] | b[32]; + assign p_n[32] = ~p[32]; + assign g[32] = a[32] & b[32]; + assign h_n[32] = g[32] | p_n[32]; + + assign bruce_bin_sum[33] = (b_n[33] & a_n[33] & c[33+1]) | (b_n[33] & a[33] & c_n[33+1]) | (b[33] & a_n[33] & c_n[33+1]) | (b[33] & a[33] & c[33+1]); + assign p[33] = a[33] | b[33]; + assign p_n[33] = ~p[33]; + assign g[33] = a[33] & b[33]; + assign h_n[33] = g[33] | p_n[33]; + + assign bruce_bin_sum[34] = (b_n[34] & a_n[34] & c[34+1]) | (b_n[34] & a[34] & c_n[34+1]) | (b[34] & a_n[34] & c_n[34+1]) | (b[34] & a[34] & c[34+1]); + assign p[34] = a[34] | b[34]; + assign p_n[34] = ~p[34]; + assign g[34] = a[34] & b[34]; + assign h_n[34] = g[34] | p_n[34]; + + assign bruce_bin_sum[35] = (b_n[35] & a_n[35] & c[35+1]) | (b_n[35] & a[35] & c_n[35+1]) | (b[35] & a_n[35] & c_n[35+1]) | (b[35] & a[35] & c[35+1]); + assign p[35] = a[35] | b[35]; + assign p_n[35] = ~p[35]; + assign g[35] = a[35] & b[35]; + assign h_n[35] = g[35] | p_n[35]; + + assign bruce_bin_sum[36] = (b_n[36] & a_n[36] & c[36+1]) | (b_n[36] & a[36] & c_n[36+1]) | (b[36] & a_n[36] & c_n[36+1]) | (b[36] & a[36] & c[36+1]); + assign p[36] = a[36] | b[36]; + assign p_n[36] = ~p[36]; + assign g[36] = a[36] & b[36]; + assign h_n[36] = g[36] | p_n[36]; + + assign bruce_bin_sum[37] = (b_n[37] & a_n[37] & c[37+1]) | (b_n[37] & a[37] & c_n[37+1]) | (b[37] & a_n[37] & c_n[37+1]) | (b[37] & a[37] & c[37+1]); + assign p[37] = a[37] | b[37]; + assign p_n[37] = ~p[37]; + assign g[37] = a[37] & b[37]; + assign h_n[37] = g[37] | p_n[37]; + + assign bruce_bin_sum[38] = (b_n[38] & a_n[38] & c[38+1]) | (b_n[38] & a[38] & c_n[38+1]) | (b[38] & a_n[38] & c_n[38+1]) | (b[38] & a[38] & c[38+1]); + assign p[38] = a[38] | b[38]; + assign p_n[38] = ~p[38]; + assign g[38] = a[38] & b[38]; + assign h_n[38] = g[38] | p_n[38]; + + assign bruce_bin_sum[39] = (b_n[39] & a_n[39] & c[39+1]) | (b_n[39] & a[39] & c_n[39+1]) | (b[39] & a_n[39] & c_n[39+1]) | (b[39] & a[39] & c[39+1]); + assign p[39] = a[39] | b[39]; + assign p_n[39] = ~p[39]; + assign g[39] = a[39] & b[39]; + assign h_n[39] = g[39] | p_n[39]; + + assign bruce_bin_sum[40] = (b_n[40] & a_n[40] & c[40+1]) | (b_n[40] & a[40] & c_n[40+1]) | (b[40] & a_n[40] & c_n[40+1]) | (b[40] & a[40] & c[40+1]); + assign p[40] = a[40] | b[40]; + assign p_n[40] = ~p[40]; + assign g[40] = a[40] & b[40]; + assign h_n[40] = g[40] | p_n[40]; + + assign bruce_bin_sum[41] = (b_n[41] & a_n[41] & c[41+1]) | (b_n[41] & a[41] & c_n[41+1]) | (b[41] & a_n[41] & c_n[41+1]) | (b[41] & a[41] & c[41+1]); + assign p[41] = a[41] | b[41]; + assign p_n[41] = ~p[41]; + assign g[41] = a[41] & b[41]; + assign h_n[41] = g[41] | p_n[41]; + + assign bruce_bin_sum[42] = (b_n[42] & a_n[42] & c[42+1]) | (b_n[42] & a[42] & c_n[42+1]) | (b[42] & a_n[42] & c_n[42+1]) | (b[42] & a[42] & c[42+1]); + assign p[42] = a[42] | b[42]; + assign p_n[42] = ~p[42]; + assign g[42] = a[42] & b[42]; + assign h_n[42] = g[42] | p_n[42]; + + assign bruce_bin_sum[43] = (b_n[43] & a_n[43] & c[43+1]) | (b_n[43] & a[43] & c_n[43+1]) | (b[43] & a_n[43] & c_n[43+1]) | (b[43] & a[43] & c[43+1]); + assign p[43] = a[43] | b[43]; + assign p_n[43] = ~p[43]; + assign g[43] = a[43] & b[43]; + assign h_n[43] = g[43] | p_n[43]; + + assign bruce_bin_sum[44] = (b_n[44] & a_n[44] & c[44+1]) | (b_n[44] & a[44] & c_n[44+1]) | (b[44] & a_n[44] & c_n[44+1]) | (b[44] & a[44] & c[44+1]); + assign p[44] = a[44] | b[44]; + assign p_n[44] = ~p[44]; + assign g[44] = a[44] & b[44]; + assign h_n[44] = g[44] | p_n[44]; + + assign bruce_bin_sum[45] = (b_n[45] & a_n[45] & c[45+1]) | (b_n[45] & a[45] & c_n[45+1]) | (b[45] & a_n[45] & c_n[45+1]) | (b[45] & a[45] & c[45+1]); + assign p[45] = a[45] | b[45]; + assign p_n[45] = ~p[45]; + assign g[45] = a[45] & b[45]; + assign h_n[45] = g[45] | p_n[45]; + + assign bruce_bin_sum[46] = (b_n[46] & a_n[46] & c[46+1]) | (b_n[46] & a[46] & c_n[46+1]) | (b[46] & a_n[46] & c_n[46+1]) | (b[46] & a[46] & c[46+1]); + assign p[46] = a[46] | b[46]; + assign p_n[46] = ~p[46]; + assign g[46] = a[46] & b[46]; + assign h_n[46] = g[46] | p_n[46]; + + assign bruce_bin_sum[47] = (b_n[47] & a_n[47] & c[47+1]) | (b_n[47] & a[47] & c_n[47+1]) | (b[47] & a_n[47] & c_n[47+1]) | (b[47] & a[47] & c[47+1]); + assign p[47] = a[47] | b[47]; + assign p_n[47] = ~p[47]; + assign g[47] = a[47] & b[47]; + assign h_n[47] = g[47] | p_n[47]; + + assign bruce_bin_sum[48] = (b_n[48] & a_n[48] & c[48+1]) | (b_n[48] & a[48] & c_n[48+1]) | (b[48] & a_n[48] & c_n[48+1]) | (b[48] & a[48] & c[48+1]); + assign p[48] = a[48] | b[48]; + assign p_n[48] = ~p[48]; + assign g[48] = a[48] & b[48]; + assign h_n[48] = g[48] | p_n[48]; + + assign bruce_bin_sum[49] = (b_n[49] & a_n[49] & c[49+1]) | (b_n[49] & a[49] & c_n[49+1]) | (b[49] & a_n[49] & c_n[49+1]) | (b[49] & a[49] & c[49+1]); + assign p[49] = a[49] | b[49]; + assign p_n[49] = ~p[49]; + assign g[49] = a[49] & b[49]; + assign h_n[49] = g[49] | p_n[49]; + + assign bruce_bin_sum[50] = (b_n[50] & a_n[50] & c[50+1]) | (b_n[50] & a[50] & c_n[50+1]) | (b[50] & a_n[50] & c_n[50+1]) | (b[50] & a[50] & c[50+1]); + assign p[50] = a[50] | b[50]; + assign p_n[50] = ~p[50]; + assign g[50] = a[50] & b[50]; + assign h_n[50] = g[50] | p_n[50]; + + assign bruce_bin_sum[51] = (b_n[51] & a_n[51] & c[51+1]) | (b_n[51] & a[51] & c_n[51+1]) | (b[51] & a_n[51] & c_n[51+1]) | (b[51] & a[51] & c[51+1]); + assign p[51] = a[51] | b[51]; + assign p_n[51] = ~p[51]; + assign g[51] = a[51] & b[51]; + assign h_n[51] = g[51] | p_n[51]; + + assign bruce_bin_sum[52] = (b_n[52] & a_n[52] & c[52+1]) | (b_n[52] & a[52] & c_n[52+1]) | (b[52] & a_n[52] & c_n[52+1]) | (b[52] & a[52] & c[52+1]); + assign p[52] = a[52] | b[52]; + assign p_n[52] = ~p[52]; + assign g[52] = a[52] & b[52]; + assign h_n[52] = g[52] | p_n[52]; + + assign bruce_bin_sum[53] = (b_n[53] & a_n[53] & c[53+1]) | (b_n[53] & a[53] & c_n[53+1]) | (b[53] & a_n[53] & c_n[53+1]) | (b[53] & a[53] & c[53+1]); + assign p[53] = a[53] | b[53]; + assign p_n[53] = ~p[53]; + assign g[53] = a[53] & b[53]; + assign h_n[53] = g[53] | p_n[53]; + + assign bruce_bin_sum[54] = (b_n[54] & a_n[54] & c[54+1]) | (b_n[54] & a[54] & c_n[54+1]) | (b[54] & a_n[54] & c_n[54+1]) | (b[54] & a[54] & c[54+1]); + assign p[54] = a[54] | b[54]; + assign p_n[54] = ~p[54]; + assign g[54] = a[54] & b[54]; + assign h_n[54] = g[54] | p_n[54]; + + assign bruce_bin_sum[55] = (b_n[55] & a_n[55] & c[55+1]) | (b_n[55] & a[55] & c_n[55+1]) | (b[55] & a_n[55] & c_n[55+1]) | (b[55] & a[55] & c[55+1]); + assign p[55] = a[55] | b[55]; + assign p_n[55] = ~p[55]; + assign g[55] = a[55] & b[55]; + assign h_n[55] = g[55] | p_n[55]; + + assign bruce_bin_sum[56] = (b_n[56] & a_n[56] & c[56+1]) | (b_n[56] & a[56] & c_n[56+1]) | (b[56] & a_n[56] & c_n[56+1]) | (b[56] & a[56] & c[56+1]); + assign p[56] = a[56] | b[56]; + assign p_n[56] = ~p[56]; + assign g[56] = a[56] & b[56]; + assign h_n[56] = g[56] | p_n[56]; + + assign bruce_bin_sum[57] = (b_n[57] & a_n[57] & c[57+1]) | (b_n[57] & a[57] & c_n[57+1]) | (b[57] & a_n[57] & c_n[57+1]) | (b[57] & a[57] & c[57+1]); + assign p[57] = a[57] | b[57]; + assign p_n[57] = ~p[57]; + assign g[57] = a[57] & b[57]; + assign h_n[57] = g[57] | p_n[57]; + + assign bruce_bin_sum[58] = (b_n[58] & a_n[58] & c[58+1]) | (b_n[58] & a[58] & c_n[58+1]) | (b[58] & a_n[58] & c_n[58+1]) | (b[58] & a[58] & c[58+1]); + assign p[58] = a[58] | b[58]; + assign p_n[58] = ~p[58]; + assign g[58] = a[58] & b[58]; + assign h_n[58] = g[58] | p_n[58]; + + assign bruce_bin_sum[59] = (b_n[59] & a_n[59] & c[59+1]) | (b_n[59] & a[59] & c_n[59+1]) | (b[59] & a_n[59] & c_n[59+1]) | (b[59] & a[59] & c[59+1]); + assign p[59] = a[59] | b[59]; + assign p_n[59] = ~p[59]; + assign g[59] = a[59] & b[59]; + assign h_n[59] = g[59] | p_n[59]; + + assign bruce_bin_sum[60] = (b_n[60] & a_n[60] & c[60+1]) | (b_n[60] & a[60] & c_n[60+1]) | (b[60] & a_n[60] & c_n[60+1]) | (b[60] & a[60] & c[60+1]); + assign p[60] = a[60] | b[60]; + assign p_n[60] = ~p[60]; + assign g[60] = a[60] & b[60]; + assign h_n[60] = g[60] | p_n[60]; + + assign bruce_bin_sum[61] = (b_n[61] & a_n[61] & c[61+1]) | (b_n[61] & a[61] & c_n[61+1]) | (b[61] & a_n[61] & c_n[61+1]) | (b[61] & a[61] & c[61+1]); + assign p[61] = a[61] | b[61]; + assign p_n[61] = ~p[61]; + assign g[61] = a[61] & b[61]; + assign h_n[61] = g[61] | p_n[61]; + + assign bruce_bin_sum[62] = (b_n[62] & a_n[62] & c[62+1]) | (b_n[62] & a[62] & c_n[62+1]) | (b[62] & a_n[62] & c_n[62+1]) | (b[62] & a[62] & c[62+1]); + assign p[62] = a[62] | b[62]; + assign p_n[62] = ~p[62]; + assign g[62] = a[62] & b[62]; + assign h_n[62] = g[62] | p_n[62]; + + assign bruce_bin_sum[63] = (b_n[63] & a_n[63] & c[63+1]) | (b_n[63] & a[63] & c_n[63+1]) | (b[63] & a_n[63] & c_n[63+1]) | (b[63] & a[63] & c[63+1]); + assign p[63] = a[63] | b[63]; + assign p_n[63] = ~p[63]; + assign g[63] = a[63] & b[63]; + assign h_n[63] = g[63] | p_n[63]; + + assign bin_sum[0:63] = (alu_cmd[0:3] == 4'b0010) ? bruce_bin_sum[0:63] + 2'b01 : bruce_bin_sum[0:63]; + + assign d[0] = h_n[0] ^ p[0+1]; + assign d[1] = h_n[1] ^ p[1+1]; + assign d[2] = h_n[2] ^ p[2+1]; + assign d[3] = h_n[3] ^ p[3+1]; + assign d[4] = h_n[4] ^ p[4+1]; + assign d[5] = h_n[5] ^ p[5+1]; + assign d[6] = h_n[6] ^ p[6+1]; + assign d[7] = h_n[7] ^ p[7+1]; + assign d[8] = h_n[8] ^ p[8+1]; + assign d[9] = h_n[9] ^ p[9+1]; + assign d[10] = h_n[10] ^ p[10+1]; + assign d[11] = h_n[11] ^ p[11+1]; + assign d[12] = h_n[12] ^ p[12+1]; + assign d[13] = h_n[13] ^ p[13+1]; + assign d[14] = h_n[14] ^ p[14+1]; + assign d[15] = h_n[15] ^ p[15+1]; + assign d[16] = h_n[16] ^ p[16+1]; + assign d[17] = h_n[17] ^ p[17+1]; + assign d[18] = h_n[18] ^ p[18+1]; + assign d[19] = h_n[19] ^ p[19+1]; + assign d[20] = h_n[20] ^ p[20+1]; + assign d[21] = h_n[21] ^ p[21+1]; + assign d[22] = h_n[22] ^ p[22+1]; + assign d[23] = h_n[23] ^ p[23+1]; + assign d[24] = h_n[24] ^ p[24+1]; + assign d[25] = h_n[25] ^ p[25+1]; + assign d[26] = h_n[26] ^ p[26+1]; + assign d[27] = h_n[27] ^ p[27+1]; + assign d[28] = h_n[28] ^ p[28+1]; + assign d[29] = h_n[29] ^ p[29+1]; + assign d[30] = h_n[30] ^ p[30+1]; + assign d[31] = h_n[31] ^ p[31+1]; + assign d[32] = h_n[32] ^ p[32+1]; + assign d[33] = h_n[33] ^ p[33+1]; + assign d[34] = h_n[34] ^ p[34+1]; + assign d[35] = h_n[35] ^ p[35+1]; + assign d[36] = h_n[36] ^ p[36+1]; + assign d[37] = h_n[37] ^ p[37+1]; + assign d[38] = h_n[38] ^ p[38+1]; + assign d[39] = h_n[39] ^ p[39+1]; + assign d[40] = h_n[40] ^ p[40+1]; + assign d[41] = h_n[41] ^ p[41+1]; + assign d[42] = h_n[42] ^ p[42+1]; + assign d[43] = h_n[43] ^ p[43+1]; + assign d[44] = h_n[44] ^ p[44+1]; + assign d[45] = h_n[45] ^ p[45+1]; + assign d[46] = h_n[46] ^ p[46+1]; + assign d[47] = h_n[47] ^ p[47+1]; + assign d[48] = h_n[48] ^ p[48+1]; + assign d[49] = h_n[49] ^ p[49+1]; + assign d[50] = h_n[50] ^ p[50+1]; + assign d[51] = h_n[51] ^ p[51+1]; + assign d[52] = h_n[52] ^ p[52+1]; + assign d[53] = h_n[53] ^ p[53+1]; + assign d[54] = h_n[54] ^ p[54+1]; + assign d[55] = h_n[55] ^ p[55+1]; + assign d[56] = h_n[56] ^ p[56+1]; + assign d[57] = h_n[57] ^ p[57+1]; + assign d[58] = h_n[58] ^ p[58+1]; + assign d[59] = h_n[59] ^ p[59+1]; + assign d[60] = h_n[60] ^ p[60+1]; + assign d[61] = h_n[61] ^ p[61+1]; + assign d[62] = h_n[62] ^ p[62+1]; + + assign d[63] = h_n[63] ^ bin_sub_q; + + assign d8[0] = d[8*0] & d[8*0+1] & d[8*0+2] & d[8*0+3] & d[8*0+4] & d[8*0+5] & d[8*0+6] & d[8*0+7]; + assign d8[1] = d[8*1] & d[8*1+1] & d[8*1+2] & d[8*1+3] & d[8*1+4] & d[8*1+5] & d[8*1+6] & d[8*1+7]; + assign d8[2] = d[8*2] & d[8*2+1] & d[8*2+2] & d[8*2+3] & d[8*2+4] & d[8*2+5] & d[8*2+6] & d[8*2+7]; + assign d8[3] = d[8*3] & d[8*3+1] & d[8*3+2] & d[8*3+3] & d[8*3+4] & d[8*3+5] & d[8*3+6] & d[8*3+7]; + assign d8[4] = d[8*4] & d[8*4+1] & d[8*4+2] & d[8*4+3] & d[8*4+4] & d[8*4+5] & d[8*4+6] & d[8*4+7]; + assign d8[5] = d[8*5] & d[8*5+1] & d[8*5+2] & d[8*5+3] & d[8*5+4] & d[8*5+5] & d[8*5+6] & d[8*5+7]; + assign d8[6] = d[8*6] & d[8*6+1] & d[8*6+2] & d[8*6+3] & d[8*6+4] & d[8*6+5] & d[8*6+6] & d[8*6+7]; + assign d8[7] = d[8*7] & d[8*7+1] & d[8*7+2] & d[8*7+3] & d[8*7+4] & d[8*7+5] & d[8*7+6] & d[8*7+7]; + + assign ds = d[33] & d[34] & d[35] & d[36] & d[37] & d[38] & d[39]; + + assign bin_sum_0_63_z = d8[0] & d8[1] & d8[2] & d8[3] & d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_32_63_z = d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_33_63_z = ds & d8[5] & d8[6] & d8[7]; + + assign G2[0] = g[2*0] | (p[2*0] & g[2*0+1]); + assign P2[0] = p[2*0] & p[2*0+1]; + assign G2[1] = g[2*1] | (p[2*1] & g[2*1+1]); + assign P2[1] = p[2*1] & p[2*1+1]; + assign G2[2] = g[2*2] | (p[2*2] & g[2*2+1]); + assign P2[2] = p[2*2] & p[2*2+1]; + assign G2[3] = g[2*3] | (p[2*3] & g[2*3+1]); + assign P2[3] = p[2*3] & p[2*3+1]; + assign G2[4] = g[2*4] | (p[2*4] & g[2*4+1]); + assign P2[4] = p[2*4] & p[2*4+1]; + assign G2[5] = g[2*5] | (p[2*5] & g[2*5+1]); + assign P2[5] = p[2*5] & p[2*5+1]; + assign G2[6] = g[2*6] | (p[2*6] & g[2*6+1]); + assign P2[6] = p[2*6] & p[2*6+1]; + assign G2[7] = g[2*7] | (p[2*7] & g[2*7+1]); + assign P2[7] = p[2*7] & p[2*7+1]; + assign G2[8] = g[2*8] | (p[2*8] & g[2*8+1]); + assign P2[8] = p[2*8] & p[2*8+1]; + assign G2[9] = g[2*9] | (p[2*9] & g[2*9+1]); + assign P2[9] = p[2*9] & p[2*9+1]; + assign G2[10] = g[2*10] | (p[2*10] & g[2*10+1]); + assign P2[10] = p[2*10] & p[2*10+1]; + assign G2[11] = g[2*11] | (p[2*11] & g[2*11+1]); + assign P2[11] = p[2*11] & p[2*11+1]; + assign G2[12] = g[2*12] | (p[2*12] & g[2*12+1]); + assign P2[12] = p[2*12] & p[2*12+1]; + assign G2[13] = g[2*13] | (p[2*13] & g[2*13+1]); + assign P2[13] = p[2*13] & p[2*13+1]; + assign G2[14] = g[2*14] | (p[2*14] & g[2*14+1]); + assign P2[14] = p[2*14] & p[2*14+1]; + assign G2[15] = g[2*15] | (p[2*15] & g[2*15+1]); + assign P2[15] = p[2*15] & p[2*15+1]; + assign G2[16] = g[2*16] | (p[2*16] & g[2*16+1]); + assign P2[16] = p[2*16] & p[2*16+1]; + assign G2[17] = g[2*17] | (p[2*17] & g[2*17+1]); + assign P2[17] = p[2*17] & p[2*17+1]; + assign G2[18] = g[2*18] | (p[2*18] & g[2*18+1]); + assign P2[18] = p[2*18] & p[2*18+1]; + assign G2[19] = g[2*19] | (p[2*19] & g[2*19+1]); + assign P2[19] = p[2*19] & p[2*19+1]; + assign G2[20] = g[2*20] | (p[2*20] & g[2*20+1]); + assign P2[20] = p[2*20] & p[2*20+1]; + assign G2[21] = g[2*21] | (p[2*21] & g[2*21+1]); + assign P2[21] = p[2*21] & p[2*21+1]; + assign G2[22] = g[2*22] | (p[2*22] & g[2*22+1]); + assign P2[22] = p[2*22] & p[2*22+1]; + assign G2[23] = g[2*23] | (p[2*23] & g[2*23+1]); + assign P2[23] = p[2*23] & p[2*23+1]; + assign G2[24] = g[2*24] | (p[2*24] & g[2*24+1]); + assign P2[24] = p[2*24] & p[2*24+1]; + assign G2[25] = g[2*25] | (p[2*25] & g[2*25+1]); + assign P2[25] = p[2*25] & p[2*25+1]; + assign G2[26] = g[2*26] | (p[2*26] & g[2*26+1]); + assign P2[26] = p[2*26] & p[2*26+1]; + assign G2[27] = g[2*27] | (p[2*27] & g[2*27+1]); + assign P2[27] = p[2*27] & p[2*27+1]; + assign G2[28] = g[2*28] | (p[2*28] & g[2*28+1]); + assign P2[28] = p[2*28] & p[2*28+1]; + assign G2[29] = g[2*29] | (p[2*29] & g[2*29+1]); + assign P2[29] = p[2*29] & p[2*29+1]; + assign G2[30] = g[2*30] | (p[2*30] & g[2*30+1]); + assign P2[30] = p[2*30] & p[2*30+1]; + assign G2[31] = g[2*31] | (p[2*31] & g[2*31+1]); + assign P2[31] = p[2*31] & p[2*31+1]; + + assign Gn[0] = G2[2*0] | (P2[2*0] & G2[2*0+1]); + assign Pn[0] = P2[2*0] & P2[2*0+1]; + + assign Gn[1] = G2[2*1] | (P2[2*1] & G2[2*1+1]); + assign Pn[1] = P2[2*1] & P2[2*1+1]; + + assign Gn[2] = G2[2*2] | (P2[2*2] & G2[2*2+1]); + assign Pn[2] = P2[2*2] & P2[2*2+1]; + + assign Gn[3] = G2[2*3] | (P2[2*3] & G2[2*3+1]); + assign Pn[3] = P2[2*3] & P2[2*3+1]; + + assign Gn[4] = G2[2*4] | (P2[2*4] & G2[2*4+1]); + assign Pn[4] = P2[2*4] & P2[2*4+1]; + + assign Gn[5] = G2[2*5] | (P2[2*5] & G2[2*5+1]); + assign Pn[5] = P2[2*5] & P2[2*5+1]; + + assign Gn[6] = G2[2*6] | (P2[2*6] & G2[2*6+1]); + assign Pn[6] = P2[2*6] & P2[2*6+1]; + + assign Gn[7] = G2[2*7] | (P2[2*7] & G2[2*7+1]); + assign Pn[7] = P2[2*7] & P2[2*7+1]; + + assign Gn[8] = G2[2*8] | (P2[2*8] & G2[2*8+1]); + assign Pn[8] = P2[2*8] & P2[2*8+1]; + + assign Gn[9] = G2[2*9] | (P2[2*9] & G2[2*9+1]); + assign Pn[9] = P2[2*9] & P2[2*9+1]; + + assign Gn[10] = G2[2*10] | (P2[2*10] & G2[2*10+1]); + assign Pn[10] = P2[2*10] & P2[2*10+1]; + + assign Gn[11] = G2[2*11] | (P2[2*11] & G2[2*11+1]); + assign Pn[11] = P2[2*11] & P2[2*11+1]; + + assign Gn[12] = G2[2*12] | (P2[2*12] & G2[2*12+1]); + assign Pn[12] = P2[2*12] & P2[2*12+1]; + + assign Gn[13] = G2[2*13] | (P2[2*13] & G2[2*13+1]); + assign Pn[13] = P2[2*13] & P2[2*13+1]; + + assign Gn[14] = G2[2*14] | (P2[2*14] & G2[2*14+1]); + assign Pn[14] = P2[2*14] & P2[2*14+1]; + + assign Gn[15] = G2[2*15] | (P2[2*15] & G2[2*15+1]); + assign Pn[15] = P2[2*15] & P2[2*15+1]; + + assign Gb[0] = Gn[2*0] | (Pn[2*0] & Gn[2*0+1]); + assign Pb[0] = Pn[2*0] & Pn[2*0+1]; + + assign Gb[1] = Gn[2*1] | (Pn[2*1] & Gn[2*1+1]); + assign Pb[1] = Pn[2*1] & Pn[2*1+1]; + + assign Gb[2] = Gn[2*2] | (Pn[2*2] & Gn[2*2+1]); + assign Pb[2] = Pn[2*2] & Pn[2*2+1]; + + assign Gb[3] = Gn[2*3] | (Pn[2*3] & Gn[2*3+1]); + assign Pb[3] = Pn[2*3] & Pn[2*3+1]; + + assign Gb[4] = Gn[2*4] | (Pn[2*4] & Gn[2*4+1]); + assign Pb[4] = Pn[2*4] & Pn[2*4+1]; + + assign Gb[5] = Gn[2*5] | (Pn[2*5] & Gn[2*5+1]); + assign Pb[5] = Pn[2*5] & Pn[2*5+1]; + + assign Gb[6] = Gn[2*6] | (Pn[2*6] & Gn[2*6+1]); + assign Pb[6] = Pn[2*6] & Pn[2*6+1]; + + assign Gb[7] = Gn[2*7] | (Pn[2*7] & Gn[2*7+1]); + assign Pb[7] = Pn[2*7] & Pn[2*7+1]; + + assign G2b[2] = Gb[2+1] | (Pb[2+1] & Gb[2+2]); + assign P2b[2] = Pb[2+1] & Pb[2+2]; + + assign G2b[3] = Gb[3+1] | (Pb[3+1] & Gb[3+2]); + assign P2b[3] = Pb[3+1] & Pb[3+2]; + + assign G2b[4] = Gb[4+1] | (Pb[4+1] & Gb[4+2]); + assign P2b[4] = Pb[4+1] & Pb[4+2]; + + assign G2b[5] = Gb[5+1] | (Pb[5+1] & Gb[5+2]); + assign P2b[5] = Pb[5+1] & Pb[5+2]; + + + assign G2b[0] = Gb[1] | (Pb[1] & Gb[2]); + assign P2b[0] = Pb[1] & Pb[2]; + assign G2b[1] = Gb[2] | (Pb[2] & Gb[3]); + assign P2b[1] = Pb[2] & Pb[3]; + + assign c[56] = Gb[7] | (Pb[7] & c[64]); + assign c[48] = G2b[5] | (P2b[5] & c[64]); + assign c[40] = G2b[4] | (P2b[4] & c[56]); + assign c[32] = G2b[3] | (P2b[3] & c[48]); + assign bin_c_32 = Gb[4] | (Pb[4] & c[40]); + assign c[24] = G2b[2] | (P2b[2] & c[40]); + assign c[16] = G2b[1] | (P2b[1] & c[24]); + assign c[8] = G2b[0] | (P2b[0] & c[24]); + assign c[0] = Gb[0] | (Pb[0] & c[8]); + + assign c[8*0+4] = Gn[2*0+1] | (Pn[2*0+1] & c[8*0+8]); + assign c[8*1+4] = Gn[2*1+1] | (Pn[2*1+1] & c[8*1+8]); + assign c[8*2+4] = Gn[2*2+1] | (Pn[2*2+1] & c[8*2+8]); + assign c[8*3+4] = Gn[2*3+1] | (Pn[2*3+1] & c[8*3+8]); + assign c[8*4+4] = Gn[2*4+1] | (Pn[2*4+1] & c[8*4+8]); + assign c[8*5+4] = Gn[2*5+1] | (Pn[2*5+1] & c[8*5+8]); + assign c[8*6+4] = Gn[2*6+1] | (Pn[2*6+1] & c[8*6+8]); + assign c[8*7+4] = Gn[2*7+1] | (Pn[2*7+1] & c[8*7+8]); + + assign c[4*0+2] = G2[2*0+1] | (P2[2*0+1] & c[4*0+4]); + assign c[4*1+2] = G2[2*1+1] | (P2[2*1+1] & c[4*1+4]); + assign c[4*2+2] = G2[2*2+1] | (P2[2*2+1] & c[4*2+4]); + assign c[4*3+2] = G2[2*3+1] | (P2[2*3+1] & c[4*3+4]); + assign c[4*4+2] = G2[2*4+1] | (P2[2*4+1] & c[4*4+4]); + assign c[4*5+2] = G2[2*5+1] | (P2[2*5+1] & c[4*5+4]); + assign c[4*6+2] = G2[2*6+1] | (P2[2*6+1] & c[4*6+4]); + assign c[4*7+2] = G2[2*7+1] | (P2[2*7+1] & c[4*7+4]); + assign c[4*8+2] = G2[2*8+1] | (P2[2*8+1] & c[4*8+4]); + assign c[4*9+2] = G2[2*9+1] | (P2[2*9+1] & c[4*9+4]); + assign c[4*10+2] = G2[2*10+1] | (P2[2*10+1] & c[4*10+4]); + assign c[4*11+2] = G2[2*11+1] | (P2[2*11+1] & c[4*11+4]); + assign c[4*12+2] = G2[2*12+1] | (P2[2*12+1] & c[4*12+4]); + assign c[4*13+2] = G2[2*13+1] | (P2[2*13+1] & c[4*13+4]); + assign c[4*14+2] = G2[2*14+1] | (P2[2*14+1] & c[4*14+4]); + assign c[4*15+2] = G2[2*15+1] | (P2[2*15+1] & c[4*15+4]); + + assign c[2*0+1] = g[2*0+1] | (p[2*0+1] & c[2*0+2]); + assign c[2*1+1] = g[2*1+1] | (p[2*1+1] & c[2*1+2]); + assign c[2*2+1] = g[2*2+1] | (p[2*2+1] & c[2*2+2]); + assign c[2*3+1] = g[2*3+1] | (p[2*3+1] & c[2*3+2]); + assign c[2*4+1] = g[2*4+1] | (p[2*4+1] & c[2*4+2]); + assign c[2*5+1] = g[2*5+1] | (p[2*5+1] & c[2*5+2]); + assign c[2*6+1] = g[2*6+1] | (p[2*6+1] & c[2*6+2]); + assign c[2*7+1] = g[2*7+1] | (p[2*7+1] & c[2*7+2]); + assign c[2*8+1] = g[2*8+1] | (p[2*8+1] & c[2*8+2]); + assign c[2*9+1] = g[2*9+1] | (p[2*9+1] & c[2*9+2]); + assign c[2*10+1] = g[2*10+1] | (p[2*10+1] & c[2*10+2]); + assign c[2*11+1] = g[2*11+1] | (p[2*11+1] & c[2*11+2]); + assign c[2*12+1] = g[2*12+1] | (p[2*12+1] & c[2*12+2]); + assign c[2*13+1] = g[2*13+1] | (p[2*13+1] & c[2*13+2]); + assign c[2*14+1] = g[2*14+1] | (p[2*14+1] & c[2*14+2]); + assign c[2*15+1] = g[2*15+1] | (p[2*15+1] & c[2*15+2]); + assign c[2*16+1] = g[2*16+1] | (p[2*16+1] & c[2*16+2]); + assign c[2*17+1] = g[2*17+1] | (p[2*17+1] & c[2*17+2]); + assign c[2*18+1] = g[2*18+1] | (p[2*18+1] & c[2*18+2]); + assign c[2*19+1] = g[2*19+1] | (p[2*19+1] & c[2*19+2]); + assign c[2*20+1] = g[2*20+1] | (p[2*20+1] & c[2*20+2]); + assign c[2*21+1] = g[2*21+1] | (p[2*21+1] & c[2*21+2]); + assign c[2*22+1] = g[2*22+1] | (p[2*22+1] & c[2*22+2]); + assign c[2*23+1] = g[2*23+1] | (p[2*23+1] & c[2*23+2]); + assign c[2*24+1] = g[2*24+1] | (p[2*24+1] & c[2*24+2]); + assign c[2*25+1] = g[2*25+1] | (p[2*25+1] & c[2*25+2]); + assign c[2*26+1] = g[2*26+1] | (p[2*26+1] & c[2*26+2]); + assign c[2*27+1] = g[2*27+1] | (p[2*27+1] & c[2*27+2]); + assign c[2*28+1] = g[2*28+1] | (p[2*28+1] & c[2*28+2]); + assign c[2*29+1] = g[2*29+1] | (p[2*29+1] & c[2*29+2]); + assign c[2*30+1] = g[2*30+1] | (p[2*30+1] & c[2*30+2]); + assign c[2*31+1] = g[2*31+1] | (p[2*31+1] & c[2*31+2]); + + assign c_n[0] = ~c[0]; + assign c_n[1] = ~c[1]; + assign c_n[2] = ~c[2]; + assign c_n[3] = ~c[3]; + assign c_n[4] = ~c[4]; + assign c_n[5] = ~c[5]; + assign c_n[6] = ~c[6]; + assign c_n[7] = ~c[7]; + assign c_n[8] = ~c[8]; + assign c_n[9] = ~c[9]; + assign c_n[10] = ~c[10]; + assign c_n[11] = ~c[11]; + assign c_n[12] = ~c[12]; + assign c_n[13] = ~c[13]; + assign c_n[14] = ~c[14]; + assign c_n[15] = ~c[15]; + assign c_n[16] = ~c[16]; + assign c_n[17] = ~c[17]; + assign c_n[18] = ~c[18]; + assign c_n[19] = ~c[19]; + assign c_n[20] = ~c[20]; + assign c_n[21] = ~c[21]; + assign c_n[22] = ~c[22]; + assign c_n[23] = ~c[23]; + assign c_n[24] = ~c[24]; + assign c_n[25] = ~c[25]; + assign c_n[26] = ~c[26]; + assign c_n[27] = ~c[27]; + assign c_n[28] = ~c[28]; + assign c_n[29] = ~c[29]; + assign c_n[30] = ~c[30]; + assign c_n[31] = ~c[31]; + assign c_n[32] = ~c[32]; + assign c_n[33] = ~c[33]; + assign c_n[34] = ~c[34]; + assign c_n[35] = ~c[35]; + assign c_n[36] = ~c[36]; + assign c_n[37] = ~c[37]; + assign c_n[38] = ~c[38]; + assign c_n[39] = ~c[39]; + assign c_n[40] = ~c[40]; + assign c_n[41] = ~c[41]; + assign c_n[42] = ~c[42]; + assign c_n[43] = ~c[43]; + assign c_n[44] = ~c[44]; + assign c_n[45] = ~c[45]; + assign c_n[46] = ~c[46]; + assign c_n[47] = ~c[47]; + assign c_n[48] = ~c[48]; + assign c_n[49] = ~c[49]; + assign c_n[50] = ~c[50]; + assign c_n[51] = ~c[51]; + assign c_n[52] = ~c[52]; + assign c_n[53] = ~c[53]; + assign c_n[54] = ~c[54]; + assign c_n[55] = ~c[55]; + assign c_n[56] = ~c[56]; + assign c_n[57] = ~c[57]; + assign c_n[58] = ~c[58]; + assign c_n[59] = ~c[59]; + assign c_n[60] = ~c[60]; + assign c_n[61] = ~c[61]; + assign c_n[62] = ~c[62]; + assign c_n[63] = ~c[63]; + + assign bin_c_0 = c[0]; + assign bin_ovfl = (c[32] & c_n[33]) | (c_n[32] & c[33]); + +endmodule // exdbin_mac + + + diff --git a/code/vezba8/dut/holdreg.v b/code/vezba8/dut/holdreg.v new file mode 100644 index 0000000..e49f552 --- /dev/null +++ b/code/vezba8/dut/holdreg.v @@ -0,0 +1,56 @@ +// Library: calc1 +// Module: Hold Register +// Author: Naseer Siddique + + module holdreg(hold_data1, hold_data2, hold_prio_req, c_clk, req_cmd_in, req_data_in, reset); + + input c_clk; + input [0:3] req_cmd_in; + input [1:7] reset; + input [0:31] req_data_in; + + output [0:3] hold_prio_req; + output [0:31] hold_data1, hold_data2; + + + reg [0:3] cmd_hold, hold_prio_reg; + wire [0:3] cmd_hold_q; + reg [0:31] hold_data1_q, hold_data2_q; + + always + @ (posedge c_clk) begin + fork + + cmd_hold[0:3] <= (reset[1] == 1) ? 4'b0 : req_cmd_in[0:3]; + hold_prio_reg[0:3] <= cmd_hold[0:3]; + + join + + end + + + always + @ (posedge c_clk) begin + fork + hold_data1_q[0:31] <= + (reset[1]) ? 32'b0 : + (req_cmd_in[0:3] != 4'b0) ? req_data_in[0:31] : + hold_data1_q[0:31]; + + hold_data2_q[0:31] <= + (reset[1]) ? 32'b0 : (cmd_hold[0:3] != 4'b0) ? + req_data_in[0:31] : hold_data2_q[0:31]; + join + + end + + + assign hold_data1 = hold_data1_q; + assign hold_data2 = hold_data2_q; + assign hold_prio_req = hold_prio_reg; + +endmodule // holdreg + + + + diff --git a/code/vezba8/dut/mux_out.v b/code/vezba8/dut/mux_out.v new file mode 100644 index 0000000..41e732d --- /dev/null +++ b/code/vezba8/dut/mux_out.v @@ -0,0 +1,27 @@ +// Library: calc1 +// Module: Output Mux +// Author: Naseer Siddique + +module mux_out(req_data, req_resp, req_data1, req_data2, req_resp1, req_resp2); + + output [0:31] req_data; + output [0:1] req_resp; + + input [0:31] req_data1, req_data2; + input [0:1] req_resp1, req_resp2; + + assign req_resp[0:1] = + (req_resp1[0:1] != 2'b00) ? req_resp1 : + ( req_resp2[0:1] != 2'b00 ) ? req_resp2 : + 2'b00; + + assign req_data[0:31] = + ( req_resp1[0:1] != 2'b00 ) ? req_data1 : + ( req_resp2[0:1] != 2'b00 ) ? req_data2 : + 32'b0; + + + +endmodule // mux_out + + diff --git a/code/vezba8/dut/priority.v b/code/vezba8/dut/priority.v new file mode 100644 index 0000000..7e020ab --- /dev/null +++ b/code/vezba8/dut/priority.v @@ -0,0 +1,155 @@ +// Library: calc1 +// Priority Logic +// Author: Naseer Siddique +module priority1 ( prio_alu1_in_cmd, prio_alu1_in_req_id, prio_alu1_out_req_id, prio_alu1_out_vld, prio_alu2_in_cmd, prio_alu2_in_req_id, prio_alu2_out_req_id, prio_alu2_out_vld, c_clk, hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req, local_error_found, reset); + + + output [0:3] prio_alu1_in_cmd, prio_alu2_in_cmd; + output [0:1] prio_alu1_out_req_id, prio_alu1_in_req_id, prio_alu2_in_req_id, prio_alu2_out_req_id; + output prio_alu1_out_vld, prio_alu2_out_vld; + + input c_clk, local_error_found; + input [0:3] hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req; + input [1:7] reset; + + reg [0:3] cmd1, cmd2, cmd3, cmd4; + reg delay1, delay2; + + wire cmd1_reset, cmd2_reset, cmd3_reset, cmd4_reset; + + reg [0:1] prio_req1_id_q, prio_req2_id_q; + + reg prio_alu1_out_vld_q, prio_alu2_out_vld_q; + + always + @ (posedge c_clk) begin + if (reset[1]) begin + cmd1 <= 0; + cmd2 <= 0; + cmd3 <= 0; + cmd4 <= 0; + end + else begin + fork + delay1 <= prio_alu1_out_vld_q; + delay2 <= prio_alu2_out_vld_q; + + cmd1[0:3] <= + (hold1_prio_req[0:3] != 4'b0) ? hold1_prio_req[0:3] : + (cmd1_reset) ? 4'b0 : + cmd1[0:3]; + + cmd2[0:3] <= + (hold2_prio_req[0:3] != 4'b0) ? hold2_prio_req[0:3] : + (cmd2_reset) ? 4'b0 : + cmd2[0:3]; + + cmd3[0:3] <= + (hold3_prio_req[0:3] != 4'b0) ? hold3_prio_req[0:3] : + (cmd3_reset) ? 4'b0 : + cmd3[0:3]; + + cmd4[0:3] <= + (hold4_prio_req[0:3] != 4'b0) ? hold4_prio_req[0:3] : + (cmd4_reset) ? 4'b0 : + cmd4[0:3]; + join + end + + + end // always @ (posedge c_clk) + + always + @ (delay1 or delay2 or cmd1 or cmd2 or cmd3 or cmd4) begin + + if (delay1) + prio_alu1_out_vld_q <= 1'b0; + else if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) && local_error_found ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b0; + else prio_alu1_out_vld_q <= 1'b0; + + if (delay2) + prio_alu2_out_vld_q <= 1'b0; + else if (cmd1 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd2 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd3 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd4 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else prio_alu2_out_vld_q <= 1'b0; + + if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b00; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b01; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b10; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b11; + else prio_req1_id_q[0:1] <= 2'b00; + + if ( cmd1 > 4'b0011 ) + prio_req2_id_q <= 2'b00; + else if ( cmd2 > 4'b0011 ) + prio_req2_id_q <= 2'b01; + else if ( cmd3 > 4'b0011 ) + prio_req2_id_q <= 2'b10; + else if ( cmd4 > 4'b0011 ) + prio_req2_id_q <= 2'b11; + else prio_req2_id_q <= 2'b00; + + end // always @ (delay1 or or delay2 or cmd1 or cmd2 or cmd3 or cmd4) + + assign prio_alu1_in_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_in_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_out_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_vld = prio_alu1_out_vld_q; + assign prio_alu2_out_vld = prio_alu2_out_vld_q; + + assign prio_alu1_in_cmd[0:3] = + (prio_req1_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req1_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req1_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req1_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + assign prio_alu2_in_cmd[0:3] = + (prio_req2_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req2_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req2_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req2_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + + assign cmd1_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b00) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b00) ) ? 1 : + 0; + + assign cmd2_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b01) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b01) ) ? 1 : + 0; + + assign cmd3_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b10) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b10) ) ? 1 : + 0; + + assign cmd4_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b11) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b11) ) ? 1 : + 0; + +endmodule // priority diff --git a/code/vezba8/dut/shifter.v b/code/vezba8/dut/shifter.v new file mode 100644 index 0000000..a2d9b47 --- /dev/null +++ b/code/vezba8/dut/shifter.v @@ -0,0 +1,2310 @@ +// Library: calc1 +// Module: 32-bit shifter +// Author: Naseer Siddique + +module shifter ( bin_ovfl, shift_out, shift_cmd, shift_places, local_error_found, shift_val); + + output bin_ovfl; + output [0:63] shift_out; + + input [0:3] shift_cmd; + input [0:63] shift_places, shift_val; + input local_error_found; + + wire [0:4] pos; + + + wire [0:63] shiftleft, shiftright, tempshiftl; + + wire bin_ovfl; + wire [0:63] shift_out; + + assign pos[0:4] = shift_places[59:63]; + + assign tempshiftl[0:31] = shift_val[32:63]; + assign tempshiftl[32:63] = 32'b0; + + assign shiftleft[0] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[0] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[0+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[0+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[0+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[0+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[0+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[0+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[0+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[0+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[0+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[0+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[0+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[0+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[0+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[0+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[0+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[0+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[0+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[0+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[0+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[0+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[0+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[0+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[0+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[0+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[0+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[0+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[0+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[0+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[0+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[0+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[0+31] : + 0; + + assign shiftleft[1] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[1] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[1+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[1+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[1+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[1+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[1+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[1+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[1+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[1+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[1+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[1+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[1+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[1+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[1+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[1+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[1+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[1+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[1+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[1+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[1+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[1+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[1+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[1+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[1+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[1+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[1+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[1+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[1+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[1+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[1+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[1+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[1+31] : + 0; + + assign shiftleft[2] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[2] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[2+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[2+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[2+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[2+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[2+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[2+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[2+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[2+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[2+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[2+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[2+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[2+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[2+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[2+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[2+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[2+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[2+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[2+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[2+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[2+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[2+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[2+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[2+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[2+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[2+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[2+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[2+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[2+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[2+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[2+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[2+31] : + 0; + + assign shiftleft[3] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[3] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[3+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[3+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[3+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[3+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[3+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[3+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[3+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[3+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[3+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[3+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[3+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[3+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[3+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[3+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[3+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[3+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[3+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[3+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[3+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[3+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[3+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[3+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[3+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[3+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[3+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[3+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[3+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[3+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[3+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[3+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[3+31] : + 0; + + assign shiftleft[4] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[4] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[4+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[4+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[4+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[4+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[4+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[4+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[4+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[4+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[4+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[4+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[4+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[4+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[4+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[4+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[4+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[4+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[4+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[4+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[4+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[4+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[4+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[4+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[4+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[4+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[4+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[4+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[4+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[4+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[4+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[4+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[4+31] : + 0; + + assign shiftleft[5] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[5] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[5+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[5+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[5+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[5+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[5+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[5+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[5+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[5+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[5+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[5+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[5+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[5+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[5+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[5+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[5+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[5+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[5+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[5+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[5+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[5+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[5+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[5+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[5+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[5+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[5+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[5+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[5+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[5+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[5+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[5+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[5+31] : + 0; + + assign shiftleft[6] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[6] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[6+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[6+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[6+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[6+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[6+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[6+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[6+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[6+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[6+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[6+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[6+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[6+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[6+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[6+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[6+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[6+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[6+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[6+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[6+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[6+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[6+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[6+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[6+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[6+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[6+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[6+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[6+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[6+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[6+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[6+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[6+31] : + 0; + + assign shiftleft[7] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[7] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[7+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[7+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[7+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[7+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[7+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[7+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[7+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[7+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[7+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[7+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[7+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[7+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[7+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[7+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[7+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[7+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[7+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[7+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[7+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[7+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[7+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[7+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[7+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[7+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[7+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[7+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[7+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[7+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[7+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[7+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[7+31] : + 0; + + assign shiftleft[8] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[8] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[8+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[8+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[8+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[8+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[8+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[8+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[8+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[8+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[8+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[8+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[8+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[8+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[8+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[8+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[8+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[8+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[8+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[8+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[8+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[8+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[8+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[8+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[8+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[8+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[8+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[8+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[8+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[8+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[8+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[8+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[8+31] : + 0; + + assign shiftleft[9] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[9] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[9+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[9+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[9+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[9+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[9+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[9+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[9+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[9+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[9+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[9+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[9+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[9+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[9+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[9+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[9+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[9+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[9+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[9+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[9+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[9+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[9+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[9+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[9+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[9+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[9+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[9+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[9+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[9+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[9+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[9+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[9+31] : + 0; + + assign shiftleft[10] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[10] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[10+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[10+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[10+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[10+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[10+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[10+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[10+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[10+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[10+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[10+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[10+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[10+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[10+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[10+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[10+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[10+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[10+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[10+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[10+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[10+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[10+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[10+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[10+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[10+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[10+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[10+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[10+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[10+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[10+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[10+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[10+31] : + 0; + + assign shiftleft[11] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[11] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[11+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[11+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[11+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[11+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[11+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[11+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[11+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[11+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[11+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[11+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[11+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[11+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[11+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[11+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[11+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[11+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[11+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[11+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[11+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[11+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[11+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[11+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[11+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[11+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[11+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[11+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[11+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[11+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[11+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[11+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[11+31] : + 0; + + assign shiftleft[12] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[12] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[12+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[12+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[12+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[12+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[12+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[12+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[12+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[12+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[12+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[12+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[12+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[12+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[12+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[12+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[12+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[12+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[12+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[12+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[12+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[12+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[12+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[12+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[12+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[12+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[12+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[12+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[12+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[12+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[12+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[12+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[12+31] : + 0; + + assign shiftleft[13] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[13] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[13+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[13+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[13+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[13+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[13+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[13+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[13+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[13+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[13+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[13+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[13+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[13+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[13+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[13+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[13+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[13+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[13+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[13+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[13+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[13+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[13+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[13+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[13+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[13+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[13+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[13+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[13+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[13+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[13+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[13+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[13+31] : + 0; + + assign shiftleft[14] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[14] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[14+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[14+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[14+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[14+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[14+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[14+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[14+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[14+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[14+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[14+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[14+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[14+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[14+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[14+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[14+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[14+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[14+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[14+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[14+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[14+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[14+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[14+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[14+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[14+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[14+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[14+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[14+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[14+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[14+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[14+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[14+31] : + 0; + + assign shiftleft[15] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[15] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[15+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[15+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[15+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[15+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[15+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[15+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[15+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[15+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[15+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[15+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[15+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[15+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[15+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[15+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[15+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[15+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[15+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[15+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[15+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[15+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[15+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[15+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[15+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[15+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[15+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[15+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[15+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[15+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[15+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[15+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[15+31] : + 0; + + assign shiftleft[16] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[16] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[16+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[16+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[16+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[16+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[16+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[16+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[16+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[16+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[16+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[16+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[16+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[16+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[16+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[16+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[16+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[16+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[16+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[16+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[16+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[16+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[16+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[16+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[16+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[16+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[16+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[16+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[16+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[16+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[16+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[16+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[16+31] : + 0; + + assign shiftleft[17] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[17] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[17+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[17+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[17+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[17+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[17+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[17+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[17+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[17+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[17+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[17+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[17+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[17+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[17+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[17+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[17+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[17+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[17+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[17+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[17+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[17+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[17+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[17+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[17+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[17+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[17+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[17+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[17+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[17+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[17+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[17+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[17+31] : + 0; + + assign shiftleft[18] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[18] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[18+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[18+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[18+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[18+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[18+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[18+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[18+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[18+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[18+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[18+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[18+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[18+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[18+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[18+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[18+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[18+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[18+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[18+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[18+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[18+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[18+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[18+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[18+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[18+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[18+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[18+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[18+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[18+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[18+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[18+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[18+31] : + 0; + + assign shiftleft[19] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[19] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[19+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[19+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[19+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[19+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[19+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[19+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[19+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[19+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[19+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[19+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[19+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[19+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[19+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[19+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[19+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[19+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[19+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[19+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[19+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[19+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[19+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[19+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[19+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[19+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[19+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[19+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[19+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[19+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[19+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[19+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[19+31] : + 0; + + assign shiftleft[20] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[20] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[20+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[20+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[20+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[20+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[20+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[20+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[20+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[20+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[20+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[20+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[20+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[20+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[20+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[20+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[20+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[20+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[20+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[20+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[20+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[20+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[20+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[20+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[20+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[20+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[20+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[20+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[20+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[20+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[20+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[20+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[20+31] : + 0; + + assign shiftleft[21] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[21] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[21+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[21+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[21+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[21+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[21+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[21+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[21+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[21+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[21+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[21+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[21+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[21+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[21+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[21+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[21+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[21+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[21+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[21+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[21+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[21+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[21+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[21+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[21+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[21+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[21+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[21+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[21+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[21+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[21+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[21+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[21+31] : + 0; + + assign shiftleft[22] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[22] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[22+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[22+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[22+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[22+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[22+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[22+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[22+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[22+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[22+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[22+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[22+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[22+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[22+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[22+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[22+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[22+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[22+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[22+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[22+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[22+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[22+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[22+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[22+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[22+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[22+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[22+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[22+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[22+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[22+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[22+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[22+31] : + 0; + + assign shiftleft[23] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[23] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[23+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[23+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[23+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[23+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[23+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[23+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[23+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[23+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[23+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[23+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[23+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[23+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[23+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[23+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[23+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[23+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[23+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[23+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[23+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[23+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[23+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[23+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[23+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[23+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[23+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[23+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[23+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[23+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[23+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[23+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[23+31] : + 0; + assign shiftleft[24] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[24] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[24+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[24+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[24+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[24+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[24+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[24+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[24+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[24+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[24+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[24+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[24+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[24+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[24+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[24+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[24+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[24+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[24+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[24+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[24+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[24+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[24+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[24+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[24+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[24+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[24+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[24+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[24+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[24+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[24+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[24+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[24+31] : + 0; + + assign shiftleft[25] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[25] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[25+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[25+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[25+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[25+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[25+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[25+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[25+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[25+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[25+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[25+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[25+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[25+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[25+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[25+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[25+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[25+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[25+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[25+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[25+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[25+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[25+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[25+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[25+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[25+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[25+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[25+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[25+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[25+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[25+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[25+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[25+31] : + 0; + + assign shiftleft[26] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[26] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[26+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[26+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[26+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[26+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[26+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[26+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[26+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[26+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[26+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[26+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[26+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[26+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[26+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[26+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[26+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[26+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[26+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[26+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[26+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[26+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[26+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[26+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[26+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[26+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[26+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[26+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[26+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[26+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[26+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[26+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[26+31] : + 0; + + assign shiftleft[27] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[27] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[27+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[27+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[27+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[27+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[27+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[27+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[27+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[27+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[27+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[27+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[27+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[27+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[27+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[27+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[27+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[27+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[27+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[27+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[27+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[27+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[27+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[27+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[27+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[27+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[27+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[27+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[27+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[27+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[27+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[27+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[27+31] : + 0; + + assign shiftleft[28] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[28] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[28+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[28+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[28+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[28+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[28+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[28+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[28+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[28+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[28+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[28+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[28+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[28+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[28+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[28+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[28+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[28+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[28+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[28+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[28+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[28+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[28+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[28+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[28+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[28+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[28+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[28+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[28+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[28+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[28+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[28+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[28+31] : + 0; + + assign shiftleft[29] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[29] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[29+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[29+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[29+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[29+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[29+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[29+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[29+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[29+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[29+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[29+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[29+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[29+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[29+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[29+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[29+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[29+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[29+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[29+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[29+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[29+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[29+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[29+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[29+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[29+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[29+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[29+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[29+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[29+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[29+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[29+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[29+31] : + 0; + + assign shiftleft[30] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[30] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[30+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[30+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[30+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[30+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[30+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[30+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[30+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[30+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[30+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[30+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[30+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[30+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[30+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[30+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[30+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[30+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[30+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[30+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[30+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[30+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[30+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[30+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[30+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[30+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[30+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[30+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[30+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[30+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[30+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[30+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[30+31] : + 0; + + assign shiftleft[31] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[31] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[31+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[31+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[31+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[31+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[31+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[31+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[31+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[31+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[31+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[31+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[31+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[31+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[31+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[31+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[31+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[31+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[31+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[31+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[31+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[31+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[31+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[31+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[31+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[31+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[31+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[31+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[31+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[31+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[31+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[31+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[31+31] : + 0; + + assign shiftright[32] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[32] : + ( pos[0:4] == 5'b00001 ) ? shift_val[32-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[32-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[32-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[32-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[32-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[32-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[32-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[32-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[32-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[32-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[32-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[32-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[32-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[32-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[32-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[32-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[32-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[32-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[32-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[32-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[32-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[32-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[32-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[32-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[32-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[32-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[32-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[32-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[32-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[32-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[32-31] : + 0; + + assign shiftright[33] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[33] : + ( pos[0:4] == 5'b00001 ) ? shift_val[33-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[33-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[33-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[33-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[33-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[33-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[33-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[33-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[33-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[33-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[33-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[33-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[33-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[33-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[33-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[33-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[33-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[33-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[33-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[33-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[33-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[33-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[33-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[33-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[33-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[33-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[33-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[33-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[33-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[33-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[33-31] : + 0; + + assign shiftright[34] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[34] : + ( pos[0:4] == 5'b00001 ) ? shift_val[34-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[34-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[34-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[34-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[34-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[34-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[34-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[34-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[34-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[34-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[34-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[34-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[34-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[34-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[34-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[34-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[34-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[34-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[34-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[34-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[34-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[34-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[34-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[34-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[34-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[34-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[34-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[34-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[34-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[34-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[34-31] : + 0; + + assign shiftright[35] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[35] : + ( pos[0:4] == 5'b00001 ) ? shift_val[35-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[35-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[35-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[35-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[35-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[35-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[35-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[35-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[35-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[35-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[35-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[35-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[35-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[35-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[35-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[35-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[35-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[35-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[35-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[35-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[35-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[35-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[35-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[35-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[35-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[35-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[35-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[35-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[35-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[35-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[35-31] : + 0; + + assign shiftright[36] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[36] : + ( pos[0:4] == 5'b00001 ) ? shift_val[36-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[36-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[36-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[36-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[36-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[36-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[36-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[36-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[36-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[36-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[36-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[36-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[36-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[36-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[36-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[36-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[36-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[36-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[36-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[36-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[36-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[36-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[36-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[36-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[36-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[36-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[36-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[36-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[36-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[36-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[36-31] : + 0; + + assign shiftright[37] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[37] : + ( pos[0:4] == 5'b00001 ) ? shift_val[37-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[37-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[37-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[37-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[37-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[37-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[37-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[37-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[37-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[37-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[37-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[37-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[37-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[37-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[37-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[37-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[37-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[37-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[37-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[37-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[37-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[37-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[37-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[37-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[37-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[37-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[37-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[37-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[37-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[37-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[37-31] : + 0; + + assign shiftright[38] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[38] : + ( pos[0:4] == 5'b00001 ) ? shift_val[38-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[38-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[38-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[38-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[38-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[38-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[38-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[38-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[38-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[38-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[38-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[38-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[38-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[38-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[38-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[38-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[38-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[38-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[38-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[38-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[38-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[38-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[38-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[38-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[38-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[38-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[38-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[38-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[38-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[38-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[38-31] : + 0; + + assign shiftright[39] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[39] : + ( pos[0:4] == 5'b00001 ) ? shift_val[39-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[39-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[39-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[39-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[39-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[39-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[39-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[39-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[39-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[39-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[39-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[39-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[39-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[39-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[39-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[39-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[39-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[39-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[39-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[39-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[39-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[39-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[39-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[39-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[39-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[39-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[39-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[39-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[39-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[39-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[39-31] : + 0; + + assign shiftright[40] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[40] : + ( pos[0:4] == 5'b00001 ) ? shift_val[40-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[40-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[40-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[40-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[40-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[40-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[40-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[40-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[40-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[40-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[40-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[40-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[40-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[40-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[40-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[40-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[40-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[40-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[40-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[40-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[40-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[40-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[40-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[40-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[40-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[40-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[40-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[40-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[40-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[40-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[40-31] : + 0; + + assign shiftright[41] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[41] : + ( pos[0:4] == 5'b00001 ) ? shift_val[41-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[41-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[41-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[41-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[41-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[41-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[41-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[41-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[41-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[41-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[41-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[41-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[41-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[41-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[41-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[41-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[41-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[41-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[41-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[41-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[41-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[41-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[41-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[41-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[41-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[41-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[41-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[41-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[41-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[41-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[41-31] : + 0; + + assign shiftright[42] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[42] : + ( pos[0:4] == 5'b00001 ) ? shift_val[42-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[42-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[42-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[42-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[42-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[42-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[42-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[42-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[42-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[42-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[42-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[42-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[42-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[42-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[42-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[42-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[42-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[42-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[42-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[42-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[42-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[42-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[42-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[42-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[42-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[42-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[42-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[42-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[42-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[42-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[42-31] : + 0; + + + assign shiftright[43] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[43] : + ( pos[0:4] == 5'b00001 ) ? shift_val[43-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[43-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[43-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[43-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[43-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[43-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[43-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[43-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[43-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[43-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[43-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[43-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[43-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[43-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[43-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[43-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[43-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[43-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[43-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[43-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[43-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[43-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[43-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[43-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[43-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[43-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[43-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[43-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[43-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[43-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[43-31] : + 0; + + assign shiftright[44] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[44] : + ( pos[0:4] == 5'b00001 ) ? shift_val[44-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[44-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[44-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[44-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[44-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[44-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[44-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[44-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[44-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[44-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[44-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[44-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[44-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[44-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[44-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[44-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[44-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[44-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[44-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[44-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[44-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[44-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[44-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[44-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[44-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[44-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[44-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[44-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[44-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[44-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[44-31] : + 0; + + assign shiftright[45] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[45] : + ( pos[0:4] == 5'b00001 ) ? shift_val[45-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[45-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[45-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[45-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[45-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[45-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[45-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[45-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[45-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[45-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[45-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[45-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[45-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[45-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[45-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[45-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[45-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[45-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[45-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[45-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[45-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[45-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[45-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[45-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[45-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[45-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[45-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[45-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[45-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[45-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[45-31] : + 0; + + assign shiftright[46] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[46] : + ( pos[0:4] == 5'b00001 ) ? shift_val[46-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[46-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[46-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[46-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[46-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[46-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[46-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[46-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[46-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[46-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[46-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[46-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[46-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[46-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[46-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[46-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[46-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[46-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[46-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[46-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[46-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[46-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[46-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[46-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[46-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[46-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[46-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[46-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[46-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[46-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[46-31] : + 0; + + assign shiftright[47] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[47] : + ( pos[0:4] == 5'b00001 ) ? shift_val[47-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[47-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[47-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[47-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[47-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[47-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[47-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[47-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[47-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[47-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[47-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[47-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[47-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[47-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[47-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[47-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[47-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[47-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[47-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[47-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[47-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[47-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[47-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[47-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[47-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[47-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[47-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[47-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[47-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[47-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[47-31] : + 0; + + assign shiftright[48] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[48] : + ( pos[0:4] == 5'b00001 ) ? shift_val[48-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[48-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[48-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[48-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[48-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[48-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[48-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[48-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[48-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[48-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[48-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[48-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[48-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[48-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[48-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[48-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[48-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[48-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[48-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[48-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[48-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[48-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[48-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[48-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[48-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[48-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[48-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[48-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[48-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[48-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[48-31] : + 0; + + assign shiftright[49] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[49] : + ( pos[0:4] == 5'b00001 ) ? shift_val[49-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[49-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[49-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[49-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[49-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[49-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[49-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[49-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[49-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[49-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[49-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[49-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[49-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[49-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[49-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[49-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[49-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[49-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[49-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[49-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[49-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[49-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[49-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[49-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[49-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[49-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[49-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[49-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[49-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[49-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[49-31] : + 0; + + assign shiftright[50] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[50] : + ( pos[0:4] == 5'b00001 ) ? shift_val[50-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[50-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[50-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[50-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[50-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[50-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[50-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[50-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[50-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[50-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[50-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[50-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[50-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[50-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[50-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[50-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[50-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[50-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[50-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[50-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[50-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[50-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[50-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[50-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[50-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[50-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[50-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[50-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[50-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[50-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[50-31] : + 0; + + assign shiftright[51] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[51] : + ( pos[0:4] == 5'b00001 ) ? shift_val[51-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[51-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[51-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[51-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[51-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[51-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[51-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[51-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[51-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[51-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[51-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[51-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[51-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[51-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[51-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[51-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[51-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[51-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[51-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[51-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[51-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[51-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[51-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[51-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[51-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[51-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[51-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[51-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[51-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[51-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[51-31] : + 0; + + assign shiftright[52] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[52] : + ( pos[0:4] == 5'b00001 ) ? shift_val[52-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[52-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[52-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[52-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[52-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[52-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[52-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[52-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[52-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[52-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[52-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[52-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[52-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[52-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[52-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[52-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[52-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[52-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[52-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[52-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[52-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[52-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[52-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[52-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[52-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[52-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[52-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[52-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[52-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[52-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[52-31] : + 0; + + assign shiftright[53] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[53] : + ( pos[0:4] == 5'b00001 ) ? shift_val[53-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[53-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[53-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[53-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[53-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[53-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[53-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[53-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[53-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[53-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[53-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[53-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[53-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[53-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[53-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[53-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[53-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[53-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[53-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[53-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[53-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[53-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[53-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[53-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[53-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[53-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[53-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[53-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[53-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[53-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[53-31] : + 0; + + assign shiftright[54] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[54] : + ( pos[0:4] == 5'b00001 ) ? shift_val[54-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[54-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[54-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[54-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[54-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[54-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[54-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[54-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[54-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[54-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[54-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[54-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[54-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[54-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[54-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[54-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[54-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[54-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[54-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[54-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[54-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[54-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[54-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[54-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[54-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[54-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[54-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[54-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[54-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[54-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[54-31] : + 0; + + assign shiftright[55] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[55] : + ( pos[0:4] == 5'b00001 ) ? shift_val[55-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[55-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[55-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[55-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[55-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[55-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[55-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[55-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[55-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[55-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[55-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[55-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[55-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[55-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[55-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[55-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[55-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[55-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[55-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[55-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[55-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[55-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[55-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[55-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[55-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[55-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[55-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[55-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[55-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[55-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[55-31] : + 0; + + assign shiftright[56] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[56] : + ( pos[0:4] == 5'b00001 ) ? shift_val[56-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[56-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[56-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[56-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[56-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[56-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[56-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[56-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[56-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[56-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[56-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[56-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[56-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[56-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[56-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[56-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[56-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[56-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[56-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[56-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[56-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[56-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[56-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[56-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[56-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[56-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[56-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[56-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[56-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[56-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[56-31] : + 0; + + assign shiftright[57] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[57] : + ( pos[0:4] == 5'b00001 ) ? shift_val[57-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[57-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[57-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[57-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[57-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[57-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[57-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[57-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[57-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[57-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[57-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[57-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[57-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[57-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[57-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[57-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[57-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[57-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[57-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[57-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[57-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[57-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[57-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[57-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[57-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[57-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[57-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[57-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[57-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[57-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[57-31] : + 0; + + assign shiftright[58] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[58] : + ( pos[0:4] == 5'b00001 ) ? shift_val[58-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[58-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[58-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[58-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[58-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[58-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[58-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[58-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[58-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[58-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[58-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[58-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[58-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[58-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[58-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[58-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[58-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[58-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[58-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[58-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[58-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[58-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[58-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[58-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[58-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[58-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[58-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[58-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[58-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[58-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[58-31] : + 0; + + assign shiftright[59] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[59] : + ( pos[0:4] == 5'b00001 ) ? shift_val[59-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[59-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[59-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[59-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[59-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[59-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[59-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[59-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[59-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[59-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[59-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[59-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[59-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[59-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[59-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[59-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[59-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[59-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[59-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[59-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[59-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[59-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[59-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[59-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[59-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[59-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[59-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[59-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[59-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[59-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[59-31] : + 0; + + assign shiftright[60] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[60] : + ( pos[0:4] == 5'b00001 ) ? shift_val[60-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[60-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[60-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[60-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[60-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[60-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[60-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[60-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[60-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[60-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[60-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[60-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[60-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[60-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[60-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[60-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[60-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[60-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[60-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[60-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[60-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[60-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[60-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[60-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[60-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[60-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[60-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[60-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[60-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[60-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[60-31] : + 0; + + assign shiftright[61] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[61] : + ( pos[0:4] == 5'b00001 ) ? shift_val[61-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[61-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[61-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[61-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[61-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[61-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[61-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[61-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[61-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[61-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[61-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[61-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[61-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[61-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[61-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[61-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[61-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[61-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[61-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[61-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[61-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[61-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[61-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[61-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[61-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[61-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[61-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[61-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[61-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[61-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[61-31] : + 0; + + assign shiftright[62] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[62] : + ( pos[0:4] == 5'b00001 ) ? shift_val[62-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[62-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[62-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[62-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[62-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[62-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[62-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[62-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[62-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[62-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[62-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[62-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[62-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[62-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[62-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[62-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[62-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[62-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[62-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[62-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[62-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[62-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[62-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[62-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[62-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[62-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[62-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[62-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[62-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[62-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[62-31] : + 0; + + assign shiftright[63] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[63] : + ( pos[0:4] == 5'b00001 ) ? shift_val[63-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[63-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[63-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[63-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[63-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[63-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[63-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[63-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[63-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[63-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[63-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[63-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[63-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[63-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[63-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[63-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[63-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[63-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[63-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[63-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[63-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[63-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[63-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[63-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[63-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[63-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[63-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[63-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[63-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[63-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[63-31] : + 0; + + assign shift_out[0:31] = 32'b0; + + assign shift_out[32:63] = + ( shift_cmd[0:3] == 4'b0101 ) ? shiftleft[0:31] : + ( shift_cmd[0:3] == 4'b0110 ) ? shiftright[32:63] : + 32'b0; + + assign bin_ovfl = 1'b0; + +endmodule // shifter + + \ No newline at end of file diff --git a/code/vezba8/v8_run.f b/code/vezba8/v8_run.f new file mode 100644 index 0000000..1789f8f --- /dev/null +++ b/code/vezba8/v8_run.f @@ -0,0 +1,32 @@ +-uvmhome "/eda/cadence/2019-20/RHELx86/XCELIUM_19.03.013/tools/methodology/UVM/CDNS-1.2/" +-uvm +UVM_TESTNAME=test_simple +-sv +incdir+./verif +-sv +incdir+./verif/Agent +-sv +incdir+./verif/Sequences + + + ./dut/alu_input_stage.v + ./dut/alu_output_stage.v + ./dut/exdbin_mac.v + ./dut/holdreg.v + ./dut/mux_out.v + ./dut/shifter.v + ./dut/priority.v + ./dut/calc_top.v + + + +-sv ./verif/Agent/calc_agent_pkg.sv +-sv ./verif/Sequences/calc_seq_pkg.sv +-sv ./verif/calc_test_pkg.sv + +-sv ./verif/calc_verif_top.sv + + + + +#-LINEDEBUG +-access +rwc +-disable_sem2009 +-nowarn "MEMODR" +-timescale 1ns/10ps diff --git a/code/vezba8/verif/Agent/calc_agent_pkg.sv b/code/vezba8/verif/Agent/calc_agent_pkg.sv new file mode 100644 index 0000000..c36797d --- /dev/null +++ b/code/vezba8/verif/Agent/calc_agent_pkg.sv @@ -0,0 +1,22 @@ +`ifndef CALC_AGENT_PKG +`define CALC_AGENT_PKG + +package calc_agent_pkg; + + import uvm_pkg::*; + `include "uvm_macros.svh" + + ////////////////////////////////////////////////////////// + // include Agent components : driver,monitor,sequencer + ///////////////////////////////////////////////////////// + `include "calc_seq_item.sv" + `include "calc_sequencer.sv" + `include "calc_monitor.sv" + `include "calc_driver.sv" + +endpackage + +`endif + + + diff --git a/code/vezba8/verif/Agent/calc_driver.sv b/code/vezba8/verif/Agent/calc_driver.sv new file mode 100644 index 0000000..c0ecbff --- /dev/null +++ b/code/vezba8/verif/Agent/calc_driver.sv @@ -0,0 +1,41 @@ +`ifndef CALC_DRIVER_SV +`define CALC_DRIVER_SV +class calc_driver extends uvm_driver#(calc_seq_item); + + `uvm_component_utils(calc_driver) + virtual interface calc_if vif; + function new(string name = "calc_driver", uvm_component parent = null); + super.new(name,parent); + endfunction // new + + function void build_phase(uvm_phase phase); + if (!uvm_config_db#(virtual calc_if)::get(null, "*", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + + endfunction // build_phase + + task main_phase(uvm_phase phase); + forever begin + @(posedge vif.clk); + if (!vif.rst) + begin + seq_item_port.get_next_item(req); + + `uvm_info(get_type_name(), + $sformatf("Driver sending...\n%s", req.sprint()), + UVM_HIGH) + vif.req1_data_in = req.operand1; + vif.req1_cmd_in = req.cmd; + @(posedge vif.clk); + vif.req1_data_in = req.operand2; + vif.req1_cmd_in = 0; + + seq_item_port.item_done(); + end + end + endtask : main_phase + +endclass : calc_driver + +`endif + diff --git a/code/vezba8/verif/Agent/calc_monitor.sv b/code/vezba8/verif/Agent/calc_monitor.sv new file mode 100644 index 0000000..cb22ec1 --- /dev/null +++ b/code/vezba8/verif/Agent/calc_monitor.sv @@ -0,0 +1,44 @@ +class calc_monitor extends uvm_monitor; + + // control fileds + bit checks_enable = 1; + bit coverage_enable = 1; + + uvm_analysis_port #(calc_seq_item) item_collected_port; + + `uvm_component_utils_begin(calc_monitor) + `uvm_field_int(checks_enable, UVM_DEFAULT) + `uvm_field_int(coverage_enable, UVM_DEFAULT) + `uvm_component_utils_end + + // The virtual interface used to drive and view HDL signals. + virtual interface calc_if vif; + + // current transaction + calc_seq_item curr_it; + + // coverage can go here + // ... + + function new(string name = "calc_monitor", uvm_component parent = null); + super.new(name,parent); + if (!uvm_config_db#(virtual calc_if)::get(null, "*", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + endfunction + + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + + endfunction : connect_phase + + task main_phase(uvm_phase phase); + // forever begin + // curr_it = calc_seq_item::type_id::create("curr_it", this); + // ... + // collect transactions + // ... + // item_collected_port.write(curr_it); + // end + endtask : main_phase + +endclass : calc_monitor diff --git a/code/vezba8/verif/Agent/calc_seq_item.sv b/code/vezba8/verif/Agent/calc_seq_item.sv new file mode 100644 index 0000000..234fef4 --- /dev/null +++ b/code/vezba8/verif/Agent/calc_seq_item.sv @@ -0,0 +1,20 @@ +`ifndef CALC_SEQ_ITEM_SV + `define CALC_SEQ_ITEM_SV + +class calc_seq_item extends uvm_sequence_item; + + rand logic [31:0] operand1; + rand logic [31:0] operand2; + rand logic [3:0] cmd; + + + `uvm_object_utils_begin(calc_seq_item) + `uvm_object_utils_end + + function new (string name = "calc_seq_item"); + super.new(name); + endfunction // new + +endclass : calc_seq_item + +`endif diff --git a/code/vezba8/verif/Agent/calc_sequencer.sv b/code/vezba8/verif/Agent/calc_sequencer.sv new file mode 100644 index 0000000..d01a629 --- /dev/null +++ b/code/vezba8/verif/Agent/calc_sequencer.sv @@ -0,0 +1,15 @@ +`ifndef CALC_SEQUENCER_SV + `define CALC_SEQUENCER_SV + +class calc_sequencer extends uvm_sequencer#(calc_seq_item); + + `uvm_component_utils(calc_sequencer) + + function new(string name = "calc_sequencer", uvm_component parent = null); + super.new(name,parent); + endfunction + +endclass : calc_sequencer + +`endif + diff --git a/code/vezba8/verif/Sequences/calc_base_seq.sv b/code/vezba8/verif/Sequences/calc_base_seq.sv new file mode 100644 index 0000000..db6e7bb --- /dev/null +++ b/code/vezba8/verif/Sequences/calc_base_seq.sv @@ -0,0 +1,30 @@ +`ifndef CALC_BASE_SEQ_SV + `define CALC_BASE_SEQ_SV + +class calc_base_seq extends uvm_sequence#(calc_seq_item); + + `uvm_object_utils(calc_base_seq) + `uvm_declare_p_sequencer(calc_sequencer) + + function new(string name = "calc_base_seq"); + super.new(name); + endfunction + + // objections are raised in pre_body + virtual task pre_body(); + uvm_phase phase = get_starting_phase(); + if (phase != null) + phase.raise_objection(this, {"Running sequence '", get_full_name(), "'"}); + uvm_test_done.set_drain_time(this, 200ms); + endtask : pre_body + + // objections are dropped in post_body + virtual task post_body(); + uvm_phase phase = get_starting_phase(); + if (phase != null) + phase.drop_objection(this, {"Completed sequence '", get_full_name(), "'"}); + endtask : post_body + +endclass : calc_base_seq + +`endif diff --git a/code/vezba8/verif/Sequences/calc_seq_pkg.sv b/code/vezba8/verif/Sequences/calc_seq_pkg.sv new file mode 100644 index 0000000..0ea3e99 --- /dev/null +++ b/code/vezba8/verif/Sequences/calc_seq_pkg.sv @@ -0,0 +1,11 @@ +`ifndef CALC_SEQ_PKG_SV + `define CALC_SEQ_PKG_SV +package calc_seq_pkg; + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + import calc_agent_pkg::calc_seq_item; + import calc_agent_pkg::calc_sequencer; + `include "calc_base_seq.sv" + `include "calc_simple_seq.sv" + endpackage +`endif diff --git a/code/vezba8/verif/Sequences/calc_simple_seq.sv b/code/vezba8/verif/Sequences/calc_simple_seq.sv new file mode 100644 index 0000000..4114064 --- /dev/null +++ b/code/vezba8/verif/Sequences/calc_simple_seq.sv @@ -0,0 +1,29 @@ +`ifndef CALC_SIMPLE_SEQ_SV + `define CALC_SIMPLE_SEQ_SV + +class calc_simple_seq extends calc_base_seq; + + `uvm_object_utils (calc_simple_seq) + + function new(string name = "calc_simple_seq"); + super.new(name); + endfunction + + virtual task body(); + // simple example - just send one item + calc_seq_item calc_it; + // prvi korak kreiranje transakcije + calc_it = calc_seq_item::type_id::create("calc_it"); + // drugi korak − start + start_item(calc_it); + // treci korak priprema + // po potrebi moguce prosiriti sa npr. inline ogranicenjima + assert (calc_it.randomize() with {calc_it.cmd==1; calc_it.operand1==3;}); + // cetvrti korak − finish + finish_item(calc_it); + + endtask : body + +endclass : calc_simple_seq + +`endif diff --git a/code/vezba8/verif/calc_if.sv b/code/vezba8/verif/calc_if.sv new file mode 100644 index 0000000..feebbb1 --- /dev/null +++ b/code/vezba8/verif/calc_if.sv @@ -0,0 +1,29 @@ +`ifndef CALC_IF_SV + `define CALC_IF_SV + +interface calc_if (input clk, logic [6 : 0] rst); + + parameter DATA_WIDTH = 32; + parameter RESP_WIDTH = 2; + parameter CMD_WIDTH = 4; + + logic [DATA_WIDTH - 1 : 0] out_data1; + logic [DATA_WIDTH - 1 : 0] out_data2; + logic [DATA_WIDTH - 1 : 0] out_data3; + logic [DATA_WIDTH - 1 : 0] out_data4; + logic [RESP_WIDTH - 1 : 0] out_resp1; + logic [RESP_WIDTH - 1 : 0] out_resp2; + logic [RESP_WIDTH - 1 : 0] out_resp3; + logic [RESP_WIDTH - 1 : 0] out_resp4; + logic [CMD_WIDTH - 1 : 0] req1_cmd_in; + logic [DATA_WIDTH - 1 : 0] req1_data_in; + logic [CMD_WIDTH - 1 : 0] req2_cmd_in; + logic [DATA_WIDTH - 1 : 0] req2_data_in; + logic [CMD_WIDTH - 1 : 0] req3_cmd_in; + logic [DATA_WIDTH - 1 : 0] req3_data_in; + logic [CMD_WIDTH - 1 : 0] req4_cmd_in; + logic [DATA_WIDTH - 1 : 0] req4_data_in; + +endinterface : calc_if + +`endif diff --git a/code/vezba8/verif/calc_test_pkg.sv b/code/vezba8/verif/calc_test_pkg.sv new file mode 100644 index 0000000..fda3e54 --- /dev/null +++ b/code/vezba8/verif/calc_test_pkg.sv @@ -0,0 +1,23 @@ +`ifndef CALC_TEST_PKG_SV + `define CALC_TEST_PKG_SV + +package calc_test_pkg; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + + import calc_agent_pkg::*; + import calc_seq_pkg::*; + + + `include "test_base.sv" + `include "test_simple.sv" + `include "test_simple_2.sv" + + +endpackage : calc_test_pkg +`include "calc_if.sv" + + +`endif + diff --git a/code/vezba8/verif/calc_verif_top.sv b/code/vezba8/verif/calc_verif_top.sv new file mode 100644 index 0000000..85c5bc4 --- /dev/null +++ b/code/vezba8/verif/calc_verif_top.sv @@ -0,0 +1,52 @@ +module calc_verif_top; + + import uvm_pkg::*; // import the UVM library +`include "uvm_macros.svh" // Include the UVM macros + + import calc_test_pkg::*; + + logic clk; + logic [6 : 0] rst; + + // interface + calc_if calc_vif(clk, rst); + + // DUT + calc_top DUT( + .c_clk ( clk ), + .reset ( rst ), + .out_data1 ( calc_vif.out_data1 ), + .out_data2 ( calc_vif.out_data2 ), + .out_data3 ( calc_vif.out_data3 ), + .out_data4 ( calc_vif.out_data4 ), + .out_resp1 ( calc_vif.out_resp1 ), + .out_resp2 ( calc_vif.out_resp2 ), + .out_resp3 ( calc_vif.out_resp3 ), + .out_resp4 ( calc_vif.out_resp4 ), + .req1_cmd_in ( calc_vif.req1_cmd_in ), + .req1_data_in ( calc_vif.req1_data_in ), + .req2_cmd_in ( calc_vif.req2_cmd_in ), + .req2_data_in ( calc_vif.req2_data_in ), + .req3_cmd_in ( calc_vif.req3_cmd_in ), + .req3_data_in ( calc_vif.req3_data_in ), + .req4_cmd_in ( calc_vif.req4_cmd_in ), + .req4_data_in ( calc_vif.req4_data_in ) + ); + + // run test + initial begin + uvm_config_db#(virtual calc_if)::set(null, "*", "calc_if", calc_vif); + run_test(); + end + + // clock and reset init. + initial begin + clk <= 0; + rst <= 1; + #50 rst <= 0; + end + + // clock generation + always #50 clk = ~clk; + +endmodule : calc_verif_top diff --git a/code/vezba8/verif/test_base.sv b/code/vezba8/verif/test_base.sv new file mode 100644 index 0000000..7014913 --- /dev/null +++ b/code/vezba8/verif/test_base.sv @@ -0,0 +1,29 @@ +`ifndef TEST_BASE_SV + `define TEST_BASE_SV + +class test_base extends uvm_test; + + `uvm_component_utils(test_base) + + calc_driver drv; + calc_monitor mon; + calc_sequencer seqr; + calc_seq_item seq_item1; + function new(string name = "test_base", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + drv = calc_driver::type_id::create("drv", this); + mon = calc_monitor::type_id::create("mon", this); + seqr = calc_sequencer::type_id::create("seqr", this); + endfunction : build_phase + + function void connect_phase(uvm_phase phase); + drv.seq_item_port.connect(seqr.seq_item_export); + endfunction : connect_phase + +endclass : test_base + +`endif diff --git a/code/vezba8/verif/test_simple.sv b/code/vezba8/verif/test_simple.sv new file mode 100644 index 0000000..7a2b576 --- /dev/null +++ b/code/vezba8/verif/test_simple.sv @@ -0,0 +1,28 @@ +`ifndef TEST_SIMPLE_SV + `define TEST_SIMPLE_SV + +class test_simple extends test_base; + + `uvm_component_utils(test_simple) + + calc_simple_seq simple_seq; + + function new(string name = "test_simple", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + simple_seq = calc_simple_seq::type_id::create("simple_seq"); + endfunction : build_phase + + task main_phase(uvm_phase phase); + phase.raise_objection(this); + simple_seq.start(seqr); + #100ms; + phase.drop_objection(this); + endtask : main_phase + +endclass + +`endif diff --git a/code/vezba8/verif/test_simple_2.sv b/code/vezba8/verif/test_simple_2.sv new file mode 100644 index 0000000..57ad9f6 --- /dev/null +++ b/code/vezba8/verif/test_simple_2.sv @@ -0,0 +1,23 @@ +`ifndef TEST_SIMPLE_2_SV + `define TEST_SIMPLE_2_SV + +class test_simple_2 extends test_base; + + `uvm_component_utils(test_simple_2) + + function new(string name = "test_simple_2", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + uvm_config_db#(uvm_object_wrapper)::set(this, + "seqr.main_phase", + "default_sequence", + calc_simple_seq::type_id::get()); + endfunction : build_phase + +endclass + +`endif diff --git a/code/vezba9/dut/alu_input_stage.v b/code/vezba9/dut/alu_input_stage.v new file mode 100644 index 0000000..cb10f05 --- /dev/null +++ b/code/vezba9/dut/alu_input_stage.v @@ -0,0 +1,36 @@ +// Library: calc1 +// Module: ALU Input Stage +// Author: Naseer SIddique + +module alu_input_stage (alu_data1, alu_data2, hold1_data1, hold1_data2, hold2_data1, hold2_data2, hold3_data1, hold3_data2, hold4_data1, hold4_data2, prio_alu_in_cmd, prio_alu_in_req_id); + + output [0:63] alu_data1, alu_data2; + + wire [0:63] alu_data1, alu_data2; + + input [0:31] hold1_data1, hold1_data2, + hold2_data1, hold2_data2, + hold3_data1, hold3_data2, + hold4_data1, hold4_data2; + + input [0:3] prio_alu_in_cmd; + input [0:1] prio_alu_in_req_id; + + assign alu_data1[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data1[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data1[0:31] : + 32'b0; + + assign alu_data2[32:63] = + prio_alu_in_req_id[0:1] == 2'b00 ? hold1_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b01 ? hold2_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b10 ? hold3_data2[0:31] : + prio_alu_in_req_id[0:1] == 2'b11 ? hold4_data2[0:31] : + 32'b0; + + assign alu_data1[0:31] = 32'b0; + assign alu_data2[0:31] = 32'b0; + +endmodule // alu_input_stage diff --git a/code/vezba9/dut/alu_output_stage.v b/code/vezba9/dut/alu_output_stage.v new file mode 100644 index 0000000..4ff44ad --- /dev/null +++ b/code/vezba9/dut/alu_output_stage.v @@ -0,0 +1,47 @@ +// Library: calc1 +// Module: ALU Output Stage +// Author: Naseer Siddique + +module alu_output_stage(out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk,alu_overflow, alu_result, local_error_found, prio_alu_out_req_id, prio_alu_out_vld, reset); + + output [0:31] out_data1, out_data2, out_data3, out_data4; + output [0:1] out_resp1, out_resp2, out_resp3, out_resp4; + + input [0:63] alu_result; + input [0:1] prio_alu_out_req_id; + input [1:7] reset; + input c_clk, + alu_overflow, + local_error_found, + prio_alu_out_vld; + + wire [0:31] hold_data; + wire [0:1] hold_resp, hold_id; + + assign hold_id[0:1] = prio_alu_out_req_id[0:1]; + + assign hold_resp[0:1] = + (~prio_alu_out_vld) ? 2'b00 : + (~local_error_found) ? 2'b01 : + (alu_result[31]) ? 2'b10 : + 2'b01; + + assign hold_data[0:31] = (prio_alu_out_vld) ? alu_result[32:63] : 32'b0; + + assign out_resp1[0:1] = (hold_id[0:1] == 2'b00) ? hold_resp[0:1] : 2'b00; + + assign out_resp2[0:1] = (hold_id[0:1] == 2'b01) ? hold_resp[0:1] : 2'b00; + + assign out_resp3[0:1] = (hold_id[0:1] == 2'b10) ? hold_resp[0:1] : 2'b00; + + assign out_resp4[0:1] = (hold_id[0:1] == 2'b11) ? hold_resp[0:1] : 2'b00; + + assign out_data1[0:31] = (hold_id[0:1] == 2'b00) ? hold_data[0:31] : 32'b0; + + assign out_data2[0:31] = (hold_id[0:1] == 2'b01) ? hold_data[0:31] : 32'b0; + + assign out_data3[0:31] = (hold_id[0:1] == 2'b10) ? hold_data[0:31] : 32'b0; + + assign out_data4[0:31] = (hold_id[0:1] == 2'b11) ? hold_data[0:31] : 32'b0; + +endmodule diff --git a/code/vezba9/dut/calc_top.v b/code/vezba9/dut/calc_top.v new file mode 100644 index 0000000..b4e1833 --- /dev/null +++ b/code/vezba9/dut/calc_top.v @@ -0,0 +1,278 @@ +// Library: calc1 +// Module: Top-level wiring +// Author: Naseer Siddique + +//`include "alu_input_stage.v" +//`include "alu_output_stage.v" +//`include "exdbin_mac.v" +//`include "holdreg.v" +//`include "mux_out.v" +//`include "shifter.v" +//`include "priority.v" + +module calc_top (out_data1, out_data2, out_data3, out_data4, out_resp1, out_resp2, out_resp3, out_resp4, c_clk, req1_cmd_in, req1_data_in, req2_cmd_in, req2_data_in, req3_cmd_in, req3_data_in, req4_cmd_in, req4_data_in, reset); + + output [0:31] out_data1, + out_data2, + out_data3, + out_data4; + + output [0:1] out_resp1, + out_resp2, + out_resp3, + out_resp4; + + + input c_clk; + + input [0:3] req1_cmd_in, + req2_cmd_in, + req3_cmd_in, + req4_cmd_in; + + input [0:31] req1_data_in, + req2_data_in, + req3_data_in, + req4_data_in; + + input [1:7] reset; + + wire [0:63] add_sum, + fxu_areg_q, + fxu_breg_q, + shift_out, + shift_places, + shift_val; + + wire [0:31] hold1_data1, + hold1_data2, + hold2_data1, + hold2_data2, + hold3_data1, + hold3_data2, + hold4_data1, + hold4_data2, + mux1_req_data1, + mux1_req_data2, + mux2_req_data1, + mux2_req_data2, + mux3_req_data1, + mux3_req_data2, + mux4_req_data1, + mux4_req_data2; + + wire [0:3] hold1_prio_req, + hold2_prio_req, + hold3_prio_req, + hold4_prio_req, + prio_alu1_in_cmd, + prio_alu2_in_cmd; + + wire [0:1] mux1_req_resp1, + mux1_req_resp2, + mux2_req_resp1, + mux2_req_resp2, + mux3_req_resp1, + mux3_req_resp2, + mux4_req_resp1, + mux4_req_resp2, + prio_alu1_in_req_id, + prio_alu1_out_req_id, + prio_alu2_in_req_id, + prio_alu2_out_req_id; + + wire prio_alu1_out_vld, + prio_alu2_out_vld, + add_ovfl, + shift_ovfl; + + wire [0:3] error_found; + assign error_found = 4'b0000; + + exdbin_mac adder ( + .alu_cmd ( prio_alu1_in_cmd[0:3] ), + .bin_ovfl ( add_ovfl ), + .bin_sum ( add_sum[0:63] ), + .fxu_areg_q ( fxu_areg_q[0:63] ), + .fxu_breg_q ( fxu_breg_q[0:63] ), + .local_error_found ( error_found[0] ) + ); + + + holdreg holdreg1( + .c_clk ( c_clk ), + .hold_data1 ( hold1_data1[0:31] ), + .hold_data2 ( hold1_data2[0:31] ), + .hold_prio_req ( hold1_prio_req[0:3] ), + .req_cmd_in ( req1_cmd_in[0:3] ), + .req_data_in ( req1_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg2( + .c_clk ( c_clk ), + .hold_data1 ( hold2_data1[0:31] ), + .hold_data2 ( hold2_data2[0:31] ), + .hold_prio_req ( hold2_prio_req[0:3] ), + .req_cmd_in ( req2_cmd_in[0:3] ), + .req_data_in ( req2_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg3( + .c_clk ( c_clk ), + .hold_data1 ( hold3_data1[0:31] ), + .hold_data2 ( hold3_data2[0:31] ), + .hold_prio_req ( hold3_prio_req[0:3] ), + .req_cmd_in ( req3_cmd_in[0:3] ), + .req_data_in ( req3_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + holdreg holdreg4( + .c_clk ( c_clk ), + .hold_data1 ( hold4_data1[0:31] ), + .hold_data2 ( hold4_data2[0:31] ), + .hold_prio_req ( hold4_prio_req[0:3] ), + .req_cmd_in ( req4_cmd_in[0:3] ), + .req_data_in ( req4_data_in[0:31] ), + .reset ( reset [1: 7] ) + ); + + alu_input_stage in_stage1( + .alu_data1 ( fxu_areg_q[0:63]), + .alu_data2 ( fxu_breg_q[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu1_in_req_id[0:1]) + ); + + alu_input_stage in_stage2( + .alu_data1 ( shift_val[0:63]), + .alu_data2 ( shift_places[0:63]), + .hold1_data1 ( hold1_data1[0:31]), + .hold1_data2 ( hold1_data2[0:31]), + .hold2_data1 ( hold2_data1[0:31]), + .hold2_data2 ( hold2_data2[0:31]), + .hold3_data1 ( hold3_data1[0:31]), + .hold3_data2 ( hold3_data2[0:31]), + .hold4_data1 ( hold4_data1[0:31]), + .hold4_data2 ( hold4_data2[0:31]), + .prio_alu_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu_in_req_id ( prio_alu2_in_req_id[0:1]) + ); + + mux_out mux_out1( + .req_data1 ( mux1_req_data1[0:31]), + .req_data2 ( mux1_req_data2[0:31]), + .req_data ( out_data1[0:31]), + .req_resp1 ( mux1_req_resp1[0:1]), + .req_resp2 ( mux1_req_resp2[0:1]), + .req_resp ( out_resp1[0:1]) + ); + + mux_out mux_out2( + .req_data1 ( mux2_req_data1[0:31]), + .req_data2 ( mux2_req_data2[0:31]), + .req_data ( out_data2[0:31]), + .req_resp1 ( mux2_req_resp1[0:1]), + .req_resp2 ( mux2_req_resp2[0:1]), + .req_resp ( out_resp2[0:1]) + ); + + mux_out mux_out3( + .req_data1 ( mux3_req_data1[0:31]), + .req_data2 ( mux3_req_data2[0:31]), + .req_data ( out_data3[0:31]), + .req_resp1 ( mux3_req_resp1[0:1]), + .req_resp2 ( mux3_req_resp2[0:1]), + .req_resp ( out_resp3[0:1]) + ); + + mux_out mux_out4( + .req_data1 ( mux4_req_data1[0:31]), + .req_data2 ( mux4_req_data2[0:31]), + .req_data ( out_data4[0:31]), + .req_resp1 ( mux4_req_resp1[0:1]), + .req_resp2 ( mux4_req_resp2[0:1]), + .req_resp ( out_resp4[0:1]) + ); + + alu_output_stage out_stage1( + .alu_overflow ( add_ovfl), + .alu_result ( add_sum[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data1[0:31]), + .out_data2 ( mux2_req_data1[0:31]), + .out_data3 ( mux3_req_data1[0:31]), + .out_data4 ( mux4_req_data1[0:31]), + .out_resp1 ( mux1_req_resp1[0:1]), + .out_resp2 ( mux2_req_resp1[0:1]), + .out_resp3 ( mux3_req_resp1[0:1]), + .out_resp4 ( mux4_req_resp1[0:1]), + .prio_alu_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu1_out_vld ), + .reset ( reset[1:7]) + ); + + alu_output_stage out_stage2( + .alu_overflow ( shift_ovfl), + .alu_result ( shift_out[0:63]), + .c_clk ( c_clk), + .local_error_found ( error_found[2]), + .out_data1 ( mux1_req_data2[0:31]), + .out_data2 ( mux2_req_data2[0:31]), + .out_data3 ( mux3_req_data2[0:31]), + .out_data4 ( mux4_req_data2[0:31]), + .out_resp1 ( mux1_req_resp2[0:1]), + .out_resp2 ( mux2_req_resp2[0:1]), + .out_resp3 ( mux3_req_resp2[0:1]), + .out_resp4 ( mux4_req_resp2[0:1]), + .prio_alu_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu_out_vld ( prio_alu2_out_vld ), + .reset ( reset[1:7]) + ); + + priority1 priority_logic ( + .c_clk ( c_clk), + .hold1_prio_req ( hold1_prio_req[0:3]), + .hold2_prio_req ( hold2_prio_req[0:3]), + .hold3_prio_req ( hold3_prio_req[0:3]), + .hold4_prio_req ( hold4_prio_req[0:3]), + .local_error_found ( error_found[3]), + .prio_alu1_in_cmd ( prio_alu1_in_cmd[0:3]), + .prio_alu1_in_req_id ( prio_alu1_in_req_id[0:1]), + .prio_alu1_out_req_id ( prio_alu1_out_req_id[0:1]), + .prio_alu1_out_vld ( prio_alu1_out_vld), + .prio_alu2_in_cmd ( prio_alu2_in_cmd[0:3]), + .prio_alu2_in_req_id ( prio_alu2_in_req_id[0:1]), + .prio_alu2_out_req_id ( prio_alu2_out_req_id[0:1]), + .prio_alu2_out_vld ( prio_alu2_out_vld), + .reset ( reset[1:7]) + ); + + shifter shifter1( + .bin_ovfl ( shift_ovfl), + .local_error_found ( error_found[1]), + .shift_cmd ( prio_alu2_in_cmd[0:3]), + .shift_out ( shift_out[0:63]), + .shift_places ( shift_places[0:63]), + .shift_val ( shift_val[0:63]) + ); + +endmodule // calc1_top + + + + + + + diff --git a/code/vezba9/dut/exdbin_mac.v b/code/vezba9/dut/exdbin_mac.v new file mode 100644 index 0000000..59593ef --- /dev/null +++ b/code/vezba9/dut/exdbin_mac.v @@ -0,0 +1,1279 @@ +// Library: calc2 +// Module: 64-bit binary adder +// Author: Naseer Siddique + +module exdbin_mac (bin_ovfl, bin_sum, alu_cmd, fxu_areg_q, local_error_found, fxu_breg_q); + + output bin_ovfl; + output [0:63] bin_sum; + + wire bin_ovfl; + wire[0:63] bin_sum; + + input [0:3] alu_cmd; + input [0:63] fxu_areg_q, fxu_breg_q; + input local_error_found; + + wire [0:63] p, p_n, g, h_n, d, a, a_n, b, b_n; + wire [0:63] fxu_areg_n_q, fxu_breg_n_q; + + wire [0:64] c, c_n; + wire [0:31] G2, P2; + wire [0:15] Gn, Pn; + wire [0:7] Gb, Pb, d8; + wire [0:5] G2b, P2b; + wire ds; + wire bin_a_z_q, bin_add_45_q; + wire [0:7] bin_by_f_e_q; + wire bin_cin_q, bin_ex_sign_q, bin_ex_sign_op_q; + wire bin_sub_45_q, bin_sub_q; + wire bin_c_0; + wire bin_c_32; + wire bin_sum_0_63_z, bin_sum_32_63_z, bin_sum_33_63_z; + wire [0:63] bruce_bin_sum; + + + integer A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S; + + assign bin_a_z_q = 1'b0; + assign bin_add_45_q = (alu_cmd[0:3] == 4'b0001) ? 1'b1: 1'b0; + assign bin_by_f_e_q = 8'b0; + assign bin_cin_q = 1'b0; + assign bin_ex_sign_q = 1'b0; + assign bin_ex_sign_op_q = 1'b0; + assign bin_sub_45_q = ( alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + assign bin_sub_q = (alu_cmd[0:3] == 4'b0010) ? 1'b1 : 1'b0; + + assign fxu_areg_n_q[0] = ~fxu_areg_q[0]; + assign fxu_breg_n_q[0] = ~fxu_breg_q[0]; + + assign fxu_areg_n_q[1] = ~fxu_areg_q[1]; + assign fxu_breg_n_q[1] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[2] = ~fxu_areg_q[2]; + assign fxu_breg_n_q[2] = ~fxu_breg_q[2]; + + assign fxu_areg_n_q[3] = ~fxu_areg_q[3]; + assign fxu_breg_n_q[3] = ~fxu_breg_q[3]; + + assign fxu_areg_n_q[4] = ~fxu_areg_q[4]; + assign fxu_breg_n_q[4] = ~fxu_breg_q[4]; + + assign fxu_areg_n_q[5] = ~fxu_areg_q[5]; + assign fxu_breg_n_q[5] = ~fxu_breg_q[5]; + + assign fxu_areg_n_q[6] = ~fxu_areg_q[6]; + assign fxu_breg_n_q[6] = ~fxu_breg_q[6]; + + assign fxu_areg_n_q[7] = ~fxu_areg_q[7]; + assign fxu_breg_n_q[7] = ~fxu_breg_q[7]; + + assign fxu_areg_n_q[8] = ~fxu_areg_q[8]; + assign fxu_breg_n_q[8] = ~fxu_breg_q[8]; + + assign fxu_areg_n_q[9] = ~fxu_areg_q[9]; + assign fxu_breg_n_q[9] = ~fxu_breg_q[9]; + + assign fxu_areg_n_q[10] = ~fxu_areg_q[10]; + assign fxu_breg_n_q[10] = ~fxu_breg_q[10]; + + assign fxu_areg_n_q[11] = ~fxu_areg_q[11]; + assign fxu_breg_n_q[11] = ~fxu_breg_q[1]; + + assign fxu_areg_n_q[12] = ~fxu_areg_q[12]; + assign fxu_breg_n_q[12] = ~fxu_breg_q[12]; + + assign fxu_areg_n_q[13] = ~fxu_areg_q[13]; + assign fxu_breg_n_q[13] = ~fxu_breg_q[13]; + + assign fxu_areg_n_q[14] = ~fxu_areg_q[14]; + assign fxu_breg_n_q[14] = ~fxu_breg_q[14]; + + assign fxu_areg_n_q[15] = ~fxu_areg_q[15]; + assign fxu_breg_n_q[15] = ~fxu_breg_q[15]; + + assign fxu_areg_n_q[16] = ~fxu_areg_q[16]; + assign fxu_breg_n_q[16] = ~fxu_breg_q[16]; + + assign fxu_areg_n_q[17] = ~fxu_areg_q[17]; + assign fxu_breg_n_q[17] = ~fxu_breg_q[17]; + + assign fxu_areg_n_q[18] = ~fxu_areg_q[18]; + assign fxu_breg_n_q[18] = ~fxu_breg_q[18]; + + assign fxu_areg_n_q[19] = ~fxu_areg_q[19]; + assign fxu_breg_n_q[19] = ~fxu_breg_q[19]; + + assign fxu_areg_n_q[20] = ~fxu_areg_q[20]; + assign fxu_breg_n_q[20] = ~fxu_breg_q[20]; + + assign fxu_areg_n_q[21] = ~fxu_areg_q[21]; + assign fxu_breg_n_q[21] = ~fxu_breg_q[21]; + + assign fxu_areg_n_q[22] = ~fxu_areg_q[22]; + assign fxu_breg_n_q[22] = ~fxu_breg_q[22]; + + assign fxu_areg_n_q[23] = ~fxu_areg_q[23]; + assign fxu_breg_n_q[23] = ~fxu_breg_q[23]; + + assign fxu_areg_n_q[24] = ~fxu_areg_q[24]; + assign fxu_breg_n_q[24] = ~fxu_breg_q[24]; + + assign fxu_areg_n_q[25] = ~fxu_areg_q[25]; + assign fxu_breg_n_q[25] = ~fxu_breg_q[25]; + + assign fxu_areg_n_q[26] = ~fxu_areg_q[26]; + assign fxu_breg_n_q[26] = ~fxu_breg_q[26]; + + assign fxu_areg_n_q[27] = ~fxu_areg_q[27]; + assign fxu_breg_n_q[27] = ~fxu_breg_q[27]; + + assign fxu_areg_n_q[28] = ~fxu_areg_q[28]; + assign fxu_breg_n_q[28] = ~fxu_breg_q[28]; + + assign fxu_areg_n_q[29] = ~fxu_areg_q[29]; + assign fxu_breg_n_q[29] = ~fxu_breg_q[29]; + + assign fxu_areg_n_q[30] = ~fxu_areg_q[30]; + assign fxu_breg_n_q[30] = ~fxu_breg_q[30]; + + assign fxu_areg_n_q[31] = ~fxu_areg_q[31]; + assign fxu_breg_n_q[31] = ~fxu_breg_q[31]; + + assign fxu_areg_n_q[32] = ~fxu_areg_q[32]; + assign fxu_breg_n_q[32] = ~fxu_breg_q[32]; + + assign fxu_areg_n_q[33] = ~fxu_areg_q[33]; + assign fxu_breg_n_q[33] = ~fxu_breg_q[33]; + + assign fxu_areg_n_q[34] = ~fxu_areg_q[34]; + assign fxu_breg_n_q[34] = ~fxu_breg_q[34]; + + assign fxu_areg_n_q[35] = ~fxu_areg_q[35]; + assign fxu_breg_n_q[35] = ~fxu_breg_q[35]; + + assign fxu_areg_n_q[36] = ~fxu_areg_q[36]; + assign fxu_breg_n_q[36] = ~fxu_breg_q[36]; + + assign fxu_areg_n_q[37] = ~fxu_areg_q[37]; + assign fxu_breg_n_q[37] = ~fxu_breg_q[37]; + + assign fxu_areg_n_q[38] = ~fxu_areg_q[38]; + assign fxu_breg_n_q[38] = ~fxu_breg_q[38]; + + assign fxu_areg_n_q[39] = ~fxu_areg_q[39]; + assign fxu_breg_n_q[39] = ~fxu_breg_q[39]; + + assign fxu_areg_n_q[40] = ~fxu_areg_q[40]; + assign fxu_breg_n_q[40] = ~fxu_breg_q[40]; + + assign fxu_areg_n_q[41] = ~fxu_areg_q[41]; + assign fxu_breg_n_q[41] = ~fxu_breg_q[41]; + + assign fxu_areg_n_q[42] = ~fxu_areg_q[42]; + assign fxu_breg_n_q[42] = ~fxu_breg_q[42]; + + assign fxu_areg_n_q[43] = ~fxu_areg_q[43]; + assign fxu_breg_n_q[43] = ~fxu_breg_q[43]; + + assign fxu_areg_n_q[44] = ~fxu_areg_q[44]; + assign fxu_breg_n_q[44] = ~fxu_breg_q[44]; + + assign fxu_areg_n_q[45] = ~fxu_areg_q[45]; + assign fxu_breg_n_q[45] = ~fxu_breg_q[45]; + + assign fxu_areg_n_q[46] = ~fxu_areg_q[46]; + assign fxu_breg_n_q[46] = ~fxu_breg_q[46]; + + assign fxu_areg_n_q[47] = ~fxu_areg_q[47]; + assign fxu_breg_n_q[47] = ~fxu_breg_q[47]; + + assign fxu_areg_n_q[48] = ~fxu_areg_q[48]; + assign fxu_breg_n_q[48] = ~fxu_breg_q[48]; + + assign fxu_areg_n_q[49] = ~fxu_areg_q[49]; + assign fxu_breg_n_q[49] = ~fxu_breg_q[49]; + + assign fxu_areg_n_q[50] = ~fxu_areg_q[50]; + assign fxu_breg_n_q[50] = ~fxu_breg_q[50]; + + assign fxu_areg_n_q[51] = ~fxu_areg_q[51]; + assign fxu_breg_n_q[51] = ~fxu_breg_q[51]; + + assign fxu_areg_n_q[52] = ~fxu_areg_q[52]; + assign fxu_breg_n_q[52] = ~fxu_breg_q[52]; + + assign fxu_areg_n_q[53] = ~fxu_areg_q[53]; + assign fxu_breg_n_q[53] = ~fxu_breg_q[53]; + + assign fxu_areg_n_q[54] = ~fxu_areg_q[54]; + assign fxu_breg_n_q[54] = ~fxu_breg_q[54]; + + assign fxu_areg_n_q[55] = ~fxu_areg_q[55]; + assign fxu_breg_n_q[55] = ~fxu_breg_q[55]; + + assign fxu_areg_n_q[56] = ~fxu_areg_q[56]; + assign fxu_breg_n_q[56] = ~fxu_breg_q[56]; + + assign fxu_areg_n_q[57] = ~fxu_areg_q[57]; + assign fxu_breg_n_q[57] = ~fxu_breg_q[57]; + + assign fxu_areg_n_q[58] = ~fxu_areg_q[58]; + assign fxu_breg_n_q[58] = ~fxu_breg_q[58]; + + assign fxu_areg_n_q[59] = ~fxu_areg_q[59]; + assign fxu_breg_n_q[59] = ~fxu_breg_q[59]; + + assign fxu_areg_n_q[60] = ~fxu_areg_q[60]; + assign fxu_breg_n_q[60] = ~fxu_breg_q[60]; + + assign fxu_areg_n_q[61] = ~fxu_areg_q[61]; + assign fxu_breg_n_q[61] = ~fxu_breg_q[61]; + + assign fxu_areg_n_q[62] = ~fxu_areg_q[62]; + assign fxu_breg_n_q[62] = ~fxu_breg_q[62]; + + assign fxu_areg_n_q[63] = ~fxu_areg_q[63]; + assign fxu_breg_n_q[63] = ~fxu_breg_q[63]; + + assign a[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0]; + assign a[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+1]; + assign a[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+2]; + assign a[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+3]; + assign a[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+4]; + assign a[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+5]; + assign a[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+6]; + assign a[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b0 : fxu_areg_q[8*0+7]; + assign a_n[8*0] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0]; + assign a_n[8*0+1] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+1]; + assign a_n[8*0+2] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+2]; + assign a_n[8*0+3] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+3]; + assign a_n[8*0+4] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+4]; + assign a_n[8*0+5] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+5]; + assign a_n[8*0+6] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+6]; + assign a_n[8*0+7] = (bin_a_z_q || bin_by_f_e_q[0]) ? 1'b1 : fxu_areg_n_q[8*0+7]; + + assign a[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1]; + assign a[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+1]; + assign a[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+2]; + assign a[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+3]; + assign a[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+4]; + assign a[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+5]; + assign a[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+6]; + assign a[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b0 : fxu_areg_q[8*1+7]; + assign a_n[8*1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1]; + assign a_n[8*1+1] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+1]; + assign a_n[8*1+2] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+2]; + assign a_n[8*1+3] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+3]; + assign a_n[8*1+4] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+4]; + assign a_n[8*1+5] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+5]; + assign a_n[8*1+6] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+6]; + assign a_n[8*1+7] = (bin_a_z_q || bin_by_f_e_q[1]) ? 1'b1 : fxu_areg_n_q[8*1+7]; + + assign a[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2]; + assign a[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+1]; + assign a[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+2]; + assign a[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+3]; + assign a[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+4]; + assign a[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+5]; + assign a[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+6]; + assign a[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b0 : fxu_areg_q[8*2+7]; + assign a_n[8*2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2]; + assign a_n[8*2+1] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+1]; + assign a_n[8*2+2] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+2]; + assign a_n[8*2+3] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+3]; + assign a_n[8*2+4] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+4]; + assign a_n[8*2+5] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+5]; + assign a_n[8*2+6] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+6]; + assign a_n[8*2+7] = (bin_a_z_q || bin_by_f_e_q[2]) ? 1'b1 : fxu_areg_n_q[8*2+7]; + + assign a[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3]; + assign a[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+1]; + assign a[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+2]; + assign a[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+3]; + assign a[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+4]; + assign a[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+5]; + assign a[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+6]; + assign a[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b0 : fxu_areg_q[8*3+7]; + assign a_n[8*3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3]; + assign a_n[8*3+1] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+1]; + assign a_n[8*3+2] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+2]; + assign a_n[8*3+3] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+3]; + assign a_n[8*3+4] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+4]; + assign a_n[8*3+5] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+5]; + assign a_n[8*3+6] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+6]; + assign a_n[8*3+7] = (bin_a_z_q || bin_by_f_e_q[3]) ? 1'b1 : fxu_areg_n_q[8*3+7]; + + assign a[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4]; + assign a[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+1]; + assign a[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+2]; + assign a[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+3]; + assign a[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+4]; + assign a[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+5]; + assign a[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+6]; + assign a[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b0 : fxu_areg_q[8*4+7]; + assign a_n[8*4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4]; + assign a_n[8*4+1] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+1]; + assign a_n[8*4+2] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+2]; + assign a_n[8*4+3] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+3]; + assign a_n[8*4+4] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+4]; + assign a_n[8*4+5] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+5]; + assign a_n[8*4+6] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+6]; + assign a_n[8*4+7] = (bin_a_z_q || bin_by_f_e_q[4]) ? 1'b1 : fxu_areg_n_q[8*4+7]; + + assign a[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5]; + assign a[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+1]; + assign a[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+2]; + assign a[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+3]; + assign a[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+4]; + assign a[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+5]; + assign a[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+6]; + assign a[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b0 : fxu_areg_q[8*5+7]; + assign a_n[8*5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5]; + assign a_n[8*5+1] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+1]; + assign a_n[8*5+2] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+2]; + assign a_n[8*5+3] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+3]; + assign a_n[8*5+4] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+4]; + assign a_n[8*5+5] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+5]; + assign a_n[8*5+6] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+6]; + assign a_n[8*5+7] = (bin_a_z_q || bin_by_f_e_q[5]) ? 1'b1 : fxu_areg_n_q[8*5+7]; + + assign a[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6]; + assign a[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+1]; + assign a[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+2]; + assign a[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+3]; + assign a[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+4]; + assign a[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+5]; + assign a[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+6]; + assign a[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b0 : fxu_areg_q[8*6+7]; + assign a_n[8*6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6]; + assign a_n[8*6+1] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+1]; + assign a_n[8*6+2] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+2]; + assign a_n[8*6+3] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+3]; + assign a_n[8*6+4] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+4]; + assign a_n[8*6+5] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+5]; + assign a_n[8*6+6] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+6]; + assign a_n[8*6+7] = (bin_a_z_q || bin_by_f_e_q[6]) ? 1'b1 : fxu_areg_n_q[8*6+7]; + + assign a[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7]; + assign a[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+1]; + assign a[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+2]; + assign a[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+3]; + assign a[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+4]; + assign a[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+5]; + assign a[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+6]; + assign a[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b0 : fxu_areg_q[8*7+7]; + assign a_n[8*7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7]; + assign a_n[8*7+1] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+1]; + assign a_n[8*7+2] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+2]; + assign a_n[8*7+3] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+3]; + assign a_n[8*7+4] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+4]; + assign a_n[8*7+5] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+5]; + assign a_n[8*7+6] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+6]; + assign a_n[8*7+7] = (bin_a_z_q || bin_by_f_e_q[7]) ? 1'b1 : fxu_areg_n_q[8*7+7]; + + + assign b[8*0] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0] : fxu_breg_q[8*0]; + assign b[8*0+1] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+1] : fxu_breg_q[8*0+1]; + assign b[8*0+2] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+2] : fxu_breg_q[8*0+2]; + assign b[8*0+3] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+3] : fxu_breg_q[8*0+3]; + assign b[8*0+4] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+4] : fxu_breg_q[8*0+4]; + assign b[8*0+5] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+5] : fxu_breg_q[8*0+5]; + assign b[8*0+6] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+6] : fxu_breg_q[8*0+6]; + assign b[8*0+7] = (bin_by_f_e_q[0]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*0+7] : fxu_breg_q[8*0+7]; + assign b_n[8*0] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0] : fxu_breg_n_q[8*0]; + assign b_n[8*0+1] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+1] : fxu_breg_n_q[8*0+1]; + assign b_n[8*0+2] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+2] : fxu_breg_n_q[8*0+2]; + assign b_n[8*0+3] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+3] : fxu_breg_n_q[8*0+3]; + assign b_n[8*0+4] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+4] : fxu_breg_n_q[8*0+4]; + assign b_n[8*0+5] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+5] : fxu_breg_n_q[8*0+5]; + assign b_n[8*0+6] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+6] : fxu_breg_n_q[8*0+6]; + assign b_n[8*0+7] = (bin_by_f_e_q[0]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*0+7] : fxu_breg_n_q[8*0+7]; + + assign b[8*1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1] : fxu_breg_q[8*1]; + assign b[8*1+1] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+1] : fxu_breg_q[8*1+1]; + assign b[8*1+2] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+2] : fxu_breg_q[8*1+2]; + assign b[8*1+3] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+3] : fxu_breg_q[8*1+3]; + assign b[8*1+4] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+4] : fxu_breg_q[8*1+4]; + assign b[8*1+5] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+5] : fxu_breg_q[8*1+5]; + assign b[8*1+6] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+6] : fxu_breg_q[8*1+6]; + assign b[8*1+7] = (bin_by_f_e_q[1]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*1+7] : fxu_breg_q[8*1+7]; + assign b_n[8*1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1] : fxu_breg_n_q[8*1]; + assign b_n[8*1+1] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+1] : fxu_breg_n_q[8*1+1]; + assign b_n[8*1+2] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+2] : fxu_breg_n_q[8*1+2]; + assign b_n[8*1+3] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+3] : fxu_breg_n_q[8*1+3]; + assign b_n[8*1+4] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+4] : fxu_breg_n_q[8*1+4]; + assign b_n[8*1+5] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+5] : fxu_breg_n_q[8*1+5]; + assign b_n[8*1+6] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+6] : fxu_breg_n_q[8*1+6]; + assign b_n[8*1+7] = (bin_by_f_e_q[1]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*1+7] : fxu_breg_n_q[8*1+7]; + + assign b[8*2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2] : fxu_breg_q[8*2]; + assign b[8*2+1] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+1] : fxu_breg_q[8*2+1]; + assign b[8*2+2] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+2] : fxu_breg_q[8*2+2]; + assign b[8*2+3] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+3] : fxu_breg_q[8*2+3]; + assign b[8*2+4] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+4] : fxu_breg_q[8*2+4]; + assign b[8*2+5] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+5] : fxu_breg_q[8*2+5]; + assign b[8*2+6] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+6] : fxu_breg_q[8*2+6]; + assign b[8*2+7] = (bin_by_f_e_q[2]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*2+7] : fxu_breg_q[8*2+7]; + assign b_n[8*2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2] : fxu_breg_n_q[8*2]; + assign b_n[8*2+1] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+1] : fxu_breg_n_q[8*2+1]; + assign b_n[8*2+2] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+2] : fxu_breg_n_q[8*2+2]; + assign b_n[8*2+3] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+3] : fxu_breg_n_q[8*2+3]; + assign b_n[8*2+4] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+4] : fxu_breg_n_q[8*2+4]; + assign b_n[8*2+5] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+5] : fxu_breg_n_q[8*2+5]; + assign b_n[8*2+6] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+6] : fxu_breg_n_q[8*2+6]; + assign b_n[8*2+7] = (bin_by_f_e_q[2]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*2+7] : fxu_breg_n_q[8*2+7]; + + assign b[8*3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3] : fxu_breg_q[8*3]; + assign b[8*3+1] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+1] : fxu_breg_q[8*3+1]; + assign b[8*3+2] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+2] : fxu_breg_q[8*3+2]; + assign b[8*3+3] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+3] : fxu_breg_q[8*3+3]; + assign b[8*3+4] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+4] : fxu_breg_q[8*3+4]; + assign b[8*3+5] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+5] : fxu_breg_q[8*3+5]; + assign b[8*3+6] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+6] : fxu_breg_q[8*3+6]; + assign b[8*3+7] = (bin_by_f_e_q[3]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*3+7] : fxu_breg_q[8*3+7]; + assign b_n[8*3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3] : fxu_breg_n_q[8*3]; + assign b_n[8*3+1] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+1] : fxu_breg_n_q[8*3+1]; + assign b_n[8*3+2] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+2] : fxu_breg_n_q[8*3+2]; + assign b_n[8*3+3] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+3] : fxu_breg_n_q[8*3+3]; + assign b_n[8*3+4] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+4] : fxu_breg_n_q[8*3+4]; + assign b_n[8*3+5] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+5] : fxu_breg_n_q[8*3+5]; + assign b_n[8*3+6] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+6] : fxu_breg_n_q[8*3+6]; + assign b_n[8*3+7] = (bin_by_f_e_q[3]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*3+7] : fxu_breg_n_q[8*3+7]; + + assign b[8*6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6] : fxu_breg_q[8*6]; + assign b[8*6+1] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+1] : fxu_breg_q[8*6+1]; + assign b[8*6+2] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+2] : fxu_breg_q[8*6+2]; + assign b[8*6+3] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+3] : (local_error_found) ? fxu_breg_q[8*6+3] : fxu_breg_q[8*6+2]; + assign b[8*6+4] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+4] : fxu_breg_q[8*6+4]; + assign b[8*6+5] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+5] : fxu_breg_q[8*6+5]; + assign b[8*6+6] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+6] : fxu_breg_q[8*6+6]; + assign b[8*6+7] = (bin_by_f_e_q[6]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*6+7] : fxu_breg_q[8*6+7]; + assign b_n[8*6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6] : fxu_breg_n_q[8*6]; + assign b_n[8*6+1] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+1] : fxu_breg_n_q[8*6+1]; + assign b_n[8*6+2] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+2] : fxu_breg_n_q[8*6+2]; + assign b_n[8*6+3] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+3] : fxu_breg_n_q[8*6+3]; + assign b_n[8*6+4] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+4] : fxu_breg_n_q[8*6+4]; + assign b_n[8*6+5] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+5] : fxu_breg_n_q[8*6+5]; + assign b_n[8*6+6] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+6] : fxu_breg_n_q[8*6+6]; + assign b_n[8*6+7] = (bin_by_f_e_q[6]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*6+7] : fxu_breg_n_q[8*6+7]; + + assign b[8*7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7] : fxu_breg_q[8*7]; + assign b[8*7+1] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+1] : fxu_breg_q[8*7+1]; + assign b[8*7+2] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+2] : fxu_breg_q[8*7+2]; + assign b[8*7+3] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+3] : (local_error_found) ? fxu_breg_q[8*7+3] : fxu_breg_q[8*7+2]; + assign b[8*7+4] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+4] : fxu_breg_q[8*7+4]; + assign b[8*7+5] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+5] : fxu_breg_q[8*7+5]; + assign b[8*7+6] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+6] : fxu_breg_q[8*7+6]; + assign b[8*7+7] = (bin_by_f_e_q[7]) ? 1'b1 : (bin_sub_q) ? fxu_breg_n_q[8*7+7] : fxu_breg_q[8*7+7]; + assign b_n[8*7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7] : fxu_breg_n_q[8*7]; + assign b_n[8*7+1] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+1] : fxu_breg_n_q[8*7+1]; + assign b_n[8*7+2] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+2] : fxu_breg_n_q[8*7+2]; + assign b_n[8*7+3] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+3] : fxu_breg_n_q[8*7+3]; + assign b_n[8*7+4] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+4] : fxu_breg_n_q[8*7+4]; + assign b_n[8*7+5] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+5] : fxu_breg_n_q[8*7+5]; + assign b_n[8*7+6] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+6] : fxu_breg_n_q[8*7+6]; + assign b_n[8*7+7] = (bin_by_f_e_q[7]) ? 1'b0 : (bin_sub_q) ? fxu_breg_q[8*7+7] : fxu_breg_n_q[8*7+7]; + + assign b[8*4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4] : (bin_add_45_q) ? fxu_breg_q[8*4] : 1'b0; + assign b[8*4+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+1] : (bin_add_45_q) ? fxu_breg_q[8*4+1] : 1'b0; + assign b[8*4+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+2] : (bin_add_45_q) ? fxu_breg_q[8*4+2] : 1'b0; + assign b[8*4+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+3] : (bin_add_45_q) ? fxu_breg_q[8*4+3] : 1'b0; + assign b[8*4+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+4] : (bin_add_45_q) ? fxu_breg_q[8*4+4] : 1'b0; + assign b[8*4+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+5] : (bin_add_45_q) ? fxu_breg_q[8*4+5] : 1'b0; + assign b[8*4+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+6] : (bin_add_45_q) ? fxu_breg_q[8*4+6] : 1'b0; + assign b[8*4+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*4+7] : (bin_add_45_q) ? fxu_breg_q[8*4+7] : 1'b0; + assign b_n[8*4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4] : (bin_add_45_q) ? fxu_breg_n_q[8*4] : 1'b0; + assign b_n[8*4+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+1] : (bin_add_45_q) ? fxu_breg_n_q[8*4+1] : 1'b0; + assign b_n[8*4+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+2] : (bin_add_45_q) ? fxu_breg_n_q[8*4+2] : 1'b0; + assign b_n[8*4+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+3] : (bin_add_45_q) ? fxu_breg_n_q[8*4+3] : 1'b0; + assign b_n[8*4+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+4] : (bin_add_45_q) ? fxu_breg_n_q[8*4+4] : 1'b0; + assign b_n[8*4+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+5] : (bin_add_45_q) ? fxu_breg_n_q[8*4+5] : 1'b0; + assign b_n[8*4+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+6] : (bin_add_45_q) ? fxu_breg_n_q[8*4+6] : 1'b0; + assign b_n[8*4+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[4]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*4+7] : (bin_add_45_q) ? fxu_breg_n_q[8*4+7] : 1'b0; + + assign b[8*5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5] : (bin_add_45_q) ? fxu_breg_q[8*5] : 1'b0; + assign b[8*5+1] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+1] : (bin_add_45_q) ? fxu_breg_q[8*5+1] : 1'b0; + assign b[8*5+2] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+2] : (bin_add_45_q) ? fxu_breg_q[8*5+2] : 1'b0; + assign b[8*5+3] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+3] : (bin_add_45_q) ? fxu_breg_q[8*5+3] : 1'b0; + assign b[8*5+4] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+4] : (bin_add_45_q) ? fxu_breg_q[8*5+4] : 1'b0; + assign b[8*5+5] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+5] : (bin_add_45_q) ? fxu_breg_q[8*5+5] : 1'b0; + assign b[8*5+6] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+6] : (bin_add_45_q) ? fxu_breg_q[8*5+6] : 1'b0; + assign b[8*5+7] = (bin_ex_sign_op_q) ? bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b1 : (bin_sub_45_q) ? fxu_breg_n_q[8*5+7] : (bin_add_45_q) ? fxu_breg_q[8*5+7] : 1'b0; + assign b_n[8*5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5] : (bin_add_45_q) ? fxu_breg_n_q[8*5] : 1'b0; + assign b_n[8*5+1] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+1] : (bin_add_45_q) ? fxu_breg_n_q[8*5+1] : 1'b0; + assign b_n[8*5+2] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+2] : (bin_add_45_q) ? fxu_breg_n_q[8*5+2] : 1'b0; + assign b_n[8*5+3] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+3] : (bin_add_45_q) ? fxu_breg_n_q[8*5+3] : 1'b0; + assign b_n[8*5+4] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+4] : (bin_add_45_q) ? fxu_breg_n_q[8*5+4] : 1'b0; + assign b_n[8*5+5] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+5] : (bin_add_45_q) ? fxu_breg_n_q[8*5+5] : 1'b0; + assign b_n[8*5+6] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+6] : (bin_add_45_q) ? fxu_breg_n_q[8*5+6] : 1'b0; + assign b_n[8*5+7] = (bin_ex_sign_op_q) ? ~bin_ex_sign_q : (bin_by_f_e_q[5]) ? 1'b0 : (bin_sub_45_q) ? fxu_breg_q[8*5+7] : (bin_add_45_q) ? fxu_breg_n_q[8*5+7] : 1'b0; + + assign c[64] = bin_cin_q; + assign c_n[64] = (~bin_cin_q); + + assign bruce_bin_sum[0] = (b_n[0] & a_n[0] & c[0+1]) | (b_n[0] & a[0] & c_n[0+1]) | (b[0] & a_n[0] & c_n[0+1]) | (b[0] & a[0] & c[0+1]); + assign p[0] = a[0] | b[0]; + assign p_n[0] = ~p[0]; + assign g[0] = a[0] & b[0]; + assign h_n[0] = g[0] | p_n[0]; + + assign bruce_bin_sum[1] = (b_n[1] & a_n[1] & c[1+1]) | (b_n[1] & a[1] & c_n[1+1]) | (b[1] & a_n[1] & c_n[1+1]) | (b[1] & a[1] & c[1+1]); + assign p[1] = a[1] | b[1]; + assign p_n[1] = ~p[1]; + assign g[1] = a[1] & b[1]; + assign h_n[1] = g[1] | p_n[1]; + + assign bruce_bin_sum[2] = (b_n[2] & a_n[2] & c[2+1]) | (b_n[2] & a[2] & c_n[2+1]) | (b[2] & a_n[2] & c_n[2+1]) | (b[2] & a[2] & c[2+1]); + assign p[2] = a[2] | b[2]; + assign p_n[2] = ~p[2]; + assign g[2] = a[2] & b[2]; + assign h_n[2] = g[2] | p_n[2]; + + assign bruce_bin_sum[3] = (b_n[3] & a_n[3] & c[3+1]) | (b_n[3] & a[3] & c_n[3+1]) | (b[3] & a_n[3] & c_n[3+1]) | (b[3] & a[3] & c[3+1]); + assign p[3] = a[3] | b[3]; + assign p_n[3] = ~p[3]; + assign g[3] = a[3] & b[3]; + assign h_n[3] = g[3] | p_n[3]; + + assign bruce_bin_sum[4] = (b_n[4] & a_n[4] & c[4+1]) | (b_n[4] & a[4] & c_n[4+1]) | (b[4] & a_n[4] & c_n[4+1]) | (b[4] & a[4] & c[4+1]); + assign p[4] = a[4] | b[4]; + assign p_n[4] = ~p[4]; + assign g[4] = a[4] & b[4]; + assign h_n[4] = g[4] | p_n[4]; + + assign bruce_bin_sum[5] = (b_n[5] & a_n[5] & c[5+1]) | (b_n[5] & a[5] & c_n[5+1]) | (b[5] & a_n[5] & c_n[5+1]) | (b[5] & a[5] & c[5+1]); + assign p[5] = a[5] | b[5]; + assign p_n[5] = ~p[5]; + assign g[5] = a[5] & b[5]; + assign h_n[5] = g[5] | p_n[5]; + + assign bruce_bin_sum[6] = (b_n[6] & a_n[6] & c[6+1]) | (b_n[6] & a[6] & c_n[6+1]) | (b[6] & a_n[6] & c_n[6+1]) | (b[6] & a[6] & c[6+1]); + assign p[6] = a[6] | b[6]; + assign p_n[6] = ~p[6]; + assign g[6] = a[6] & b[6]; + assign h_n[6] = g[6] | p_n[6]; + + assign bruce_bin_sum[7] = (b_n[7] & a_n[7] & c[7+1]) | (b_n[7] & a[7] & c_n[7+1]) | (b[7] & a_n[7] & c_n[7+1]) | (b[7] & a[7] & c[7+1]); + assign p[7] = a[7] | b[7]; + assign p_n[7] = ~p[7]; + assign g[7] = a[7] & b[7]; + assign h_n[7] = g[7] | p_n[7]; + + assign bruce_bin_sum[8] = (b_n[8] & a_n[8] & c[8+1]) | (b_n[8] & a[8] & c_n[8+1]) | (b[8] & a_n[8] & c_n[8+1]) | (b[8] & a[8] & c[8+1]); + assign p[8] = a[8] | b[8]; + assign p_n[8] = ~p[8]; + assign g[8] = a[8] & b[8]; + assign h_n[8] = g[8] | p_n[8]; + + assign bruce_bin_sum[9] = (b_n[9] & a_n[9] & c[9+1]) | (b_n[9] & a[9] & c_n[9+1]) | (b[9] & a_n[9] & c_n[9+1]) | (b[9] & a[9] & c[9+1]); + assign p[9] = a[9] | b[9]; + assign p_n[9] = ~p[9]; + assign g[9] = a[9] & b[9]; + assign h_n[9] = g[9] | p_n[9]; + + assign bruce_bin_sum[10] = (b_n[10] & a_n[10] & c[10+1]) | (b_n[10] & a[10] & c_n[10+1]) | (b[10] & a_n[10] & c_n[10+1]) | (b[10] & a[10] & c[10+1]); + assign p[10] = a[10] | b[10]; + assign p_n[10] = ~p[10]; + assign g[10] = a[10] & b[10]; + assign h_n[10] = g[10] | p_n[10]; + + assign bruce_bin_sum[11] = (b_n[11] & a_n[11] & c[11+1]) | (b_n[11] & a[11] & c_n[11+1]) | (b[11] & a_n[11] & c_n[11+1]) | (b[11] & a[11] & c[11+1]); + assign p[11] = a[11] | b[11]; + assign p_n[11] = ~p[11]; + assign g[11] = a[11] & b[11]; + assign h_n[11] = g[11] | p_n[11]; + + assign bruce_bin_sum[12] = (b_n[12] & a_n[12] & c[12+1]) | (b_n[12] & a[12] & c_n[12+1]) | (b[12] & a_n[12] & c_n[12+1]) | (b[12] & a[12] & c[12+1]); + assign p[12] = a[12] | b[12]; + assign p_n[12] = ~p[12]; + assign g[12] = a[12] & b[12]; + assign h_n[12] = g[12] | p_n[12]; + + assign bruce_bin_sum[13] = (b_n[13] & a_n[13] & c[13+1]) | (b_n[13] & a[13] & c_n[13+1]) | (b[13] & a_n[13] & c_n[13+1]) | (b[13] & a[13] & c[13+1]); + assign p[13] = a[13] | b[13]; + assign p_n[13] = ~p[13]; + assign g[13] = a[13] & b[13]; + assign h_n[13] = g[13] | p_n[13]; + + assign bruce_bin_sum[14] = (b_n[14] & a_n[14] & c[14+1]) | (b_n[14] & a[14] & c_n[14+1]) | (b[14] & a_n[14] & c_n[14+1]) | (b[14] & a[14] & c[14+1]); + assign p[14] = a[14] | b[14]; + assign p_n[14] = ~p[14]; + assign g[14] = a[14] & b[14]; + assign h_n[14] = g[14] | p_n[14]; + + assign bruce_bin_sum[15] = (b_n[15] & a_n[15] & c[15+1]) | (b_n[15] & a[15] & c_n[15+1]) | (b[15] & a_n[15] & c_n[15+1]) | (b[15] & a[15] & c[15+1]); + assign p[15] = a[15] | b[15]; + assign p_n[15] = ~p[15]; + assign g[15] = a[15] & b[15]; + assign h_n[15] = g[15] | p_n[15]; + + assign bruce_bin_sum[16] = (b_n[16] & a_n[16] & c[16+1]) | (b_n[16] & a[16] & c_n[16+1]) | (b[16] & a_n[16] & c_n[16+1]) | (b[16] & a[16] & c[16+1]); + assign p[16] = a[16] | b[16]; + assign p_n[16] = ~p[16]; + assign g[16] = a[16] & b[16]; + assign h_n[16] = g[16] | p_n[16]; + + assign bruce_bin_sum[17] = (b_n[17] & a_n[17] & c[17+1]) | (b_n[17] & a[17] & c_n[17+1]) | (b[17] & a_n[17] & c_n[17+1]) | (b[17] & a[17] & c[17+1]); + assign p[17] = a[17] | b[17]; + assign p_n[17] = ~p[17]; + assign g[17] = a[17] & b[17]; + assign h_n[17] = g[17] | p_n[17]; + + assign bruce_bin_sum[18] = (b_n[18] & a_n[18] & c[18+1]) | (b_n[18] & a[18] & c_n[18+1]) | (b[18] & a_n[18] & c_n[18+1]) | (b[18] & a[18] & c[18+1]); + assign p[18] = a[18] | b[18]; + assign p_n[18] = ~p[18]; + assign g[18] = a[18] & b[18]; + assign h_n[18] = g[18] | p_n[18]; + + assign bruce_bin_sum[19] = (b_n[19] & a_n[19] & c[19+1]) | (b_n[19] & a[19] & c_n[19+1]) | (b[19] & a_n[19] & c_n[19+1]) | (b[19] & a[19] & c[19+1]); + assign p[19] = a[19] | b[19]; + assign p_n[19] = ~p[19]; + assign g[19] = a[19] & b[19]; + assign h_n[19] = g[19] | p_n[19]; + + assign bruce_bin_sum[20] = (b_n[20] & a_n[20] & c[20+1]) | (b_n[20] & a[20] & c_n[20+1]) | (b[20] & a_n[20] & c_n[20+1]) | (b[20] & a[20] & c[20+1]); + assign p[20] = a[20] | b[20]; + assign p_n[20] = ~p[20]; + assign g[20] = a[20] & b[20]; + assign h_n[20] = g[20] | p_n[20]; + + assign bruce_bin_sum[21] = (b_n[21] & a_n[21] & c[21+1]) | (b_n[21] & a[21] & c_n[21+1]) | (b[21] & a_n[21] & c_n[21+1]) | (b[21] & a[21] & c[21+1]); + assign p[21] = a[21] | b[21]; + assign p_n[21] = ~p[21]; + assign g[21] = a[21] & b[21]; + assign h_n[21] = g[21] | p_n[21]; + + assign bruce_bin_sum[22] = (b_n[22] & a_n[22] & c[22+1]) | (b_n[22] & a[22] & c_n[22+1]) | (b[22] & a_n[22] & c_n[22+1]) | (b[22] & a[22] & c[22+1]); + assign p[22] = a[22] | b[22]; + assign p_n[22] = ~p[22]; + assign g[22] = a[22] & b[22]; + assign h_n[22] = g[22] | p_n[22]; + + assign bruce_bin_sum[23] = (b_n[23] & a_n[23] & c[23+1]) | (b_n[23] & a[23] & c_n[23+1]) | (b[23] & a_n[23] & c_n[23+1]) | (b[23] & a[23] & c[23+1]); + assign p[23] = a[23] | b[23]; + assign p_n[23] = ~p[23]; + assign g[23] = a[23] & b[23]; + assign h_n[23] = g[23] | p_n[23]; + + assign bruce_bin_sum[24] = (b_n[24] & a_n[24] & c[24+1]) | (b_n[24] & a[24] & c_n[24+1]) | (b[24] & a_n[24] & c_n[24+1]) | (b[24] & a[24] & c[24+1]); + assign p[24] = a[24] | b[24]; + assign p_n[24] = ~p[24]; + assign g[24] = a[24] & b[24]; + assign h_n[24] = g[24] | p_n[24]; + + assign bruce_bin_sum[25] = (b_n[25] & a_n[25] & c[25+1]) | (b_n[25] & a[25] & c_n[25+1]) | (b[25] & a_n[25] & c_n[25+1]) | (b[25] & a[25] & c[25+1]); + assign p[25] = a[25] | b[25]; + assign p_n[25] = ~p[25]; + assign g[25] = a[25] & b[25]; + assign h_n[25] = g[25] | p_n[25]; + + assign bruce_bin_sum[26] = (b_n[26] & a_n[26] & c[26+1]) | (b_n[26] & a[26] & c_n[26+1]) | (b[26] & a_n[26] & c_n[26+1]) | (b[26] & a[26] & c[26+1]); + assign p[26] = a[26] | b[26]; + assign p_n[26] = ~p[26]; + assign g[26] = a[26] & b[26]; + assign h_n[26] = g[26] | p_n[26]; + + assign bruce_bin_sum[27] = (b_n[27] & a_n[27] & c[27+1]) | (b_n[27] & a[27] & c_n[27+1]) | (b[27] & a_n[27] & c_n[27+1]) | (b[27] & a[27] & c[27+1]); + assign p[27] = a[27] | b[27]; + assign p_n[27] = ~p[27]; + assign g[27] = a[27] & b[27]; + assign h_n[27] = g[27] | p_n[27]; + + assign bruce_bin_sum[28] = (b_n[28] & a_n[28] & c[28+1]) | (b_n[28] & a[28] & c_n[28+1]) | (b[28] & a_n[28] & c_n[28+1]) | (b[28] & a[28] & c[28+1]); + assign p[28] = a[28] | b[28]; + assign p_n[28] = ~p[28]; + assign g[28] = a[28] & b[28]; + assign h_n[28] = g[28] | p_n[28]; + + assign bruce_bin_sum[29] = (b_n[29] & a_n[29] & c[29+1]) | (b_n[29] & a[29] & c_n[29+1]) | (b[29] & a_n[29] & c_n[29+1]) | (b[29] & a[29] & c[29+1]); + assign p[29] = a[29] | b[29]; + assign p_n[29] = ~p[29]; + assign g[29] = a[29] & b[29]; + assign h_n[29] = g[29] | p_n[29]; + + assign bruce_bin_sum[30] = (b_n[30] & a_n[30] & c[30+1]) | (b_n[30] & a[30] & c_n[30+1]) | (b[30] & a_n[30] & c_n[30+1]) | (b[30] & a[30] & c[30+1]); + assign p[30] = a[30] | b[30]; + assign p_n[30] = ~p[30]; + assign g[30] = a[30] & b[30]; + assign h_n[30] = g[30] | p_n[30]; + + assign bruce_bin_sum[31] = (b_n[31] & a_n[31] & c[31+1]) | (b_n[31] & a[31] & c_n[31+1]) | (b[31] & a_n[31] & c_n[31+1]) | (b[31] & a[31] & c[31+1]); + assign p[31] = a[31] | b[31]; + assign p_n[31] = ~p[31]; + assign g[31] = a[31] & b[31]; + assign h_n[31] = g[31] | p_n[31]; + + assign bruce_bin_sum[32] = (b_n[32] & a_n[32] & c[32+1]) | (b_n[32] & a[32] & c_n[32+1]) | (b[32] & a_n[32] & c_n[32+1]) | (b[32] & a[32] & c[32+1]); + assign p[32] = a[32] | b[32]; + assign p_n[32] = ~p[32]; + assign g[32] = a[32] & b[32]; + assign h_n[32] = g[32] | p_n[32]; + + assign bruce_bin_sum[33] = (b_n[33] & a_n[33] & c[33+1]) | (b_n[33] & a[33] & c_n[33+1]) | (b[33] & a_n[33] & c_n[33+1]) | (b[33] & a[33] & c[33+1]); + assign p[33] = a[33] | b[33]; + assign p_n[33] = ~p[33]; + assign g[33] = a[33] & b[33]; + assign h_n[33] = g[33] | p_n[33]; + + assign bruce_bin_sum[34] = (b_n[34] & a_n[34] & c[34+1]) | (b_n[34] & a[34] & c_n[34+1]) | (b[34] & a_n[34] & c_n[34+1]) | (b[34] & a[34] & c[34+1]); + assign p[34] = a[34] | b[34]; + assign p_n[34] = ~p[34]; + assign g[34] = a[34] & b[34]; + assign h_n[34] = g[34] | p_n[34]; + + assign bruce_bin_sum[35] = (b_n[35] & a_n[35] & c[35+1]) | (b_n[35] & a[35] & c_n[35+1]) | (b[35] & a_n[35] & c_n[35+1]) | (b[35] & a[35] & c[35+1]); + assign p[35] = a[35] | b[35]; + assign p_n[35] = ~p[35]; + assign g[35] = a[35] & b[35]; + assign h_n[35] = g[35] | p_n[35]; + + assign bruce_bin_sum[36] = (b_n[36] & a_n[36] & c[36+1]) | (b_n[36] & a[36] & c_n[36+1]) | (b[36] & a_n[36] & c_n[36+1]) | (b[36] & a[36] & c[36+1]); + assign p[36] = a[36] | b[36]; + assign p_n[36] = ~p[36]; + assign g[36] = a[36] & b[36]; + assign h_n[36] = g[36] | p_n[36]; + + assign bruce_bin_sum[37] = (b_n[37] & a_n[37] & c[37+1]) | (b_n[37] & a[37] & c_n[37+1]) | (b[37] & a_n[37] & c_n[37+1]) | (b[37] & a[37] & c[37+1]); + assign p[37] = a[37] | b[37]; + assign p_n[37] = ~p[37]; + assign g[37] = a[37] & b[37]; + assign h_n[37] = g[37] | p_n[37]; + + assign bruce_bin_sum[38] = (b_n[38] & a_n[38] & c[38+1]) | (b_n[38] & a[38] & c_n[38+1]) | (b[38] & a_n[38] & c_n[38+1]) | (b[38] & a[38] & c[38+1]); + assign p[38] = a[38] | b[38]; + assign p_n[38] = ~p[38]; + assign g[38] = a[38] & b[38]; + assign h_n[38] = g[38] | p_n[38]; + + assign bruce_bin_sum[39] = (b_n[39] & a_n[39] & c[39+1]) | (b_n[39] & a[39] & c_n[39+1]) | (b[39] & a_n[39] & c_n[39+1]) | (b[39] & a[39] & c[39+1]); + assign p[39] = a[39] | b[39]; + assign p_n[39] = ~p[39]; + assign g[39] = a[39] & b[39]; + assign h_n[39] = g[39] | p_n[39]; + + assign bruce_bin_sum[40] = (b_n[40] & a_n[40] & c[40+1]) | (b_n[40] & a[40] & c_n[40+1]) | (b[40] & a_n[40] & c_n[40+1]) | (b[40] & a[40] & c[40+1]); + assign p[40] = a[40] | b[40]; + assign p_n[40] = ~p[40]; + assign g[40] = a[40] & b[40]; + assign h_n[40] = g[40] | p_n[40]; + + assign bruce_bin_sum[41] = (b_n[41] & a_n[41] & c[41+1]) | (b_n[41] & a[41] & c_n[41+1]) | (b[41] & a_n[41] & c_n[41+1]) | (b[41] & a[41] & c[41+1]); + assign p[41] = a[41] | b[41]; + assign p_n[41] = ~p[41]; + assign g[41] = a[41] & b[41]; + assign h_n[41] = g[41] | p_n[41]; + + assign bruce_bin_sum[42] = (b_n[42] & a_n[42] & c[42+1]) | (b_n[42] & a[42] & c_n[42+1]) | (b[42] & a_n[42] & c_n[42+1]) | (b[42] & a[42] & c[42+1]); + assign p[42] = a[42] | b[42]; + assign p_n[42] = ~p[42]; + assign g[42] = a[42] & b[42]; + assign h_n[42] = g[42] | p_n[42]; + + assign bruce_bin_sum[43] = (b_n[43] & a_n[43] & c[43+1]) | (b_n[43] & a[43] & c_n[43+1]) | (b[43] & a_n[43] & c_n[43+1]) | (b[43] & a[43] & c[43+1]); + assign p[43] = a[43] | b[43]; + assign p_n[43] = ~p[43]; + assign g[43] = a[43] & b[43]; + assign h_n[43] = g[43] | p_n[43]; + + assign bruce_bin_sum[44] = (b_n[44] & a_n[44] & c[44+1]) | (b_n[44] & a[44] & c_n[44+1]) | (b[44] & a_n[44] & c_n[44+1]) | (b[44] & a[44] & c[44+1]); + assign p[44] = a[44] | b[44]; + assign p_n[44] = ~p[44]; + assign g[44] = a[44] & b[44]; + assign h_n[44] = g[44] | p_n[44]; + + assign bruce_bin_sum[45] = (b_n[45] & a_n[45] & c[45+1]) | (b_n[45] & a[45] & c_n[45+1]) | (b[45] & a_n[45] & c_n[45+1]) | (b[45] & a[45] & c[45+1]); + assign p[45] = a[45] | b[45]; + assign p_n[45] = ~p[45]; + assign g[45] = a[45] & b[45]; + assign h_n[45] = g[45] | p_n[45]; + + assign bruce_bin_sum[46] = (b_n[46] & a_n[46] & c[46+1]) | (b_n[46] & a[46] & c_n[46+1]) | (b[46] & a_n[46] & c_n[46+1]) | (b[46] & a[46] & c[46+1]); + assign p[46] = a[46] | b[46]; + assign p_n[46] = ~p[46]; + assign g[46] = a[46] & b[46]; + assign h_n[46] = g[46] | p_n[46]; + + assign bruce_bin_sum[47] = (b_n[47] & a_n[47] & c[47+1]) | (b_n[47] & a[47] & c_n[47+1]) | (b[47] & a_n[47] & c_n[47+1]) | (b[47] & a[47] & c[47+1]); + assign p[47] = a[47] | b[47]; + assign p_n[47] = ~p[47]; + assign g[47] = a[47] & b[47]; + assign h_n[47] = g[47] | p_n[47]; + + assign bruce_bin_sum[48] = (b_n[48] & a_n[48] & c[48+1]) | (b_n[48] & a[48] & c_n[48+1]) | (b[48] & a_n[48] & c_n[48+1]) | (b[48] & a[48] & c[48+1]); + assign p[48] = a[48] | b[48]; + assign p_n[48] = ~p[48]; + assign g[48] = a[48] & b[48]; + assign h_n[48] = g[48] | p_n[48]; + + assign bruce_bin_sum[49] = (b_n[49] & a_n[49] & c[49+1]) | (b_n[49] & a[49] & c_n[49+1]) | (b[49] & a_n[49] & c_n[49+1]) | (b[49] & a[49] & c[49+1]); + assign p[49] = a[49] | b[49]; + assign p_n[49] = ~p[49]; + assign g[49] = a[49] & b[49]; + assign h_n[49] = g[49] | p_n[49]; + + assign bruce_bin_sum[50] = (b_n[50] & a_n[50] & c[50+1]) | (b_n[50] & a[50] & c_n[50+1]) | (b[50] & a_n[50] & c_n[50+1]) | (b[50] & a[50] & c[50+1]); + assign p[50] = a[50] | b[50]; + assign p_n[50] = ~p[50]; + assign g[50] = a[50] & b[50]; + assign h_n[50] = g[50] | p_n[50]; + + assign bruce_bin_sum[51] = (b_n[51] & a_n[51] & c[51+1]) | (b_n[51] & a[51] & c_n[51+1]) | (b[51] & a_n[51] & c_n[51+1]) | (b[51] & a[51] & c[51+1]); + assign p[51] = a[51] | b[51]; + assign p_n[51] = ~p[51]; + assign g[51] = a[51] & b[51]; + assign h_n[51] = g[51] | p_n[51]; + + assign bruce_bin_sum[52] = (b_n[52] & a_n[52] & c[52+1]) | (b_n[52] & a[52] & c_n[52+1]) | (b[52] & a_n[52] & c_n[52+1]) | (b[52] & a[52] & c[52+1]); + assign p[52] = a[52] | b[52]; + assign p_n[52] = ~p[52]; + assign g[52] = a[52] & b[52]; + assign h_n[52] = g[52] | p_n[52]; + + assign bruce_bin_sum[53] = (b_n[53] & a_n[53] & c[53+1]) | (b_n[53] & a[53] & c_n[53+1]) | (b[53] & a_n[53] & c_n[53+1]) | (b[53] & a[53] & c[53+1]); + assign p[53] = a[53] | b[53]; + assign p_n[53] = ~p[53]; + assign g[53] = a[53] & b[53]; + assign h_n[53] = g[53] | p_n[53]; + + assign bruce_bin_sum[54] = (b_n[54] & a_n[54] & c[54+1]) | (b_n[54] & a[54] & c_n[54+1]) | (b[54] & a_n[54] & c_n[54+1]) | (b[54] & a[54] & c[54+1]); + assign p[54] = a[54] | b[54]; + assign p_n[54] = ~p[54]; + assign g[54] = a[54] & b[54]; + assign h_n[54] = g[54] | p_n[54]; + + assign bruce_bin_sum[55] = (b_n[55] & a_n[55] & c[55+1]) | (b_n[55] & a[55] & c_n[55+1]) | (b[55] & a_n[55] & c_n[55+1]) | (b[55] & a[55] & c[55+1]); + assign p[55] = a[55] | b[55]; + assign p_n[55] = ~p[55]; + assign g[55] = a[55] & b[55]; + assign h_n[55] = g[55] | p_n[55]; + + assign bruce_bin_sum[56] = (b_n[56] & a_n[56] & c[56+1]) | (b_n[56] & a[56] & c_n[56+1]) | (b[56] & a_n[56] & c_n[56+1]) | (b[56] & a[56] & c[56+1]); + assign p[56] = a[56] | b[56]; + assign p_n[56] = ~p[56]; + assign g[56] = a[56] & b[56]; + assign h_n[56] = g[56] | p_n[56]; + + assign bruce_bin_sum[57] = (b_n[57] & a_n[57] & c[57+1]) | (b_n[57] & a[57] & c_n[57+1]) | (b[57] & a_n[57] & c_n[57+1]) | (b[57] & a[57] & c[57+1]); + assign p[57] = a[57] | b[57]; + assign p_n[57] = ~p[57]; + assign g[57] = a[57] & b[57]; + assign h_n[57] = g[57] | p_n[57]; + + assign bruce_bin_sum[58] = (b_n[58] & a_n[58] & c[58+1]) | (b_n[58] & a[58] & c_n[58+1]) | (b[58] & a_n[58] & c_n[58+1]) | (b[58] & a[58] & c[58+1]); + assign p[58] = a[58] | b[58]; + assign p_n[58] = ~p[58]; + assign g[58] = a[58] & b[58]; + assign h_n[58] = g[58] | p_n[58]; + + assign bruce_bin_sum[59] = (b_n[59] & a_n[59] & c[59+1]) | (b_n[59] & a[59] & c_n[59+1]) | (b[59] & a_n[59] & c_n[59+1]) | (b[59] & a[59] & c[59+1]); + assign p[59] = a[59] | b[59]; + assign p_n[59] = ~p[59]; + assign g[59] = a[59] & b[59]; + assign h_n[59] = g[59] | p_n[59]; + + assign bruce_bin_sum[60] = (b_n[60] & a_n[60] & c[60+1]) | (b_n[60] & a[60] & c_n[60+1]) | (b[60] & a_n[60] & c_n[60+1]) | (b[60] & a[60] & c[60+1]); + assign p[60] = a[60] | b[60]; + assign p_n[60] = ~p[60]; + assign g[60] = a[60] & b[60]; + assign h_n[60] = g[60] | p_n[60]; + + assign bruce_bin_sum[61] = (b_n[61] & a_n[61] & c[61+1]) | (b_n[61] & a[61] & c_n[61+1]) | (b[61] & a_n[61] & c_n[61+1]) | (b[61] & a[61] & c[61+1]); + assign p[61] = a[61] | b[61]; + assign p_n[61] = ~p[61]; + assign g[61] = a[61] & b[61]; + assign h_n[61] = g[61] | p_n[61]; + + assign bruce_bin_sum[62] = (b_n[62] & a_n[62] & c[62+1]) | (b_n[62] & a[62] & c_n[62+1]) | (b[62] & a_n[62] & c_n[62+1]) | (b[62] & a[62] & c[62+1]); + assign p[62] = a[62] | b[62]; + assign p_n[62] = ~p[62]; + assign g[62] = a[62] & b[62]; + assign h_n[62] = g[62] | p_n[62]; + + assign bruce_bin_sum[63] = (b_n[63] & a_n[63] & c[63+1]) | (b_n[63] & a[63] & c_n[63+1]) | (b[63] & a_n[63] & c_n[63+1]) | (b[63] & a[63] & c[63+1]); + assign p[63] = a[63] | b[63]; + assign p_n[63] = ~p[63]; + assign g[63] = a[63] & b[63]; + assign h_n[63] = g[63] | p_n[63]; + + assign bin_sum[0:63] = (alu_cmd[0:3] == 4'b0010) ? bruce_bin_sum[0:63] + 2'b01 : bruce_bin_sum[0:63]; + + assign d[0] = h_n[0] ^ p[0+1]; + assign d[1] = h_n[1] ^ p[1+1]; + assign d[2] = h_n[2] ^ p[2+1]; + assign d[3] = h_n[3] ^ p[3+1]; + assign d[4] = h_n[4] ^ p[4+1]; + assign d[5] = h_n[5] ^ p[5+1]; + assign d[6] = h_n[6] ^ p[6+1]; + assign d[7] = h_n[7] ^ p[7+1]; + assign d[8] = h_n[8] ^ p[8+1]; + assign d[9] = h_n[9] ^ p[9+1]; + assign d[10] = h_n[10] ^ p[10+1]; + assign d[11] = h_n[11] ^ p[11+1]; + assign d[12] = h_n[12] ^ p[12+1]; + assign d[13] = h_n[13] ^ p[13+1]; + assign d[14] = h_n[14] ^ p[14+1]; + assign d[15] = h_n[15] ^ p[15+1]; + assign d[16] = h_n[16] ^ p[16+1]; + assign d[17] = h_n[17] ^ p[17+1]; + assign d[18] = h_n[18] ^ p[18+1]; + assign d[19] = h_n[19] ^ p[19+1]; + assign d[20] = h_n[20] ^ p[20+1]; + assign d[21] = h_n[21] ^ p[21+1]; + assign d[22] = h_n[22] ^ p[22+1]; + assign d[23] = h_n[23] ^ p[23+1]; + assign d[24] = h_n[24] ^ p[24+1]; + assign d[25] = h_n[25] ^ p[25+1]; + assign d[26] = h_n[26] ^ p[26+1]; + assign d[27] = h_n[27] ^ p[27+1]; + assign d[28] = h_n[28] ^ p[28+1]; + assign d[29] = h_n[29] ^ p[29+1]; + assign d[30] = h_n[30] ^ p[30+1]; + assign d[31] = h_n[31] ^ p[31+1]; + assign d[32] = h_n[32] ^ p[32+1]; + assign d[33] = h_n[33] ^ p[33+1]; + assign d[34] = h_n[34] ^ p[34+1]; + assign d[35] = h_n[35] ^ p[35+1]; + assign d[36] = h_n[36] ^ p[36+1]; + assign d[37] = h_n[37] ^ p[37+1]; + assign d[38] = h_n[38] ^ p[38+1]; + assign d[39] = h_n[39] ^ p[39+1]; + assign d[40] = h_n[40] ^ p[40+1]; + assign d[41] = h_n[41] ^ p[41+1]; + assign d[42] = h_n[42] ^ p[42+1]; + assign d[43] = h_n[43] ^ p[43+1]; + assign d[44] = h_n[44] ^ p[44+1]; + assign d[45] = h_n[45] ^ p[45+1]; + assign d[46] = h_n[46] ^ p[46+1]; + assign d[47] = h_n[47] ^ p[47+1]; + assign d[48] = h_n[48] ^ p[48+1]; + assign d[49] = h_n[49] ^ p[49+1]; + assign d[50] = h_n[50] ^ p[50+1]; + assign d[51] = h_n[51] ^ p[51+1]; + assign d[52] = h_n[52] ^ p[52+1]; + assign d[53] = h_n[53] ^ p[53+1]; + assign d[54] = h_n[54] ^ p[54+1]; + assign d[55] = h_n[55] ^ p[55+1]; + assign d[56] = h_n[56] ^ p[56+1]; + assign d[57] = h_n[57] ^ p[57+1]; + assign d[58] = h_n[58] ^ p[58+1]; + assign d[59] = h_n[59] ^ p[59+1]; + assign d[60] = h_n[60] ^ p[60+1]; + assign d[61] = h_n[61] ^ p[61+1]; + assign d[62] = h_n[62] ^ p[62+1]; + + assign d[63] = h_n[63] ^ bin_sub_q; + + assign d8[0] = d[8*0] & d[8*0+1] & d[8*0+2] & d[8*0+3] & d[8*0+4] & d[8*0+5] & d[8*0+6] & d[8*0+7]; + assign d8[1] = d[8*1] & d[8*1+1] & d[8*1+2] & d[8*1+3] & d[8*1+4] & d[8*1+5] & d[8*1+6] & d[8*1+7]; + assign d8[2] = d[8*2] & d[8*2+1] & d[8*2+2] & d[8*2+3] & d[8*2+4] & d[8*2+5] & d[8*2+6] & d[8*2+7]; + assign d8[3] = d[8*3] & d[8*3+1] & d[8*3+2] & d[8*3+3] & d[8*3+4] & d[8*3+5] & d[8*3+6] & d[8*3+7]; + assign d8[4] = d[8*4] & d[8*4+1] & d[8*4+2] & d[8*4+3] & d[8*4+4] & d[8*4+5] & d[8*4+6] & d[8*4+7]; + assign d8[5] = d[8*5] & d[8*5+1] & d[8*5+2] & d[8*5+3] & d[8*5+4] & d[8*5+5] & d[8*5+6] & d[8*5+7]; + assign d8[6] = d[8*6] & d[8*6+1] & d[8*6+2] & d[8*6+3] & d[8*6+4] & d[8*6+5] & d[8*6+6] & d[8*6+7]; + assign d8[7] = d[8*7] & d[8*7+1] & d[8*7+2] & d[8*7+3] & d[8*7+4] & d[8*7+5] & d[8*7+6] & d[8*7+7]; + + assign ds = d[33] & d[34] & d[35] & d[36] & d[37] & d[38] & d[39]; + + assign bin_sum_0_63_z = d8[0] & d8[1] & d8[2] & d8[3] & d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_32_63_z = d8[4] & d8[5] & d8[6] & d8[7]; + + assign bin_sum_33_63_z = ds & d8[5] & d8[6] & d8[7]; + + assign G2[0] = g[2*0] | (p[2*0] & g[2*0+1]); + assign P2[0] = p[2*0] & p[2*0+1]; + assign G2[1] = g[2*1] | (p[2*1] & g[2*1+1]); + assign P2[1] = p[2*1] & p[2*1+1]; + assign G2[2] = g[2*2] | (p[2*2] & g[2*2+1]); + assign P2[2] = p[2*2] & p[2*2+1]; + assign G2[3] = g[2*3] | (p[2*3] & g[2*3+1]); + assign P2[3] = p[2*3] & p[2*3+1]; + assign G2[4] = g[2*4] | (p[2*4] & g[2*4+1]); + assign P2[4] = p[2*4] & p[2*4+1]; + assign G2[5] = g[2*5] | (p[2*5] & g[2*5+1]); + assign P2[5] = p[2*5] & p[2*5+1]; + assign G2[6] = g[2*6] | (p[2*6] & g[2*6+1]); + assign P2[6] = p[2*6] & p[2*6+1]; + assign G2[7] = g[2*7] | (p[2*7] & g[2*7+1]); + assign P2[7] = p[2*7] & p[2*7+1]; + assign G2[8] = g[2*8] | (p[2*8] & g[2*8+1]); + assign P2[8] = p[2*8] & p[2*8+1]; + assign G2[9] = g[2*9] | (p[2*9] & g[2*9+1]); + assign P2[9] = p[2*9] & p[2*9+1]; + assign G2[10] = g[2*10] | (p[2*10] & g[2*10+1]); + assign P2[10] = p[2*10] & p[2*10+1]; + assign G2[11] = g[2*11] | (p[2*11] & g[2*11+1]); + assign P2[11] = p[2*11] & p[2*11+1]; + assign G2[12] = g[2*12] | (p[2*12] & g[2*12+1]); + assign P2[12] = p[2*12] & p[2*12+1]; + assign G2[13] = g[2*13] | (p[2*13] & g[2*13+1]); + assign P2[13] = p[2*13] & p[2*13+1]; + assign G2[14] = g[2*14] | (p[2*14] & g[2*14+1]); + assign P2[14] = p[2*14] & p[2*14+1]; + assign G2[15] = g[2*15] | (p[2*15] & g[2*15+1]); + assign P2[15] = p[2*15] & p[2*15+1]; + assign G2[16] = g[2*16] | (p[2*16] & g[2*16+1]); + assign P2[16] = p[2*16] & p[2*16+1]; + assign G2[17] = g[2*17] | (p[2*17] & g[2*17+1]); + assign P2[17] = p[2*17] & p[2*17+1]; + assign G2[18] = g[2*18] | (p[2*18] & g[2*18+1]); + assign P2[18] = p[2*18] & p[2*18+1]; + assign G2[19] = g[2*19] | (p[2*19] & g[2*19+1]); + assign P2[19] = p[2*19] & p[2*19+1]; + assign G2[20] = g[2*20] | (p[2*20] & g[2*20+1]); + assign P2[20] = p[2*20] & p[2*20+1]; + assign G2[21] = g[2*21] | (p[2*21] & g[2*21+1]); + assign P2[21] = p[2*21] & p[2*21+1]; + assign G2[22] = g[2*22] | (p[2*22] & g[2*22+1]); + assign P2[22] = p[2*22] & p[2*22+1]; + assign G2[23] = g[2*23] | (p[2*23] & g[2*23+1]); + assign P2[23] = p[2*23] & p[2*23+1]; + assign G2[24] = g[2*24] | (p[2*24] & g[2*24+1]); + assign P2[24] = p[2*24] & p[2*24+1]; + assign G2[25] = g[2*25] | (p[2*25] & g[2*25+1]); + assign P2[25] = p[2*25] & p[2*25+1]; + assign G2[26] = g[2*26] | (p[2*26] & g[2*26+1]); + assign P2[26] = p[2*26] & p[2*26+1]; + assign G2[27] = g[2*27] | (p[2*27] & g[2*27+1]); + assign P2[27] = p[2*27] & p[2*27+1]; + assign G2[28] = g[2*28] | (p[2*28] & g[2*28+1]); + assign P2[28] = p[2*28] & p[2*28+1]; + assign G2[29] = g[2*29] | (p[2*29] & g[2*29+1]); + assign P2[29] = p[2*29] & p[2*29+1]; + assign G2[30] = g[2*30] | (p[2*30] & g[2*30+1]); + assign P2[30] = p[2*30] & p[2*30+1]; + assign G2[31] = g[2*31] | (p[2*31] & g[2*31+1]); + assign P2[31] = p[2*31] & p[2*31+1]; + + assign Gn[0] = G2[2*0] | (P2[2*0] & G2[2*0+1]); + assign Pn[0] = P2[2*0] & P2[2*0+1]; + + assign Gn[1] = G2[2*1] | (P2[2*1] & G2[2*1+1]); + assign Pn[1] = P2[2*1] & P2[2*1+1]; + + assign Gn[2] = G2[2*2] | (P2[2*2] & G2[2*2+1]); + assign Pn[2] = P2[2*2] & P2[2*2+1]; + + assign Gn[3] = G2[2*3] | (P2[2*3] & G2[2*3+1]); + assign Pn[3] = P2[2*3] & P2[2*3+1]; + + assign Gn[4] = G2[2*4] | (P2[2*4] & G2[2*4+1]); + assign Pn[4] = P2[2*4] & P2[2*4+1]; + + assign Gn[5] = G2[2*5] | (P2[2*5] & G2[2*5+1]); + assign Pn[5] = P2[2*5] & P2[2*5+1]; + + assign Gn[6] = G2[2*6] | (P2[2*6] & G2[2*6+1]); + assign Pn[6] = P2[2*6] & P2[2*6+1]; + + assign Gn[7] = G2[2*7] | (P2[2*7] & G2[2*7+1]); + assign Pn[7] = P2[2*7] & P2[2*7+1]; + + assign Gn[8] = G2[2*8] | (P2[2*8] & G2[2*8+1]); + assign Pn[8] = P2[2*8] & P2[2*8+1]; + + assign Gn[9] = G2[2*9] | (P2[2*9] & G2[2*9+1]); + assign Pn[9] = P2[2*9] & P2[2*9+1]; + + assign Gn[10] = G2[2*10] | (P2[2*10] & G2[2*10+1]); + assign Pn[10] = P2[2*10] & P2[2*10+1]; + + assign Gn[11] = G2[2*11] | (P2[2*11] & G2[2*11+1]); + assign Pn[11] = P2[2*11] & P2[2*11+1]; + + assign Gn[12] = G2[2*12] | (P2[2*12] & G2[2*12+1]); + assign Pn[12] = P2[2*12] & P2[2*12+1]; + + assign Gn[13] = G2[2*13] | (P2[2*13] & G2[2*13+1]); + assign Pn[13] = P2[2*13] & P2[2*13+1]; + + assign Gn[14] = G2[2*14] | (P2[2*14] & G2[2*14+1]); + assign Pn[14] = P2[2*14] & P2[2*14+1]; + + assign Gn[15] = G2[2*15] | (P2[2*15] & G2[2*15+1]); + assign Pn[15] = P2[2*15] & P2[2*15+1]; + + assign Gb[0] = Gn[2*0] | (Pn[2*0] & Gn[2*0+1]); + assign Pb[0] = Pn[2*0] & Pn[2*0+1]; + + assign Gb[1] = Gn[2*1] | (Pn[2*1] & Gn[2*1+1]); + assign Pb[1] = Pn[2*1] & Pn[2*1+1]; + + assign Gb[2] = Gn[2*2] | (Pn[2*2] & Gn[2*2+1]); + assign Pb[2] = Pn[2*2] & Pn[2*2+1]; + + assign Gb[3] = Gn[2*3] | (Pn[2*3] & Gn[2*3+1]); + assign Pb[3] = Pn[2*3] & Pn[2*3+1]; + + assign Gb[4] = Gn[2*4] | (Pn[2*4] & Gn[2*4+1]); + assign Pb[4] = Pn[2*4] & Pn[2*4+1]; + + assign Gb[5] = Gn[2*5] | (Pn[2*5] & Gn[2*5+1]); + assign Pb[5] = Pn[2*5] & Pn[2*5+1]; + + assign Gb[6] = Gn[2*6] | (Pn[2*6] & Gn[2*6+1]); + assign Pb[6] = Pn[2*6] & Pn[2*6+1]; + + assign Gb[7] = Gn[2*7] | (Pn[2*7] & Gn[2*7+1]); + assign Pb[7] = Pn[2*7] & Pn[2*7+1]; + + assign G2b[2] = Gb[2+1] | (Pb[2+1] & Gb[2+2]); + assign P2b[2] = Pb[2+1] & Pb[2+2]; + + assign G2b[3] = Gb[3+1] | (Pb[3+1] & Gb[3+2]); + assign P2b[3] = Pb[3+1] & Pb[3+2]; + + assign G2b[4] = Gb[4+1] | (Pb[4+1] & Gb[4+2]); + assign P2b[4] = Pb[4+1] & Pb[4+2]; + + assign G2b[5] = Gb[5+1] | (Pb[5+1] & Gb[5+2]); + assign P2b[5] = Pb[5+1] & Pb[5+2]; + + + assign G2b[0] = Gb[1] | (Pb[1] & Gb[2]); + assign P2b[0] = Pb[1] & Pb[2]; + assign G2b[1] = Gb[2] | (Pb[2] & Gb[3]); + assign P2b[1] = Pb[2] & Pb[3]; + + assign c[56] = Gb[7] | (Pb[7] & c[64]); + assign c[48] = G2b[5] | (P2b[5] & c[64]); + assign c[40] = G2b[4] | (P2b[4] & c[56]); + assign c[32] = G2b[3] | (P2b[3] & c[48]); + assign bin_c_32 = Gb[4] | (Pb[4] & c[40]); + assign c[24] = G2b[2] | (P2b[2] & c[40]); + assign c[16] = G2b[1] | (P2b[1] & c[24]); + assign c[8] = G2b[0] | (P2b[0] & c[24]); + assign c[0] = Gb[0] | (Pb[0] & c[8]); + + assign c[8*0+4] = Gn[2*0+1] | (Pn[2*0+1] & c[8*0+8]); + assign c[8*1+4] = Gn[2*1+1] | (Pn[2*1+1] & c[8*1+8]); + assign c[8*2+4] = Gn[2*2+1] | (Pn[2*2+1] & c[8*2+8]); + assign c[8*3+4] = Gn[2*3+1] | (Pn[2*3+1] & c[8*3+8]); + assign c[8*4+4] = Gn[2*4+1] | (Pn[2*4+1] & c[8*4+8]); + assign c[8*5+4] = Gn[2*5+1] | (Pn[2*5+1] & c[8*5+8]); + assign c[8*6+4] = Gn[2*6+1] | (Pn[2*6+1] & c[8*6+8]); + assign c[8*7+4] = Gn[2*7+1] | (Pn[2*7+1] & c[8*7+8]); + + assign c[4*0+2] = G2[2*0+1] | (P2[2*0+1] & c[4*0+4]); + assign c[4*1+2] = G2[2*1+1] | (P2[2*1+1] & c[4*1+4]); + assign c[4*2+2] = G2[2*2+1] | (P2[2*2+1] & c[4*2+4]); + assign c[4*3+2] = G2[2*3+1] | (P2[2*3+1] & c[4*3+4]); + assign c[4*4+2] = G2[2*4+1] | (P2[2*4+1] & c[4*4+4]); + assign c[4*5+2] = G2[2*5+1] | (P2[2*5+1] & c[4*5+4]); + assign c[4*6+2] = G2[2*6+1] | (P2[2*6+1] & c[4*6+4]); + assign c[4*7+2] = G2[2*7+1] | (P2[2*7+1] & c[4*7+4]); + assign c[4*8+2] = G2[2*8+1] | (P2[2*8+1] & c[4*8+4]); + assign c[4*9+2] = G2[2*9+1] | (P2[2*9+1] & c[4*9+4]); + assign c[4*10+2] = G2[2*10+1] | (P2[2*10+1] & c[4*10+4]); + assign c[4*11+2] = G2[2*11+1] | (P2[2*11+1] & c[4*11+4]); + assign c[4*12+2] = G2[2*12+1] | (P2[2*12+1] & c[4*12+4]); + assign c[4*13+2] = G2[2*13+1] | (P2[2*13+1] & c[4*13+4]); + assign c[4*14+2] = G2[2*14+1] | (P2[2*14+1] & c[4*14+4]); + assign c[4*15+2] = G2[2*15+1] | (P2[2*15+1] & c[4*15+4]); + + assign c[2*0+1] = g[2*0+1] | (p[2*0+1] & c[2*0+2]); + assign c[2*1+1] = g[2*1+1] | (p[2*1+1] & c[2*1+2]); + assign c[2*2+1] = g[2*2+1] | (p[2*2+1] & c[2*2+2]); + assign c[2*3+1] = g[2*3+1] | (p[2*3+1] & c[2*3+2]); + assign c[2*4+1] = g[2*4+1] | (p[2*4+1] & c[2*4+2]); + assign c[2*5+1] = g[2*5+1] | (p[2*5+1] & c[2*5+2]); + assign c[2*6+1] = g[2*6+1] | (p[2*6+1] & c[2*6+2]); + assign c[2*7+1] = g[2*7+1] | (p[2*7+1] & c[2*7+2]); + assign c[2*8+1] = g[2*8+1] | (p[2*8+1] & c[2*8+2]); + assign c[2*9+1] = g[2*9+1] | (p[2*9+1] & c[2*9+2]); + assign c[2*10+1] = g[2*10+1] | (p[2*10+1] & c[2*10+2]); + assign c[2*11+1] = g[2*11+1] | (p[2*11+1] & c[2*11+2]); + assign c[2*12+1] = g[2*12+1] | (p[2*12+1] & c[2*12+2]); + assign c[2*13+1] = g[2*13+1] | (p[2*13+1] & c[2*13+2]); + assign c[2*14+1] = g[2*14+1] | (p[2*14+1] & c[2*14+2]); + assign c[2*15+1] = g[2*15+1] | (p[2*15+1] & c[2*15+2]); + assign c[2*16+1] = g[2*16+1] | (p[2*16+1] & c[2*16+2]); + assign c[2*17+1] = g[2*17+1] | (p[2*17+1] & c[2*17+2]); + assign c[2*18+1] = g[2*18+1] | (p[2*18+1] & c[2*18+2]); + assign c[2*19+1] = g[2*19+1] | (p[2*19+1] & c[2*19+2]); + assign c[2*20+1] = g[2*20+1] | (p[2*20+1] & c[2*20+2]); + assign c[2*21+1] = g[2*21+1] | (p[2*21+1] & c[2*21+2]); + assign c[2*22+1] = g[2*22+1] | (p[2*22+1] & c[2*22+2]); + assign c[2*23+1] = g[2*23+1] | (p[2*23+1] & c[2*23+2]); + assign c[2*24+1] = g[2*24+1] | (p[2*24+1] & c[2*24+2]); + assign c[2*25+1] = g[2*25+1] | (p[2*25+1] & c[2*25+2]); + assign c[2*26+1] = g[2*26+1] | (p[2*26+1] & c[2*26+2]); + assign c[2*27+1] = g[2*27+1] | (p[2*27+1] & c[2*27+2]); + assign c[2*28+1] = g[2*28+1] | (p[2*28+1] & c[2*28+2]); + assign c[2*29+1] = g[2*29+1] | (p[2*29+1] & c[2*29+2]); + assign c[2*30+1] = g[2*30+1] | (p[2*30+1] & c[2*30+2]); + assign c[2*31+1] = g[2*31+1] | (p[2*31+1] & c[2*31+2]); + + assign c_n[0] = ~c[0]; + assign c_n[1] = ~c[1]; + assign c_n[2] = ~c[2]; + assign c_n[3] = ~c[3]; + assign c_n[4] = ~c[4]; + assign c_n[5] = ~c[5]; + assign c_n[6] = ~c[6]; + assign c_n[7] = ~c[7]; + assign c_n[8] = ~c[8]; + assign c_n[9] = ~c[9]; + assign c_n[10] = ~c[10]; + assign c_n[11] = ~c[11]; + assign c_n[12] = ~c[12]; + assign c_n[13] = ~c[13]; + assign c_n[14] = ~c[14]; + assign c_n[15] = ~c[15]; + assign c_n[16] = ~c[16]; + assign c_n[17] = ~c[17]; + assign c_n[18] = ~c[18]; + assign c_n[19] = ~c[19]; + assign c_n[20] = ~c[20]; + assign c_n[21] = ~c[21]; + assign c_n[22] = ~c[22]; + assign c_n[23] = ~c[23]; + assign c_n[24] = ~c[24]; + assign c_n[25] = ~c[25]; + assign c_n[26] = ~c[26]; + assign c_n[27] = ~c[27]; + assign c_n[28] = ~c[28]; + assign c_n[29] = ~c[29]; + assign c_n[30] = ~c[30]; + assign c_n[31] = ~c[31]; + assign c_n[32] = ~c[32]; + assign c_n[33] = ~c[33]; + assign c_n[34] = ~c[34]; + assign c_n[35] = ~c[35]; + assign c_n[36] = ~c[36]; + assign c_n[37] = ~c[37]; + assign c_n[38] = ~c[38]; + assign c_n[39] = ~c[39]; + assign c_n[40] = ~c[40]; + assign c_n[41] = ~c[41]; + assign c_n[42] = ~c[42]; + assign c_n[43] = ~c[43]; + assign c_n[44] = ~c[44]; + assign c_n[45] = ~c[45]; + assign c_n[46] = ~c[46]; + assign c_n[47] = ~c[47]; + assign c_n[48] = ~c[48]; + assign c_n[49] = ~c[49]; + assign c_n[50] = ~c[50]; + assign c_n[51] = ~c[51]; + assign c_n[52] = ~c[52]; + assign c_n[53] = ~c[53]; + assign c_n[54] = ~c[54]; + assign c_n[55] = ~c[55]; + assign c_n[56] = ~c[56]; + assign c_n[57] = ~c[57]; + assign c_n[58] = ~c[58]; + assign c_n[59] = ~c[59]; + assign c_n[60] = ~c[60]; + assign c_n[61] = ~c[61]; + assign c_n[62] = ~c[62]; + assign c_n[63] = ~c[63]; + + assign bin_c_0 = c[0]; + assign bin_ovfl = (c[32] & c_n[33]) | (c_n[32] & c[33]); + +endmodule // exdbin_mac + + + diff --git a/code/vezba9/dut/holdreg.v b/code/vezba9/dut/holdreg.v new file mode 100644 index 0000000..e49f552 --- /dev/null +++ b/code/vezba9/dut/holdreg.v @@ -0,0 +1,56 @@ +// Library: calc1 +// Module: Hold Register +// Author: Naseer Siddique + + module holdreg(hold_data1, hold_data2, hold_prio_req, c_clk, req_cmd_in, req_data_in, reset); + + input c_clk; + input [0:3] req_cmd_in; + input [1:7] reset; + input [0:31] req_data_in; + + output [0:3] hold_prio_req; + output [0:31] hold_data1, hold_data2; + + + reg [0:3] cmd_hold, hold_prio_reg; + wire [0:3] cmd_hold_q; + reg [0:31] hold_data1_q, hold_data2_q; + + always + @ (posedge c_clk) begin + fork + + cmd_hold[0:3] <= (reset[1] == 1) ? 4'b0 : req_cmd_in[0:3]; + hold_prio_reg[0:3] <= cmd_hold[0:3]; + + join + + end + + + always + @ (posedge c_clk) begin + fork + hold_data1_q[0:31] <= + (reset[1]) ? 32'b0 : + (req_cmd_in[0:3] != 4'b0) ? req_data_in[0:31] : + hold_data1_q[0:31]; + + hold_data2_q[0:31] <= + (reset[1]) ? 32'b0 : (cmd_hold[0:3] != 4'b0) ? + req_data_in[0:31] : hold_data2_q[0:31]; + join + + end + + + assign hold_data1 = hold_data1_q; + assign hold_data2 = hold_data2_q; + assign hold_prio_req = hold_prio_reg; + +endmodule // holdreg + + + + diff --git a/code/vezba9/dut/mux_out.v b/code/vezba9/dut/mux_out.v new file mode 100644 index 0000000..41e732d --- /dev/null +++ b/code/vezba9/dut/mux_out.v @@ -0,0 +1,27 @@ +// Library: calc1 +// Module: Output Mux +// Author: Naseer Siddique + +module mux_out(req_data, req_resp, req_data1, req_data2, req_resp1, req_resp2); + + output [0:31] req_data; + output [0:1] req_resp; + + input [0:31] req_data1, req_data2; + input [0:1] req_resp1, req_resp2; + + assign req_resp[0:1] = + (req_resp1[0:1] != 2'b00) ? req_resp1 : + ( req_resp2[0:1] != 2'b00 ) ? req_resp2 : + 2'b00; + + assign req_data[0:31] = + ( req_resp1[0:1] != 2'b00 ) ? req_data1 : + ( req_resp2[0:1] != 2'b00 ) ? req_data2 : + 32'b0; + + + +endmodule // mux_out + + diff --git a/code/vezba9/dut/priority.v b/code/vezba9/dut/priority.v new file mode 100644 index 0000000..7e020ab --- /dev/null +++ b/code/vezba9/dut/priority.v @@ -0,0 +1,155 @@ +// Library: calc1 +// Priority Logic +// Author: Naseer Siddique +module priority1 ( prio_alu1_in_cmd, prio_alu1_in_req_id, prio_alu1_out_req_id, prio_alu1_out_vld, prio_alu2_in_cmd, prio_alu2_in_req_id, prio_alu2_out_req_id, prio_alu2_out_vld, c_clk, hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req, local_error_found, reset); + + + output [0:3] prio_alu1_in_cmd, prio_alu2_in_cmd; + output [0:1] prio_alu1_out_req_id, prio_alu1_in_req_id, prio_alu2_in_req_id, prio_alu2_out_req_id; + output prio_alu1_out_vld, prio_alu2_out_vld; + + input c_clk, local_error_found; + input [0:3] hold1_prio_req, hold2_prio_req, hold3_prio_req, hold4_prio_req; + input [1:7] reset; + + reg [0:3] cmd1, cmd2, cmd3, cmd4; + reg delay1, delay2; + + wire cmd1_reset, cmd2_reset, cmd3_reset, cmd4_reset; + + reg [0:1] prio_req1_id_q, prio_req2_id_q; + + reg prio_alu1_out_vld_q, prio_alu2_out_vld_q; + + always + @ (posedge c_clk) begin + if (reset[1]) begin + cmd1 <= 0; + cmd2 <= 0; + cmd3 <= 0; + cmd4 <= 0; + end + else begin + fork + delay1 <= prio_alu1_out_vld_q; + delay2 <= prio_alu2_out_vld_q; + + cmd1[0:3] <= + (hold1_prio_req[0:3] != 4'b0) ? hold1_prio_req[0:3] : + (cmd1_reset) ? 4'b0 : + cmd1[0:3]; + + cmd2[0:3] <= + (hold2_prio_req[0:3] != 4'b0) ? hold2_prio_req[0:3] : + (cmd2_reset) ? 4'b0 : + cmd2[0:3]; + + cmd3[0:3] <= + (hold3_prio_req[0:3] != 4'b0) ? hold3_prio_req[0:3] : + (cmd3_reset) ? 4'b0 : + cmd3[0:3]; + + cmd4[0:3] <= + (hold4_prio_req[0:3] != 4'b0) ? hold4_prio_req[0:3] : + (cmd4_reset) ? 4'b0 : + cmd4[0:3]; + join + end + + + end // always @ (posedge c_clk) + + always + @ (delay1 or delay2 or cmd1 or cmd2 or cmd3 or cmd4) begin + + if (delay1) + prio_alu1_out_vld_q <= 1'b0; + else if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) && local_error_found ) + prio_alu1_out_vld_q <= 1'b1; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_alu1_out_vld_q <= 1'b0; + else prio_alu1_out_vld_q <= 1'b0; + + if (delay2) + prio_alu2_out_vld_q <= 1'b0; + else if (cmd1 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd2 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd3 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else if (cmd4 > 4'b0011) + prio_alu2_out_vld_q <= 1'b1; + else prio_alu2_out_vld_q <= 1'b0; + + if ( (cmd1 != 4'b0000) && (cmd1 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b00; + else if ( (cmd2 != 4'b0000) && (cmd2 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b01; + else if ( (cmd3 != 4'b0000) && (cmd3 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b10; + else if ( (cmd4 != 4'b0000) && (cmd4 < 4'b0100) ) + prio_req1_id_q[0:1] <= 2'b11; + else prio_req1_id_q[0:1] <= 2'b00; + + if ( cmd1 > 4'b0011 ) + prio_req2_id_q <= 2'b00; + else if ( cmd2 > 4'b0011 ) + prio_req2_id_q <= 2'b01; + else if ( cmd3 > 4'b0011 ) + prio_req2_id_q <= 2'b10; + else if ( cmd4 > 4'b0011 ) + prio_req2_id_q <= 2'b11; + else prio_req2_id_q <= 2'b00; + + end // always @ (delay1 or or delay2 or cmd1 or cmd2 or cmd3 or cmd4) + + assign prio_alu1_in_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_in_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_req_id[0:1] = prio_req1_id_q[0:1]; + assign prio_alu2_out_req_id[0:1] = prio_req2_id_q[0:1]; + assign prio_alu1_out_vld = prio_alu1_out_vld_q; + assign prio_alu2_out_vld = prio_alu2_out_vld_q; + + assign prio_alu1_in_cmd[0:3] = + (prio_req1_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req1_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req1_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req1_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + assign prio_alu2_in_cmd[0:3] = + (prio_req2_id_q[0:1] == 2'b00) ? cmd1[0:3] : + (prio_req2_id_q[0:1] == 2'b01) ? cmd2[0:3] : + (prio_req2_id_q[0:1] == 2'b10) ? cmd3[0:3] : + (prio_req2_id_q[0:1] == 2'b11) ? cmd4[0:3] : + 4'b0; + + + assign cmd1_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b00) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b00) ) ? 1 : + 0; + + assign cmd2_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b01) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b01) ) ? 1 : + 0; + + assign cmd3_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b10) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b10) ) ? 1 : + 0; + + assign cmd4_reset = + (prio_alu1_out_vld_q && (prio_req1_id_q[0:1] == 2'b11) ) ? 1 : + (prio_alu2_out_vld_q && (prio_req2_id_q[0:1] == 2'b11) ) ? 1 : + 0; + +endmodule // priority diff --git a/code/vezba9/dut/shifter.v b/code/vezba9/dut/shifter.v new file mode 100644 index 0000000..a2d9b47 --- /dev/null +++ b/code/vezba9/dut/shifter.v @@ -0,0 +1,2310 @@ +// Library: calc1 +// Module: 32-bit shifter +// Author: Naseer Siddique + +module shifter ( bin_ovfl, shift_out, shift_cmd, shift_places, local_error_found, shift_val); + + output bin_ovfl; + output [0:63] shift_out; + + input [0:3] shift_cmd; + input [0:63] shift_places, shift_val; + input local_error_found; + + wire [0:4] pos; + + + wire [0:63] shiftleft, shiftright, tempshiftl; + + wire bin_ovfl; + wire [0:63] shift_out; + + assign pos[0:4] = shift_places[59:63]; + + assign tempshiftl[0:31] = shift_val[32:63]; + assign tempshiftl[32:63] = 32'b0; + + assign shiftleft[0] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[0] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[0+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[0+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[0+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[0+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[0+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[0+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[0+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[0+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[0+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[0+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[0+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[0+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[0+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[0+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[0+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[0+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[0+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[0+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[0+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[0+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[0+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[0+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[0+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[0+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[0+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[0+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[0+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[0+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[0+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[0+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[0+31] : + 0; + + assign shiftleft[1] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[1] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[1+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[1+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[1+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[1+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[1+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[1+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[1+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[1+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[1+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[1+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[1+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[1+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[1+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[1+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[1+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[1+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[1+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[1+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[1+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[1+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[1+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[1+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[1+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[1+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[1+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[1+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[1+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[1+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[1+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[1+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[1+31] : + 0; + + assign shiftleft[2] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[2] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[2+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[2+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[2+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[2+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[2+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[2+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[2+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[2+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[2+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[2+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[2+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[2+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[2+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[2+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[2+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[2+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[2+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[2+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[2+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[2+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[2+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[2+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[2+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[2+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[2+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[2+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[2+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[2+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[2+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[2+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[2+31] : + 0; + + assign shiftleft[3] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[3] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[3+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[3+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[3+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[3+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[3+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[3+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[3+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[3+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[3+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[3+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[3+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[3+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[3+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[3+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[3+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[3+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[3+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[3+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[3+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[3+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[3+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[3+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[3+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[3+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[3+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[3+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[3+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[3+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[3+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[3+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[3+31] : + 0; + + assign shiftleft[4] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[4] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[4+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[4+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[4+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[4+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[4+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[4+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[4+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[4+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[4+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[4+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[4+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[4+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[4+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[4+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[4+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[4+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[4+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[4+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[4+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[4+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[4+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[4+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[4+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[4+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[4+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[4+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[4+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[4+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[4+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[4+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[4+31] : + 0; + + assign shiftleft[5] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[5] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[5+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[5+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[5+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[5+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[5+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[5+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[5+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[5+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[5+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[5+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[5+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[5+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[5+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[5+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[5+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[5+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[5+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[5+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[5+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[5+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[5+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[5+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[5+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[5+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[5+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[5+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[5+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[5+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[5+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[5+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[5+31] : + 0; + + assign shiftleft[6] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[6] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[6+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[6+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[6+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[6+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[6+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[6+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[6+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[6+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[6+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[6+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[6+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[6+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[6+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[6+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[6+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[6+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[6+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[6+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[6+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[6+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[6+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[6+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[6+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[6+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[6+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[6+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[6+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[6+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[6+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[6+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[6+31] : + 0; + + assign shiftleft[7] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[7] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[7+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[7+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[7+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[7+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[7+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[7+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[7+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[7+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[7+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[7+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[7+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[7+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[7+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[7+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[7+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[7+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[7+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[7+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[7+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[7+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[7+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[7+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[7+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[7+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[7+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[7+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[7+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[7+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[7+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[7+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[7+31] : + 0; + + assign shiftleft[8] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[8] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[8+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[8+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[8+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[8+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[8+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[8+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[8+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[8+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[8+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[8+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[8+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[8+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[8+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[8+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[8+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[8+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[8+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[8+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[8+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[8+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[8+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[8+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[8+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[8+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[8+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[8+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[8+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[8+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[8+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[8+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[8+31] : + 0; + + assign shiftleft[9] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[9] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[9+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[9+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[9+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[9+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[9+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[9+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[9+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[9+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[9+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[9+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[9+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[9+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[9+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[9+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[9+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[9+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[9+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[9+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[9+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[9+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[9+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[9+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[9+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[9+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[9+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[9+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[9+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[9+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[9+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[9+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[9+31] : + 0; + + assign shiftleft[10] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[10] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[10+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[10+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[10+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[10+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[10+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[10+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[10+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[10+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[10+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[10+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[10+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[10+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[10+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[10+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[10+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[10+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[10+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[10+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[10+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[10+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[10+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[10+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[10+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[10+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[10+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[10+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[10+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[10+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[10+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[10+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[10+31] : + 0; + + assign shiftleft[11] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[11] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[11+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[11+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[11+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[11+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[11+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[11+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[11+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[11+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[11+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[11+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[11+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[11+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[11+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[11+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[11+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[11+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[11+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[11+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[11+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[11+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[11+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[11+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[11+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[11+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[11+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[11+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[11+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[11+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[11+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[11+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[11+31] : + 0; + + assign shiftleft[12] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[12] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[12+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[12+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[12+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[12+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[12+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[12+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[12+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[12+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[12+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[12+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[12+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[12+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[12+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[12+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[12+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[12+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[12+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[12+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[12+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[12+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[12+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[12+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[12+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[12+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[12+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[12+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[12+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[12+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[12+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[12+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[12+31] : + 0; + + assign shiftleft[13] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[13] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[13+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[13+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[13+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[13+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[13+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[13+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[13+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[13+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[13+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[13+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[13+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[13+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[13+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[13+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[13+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[13+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[13+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[13+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[13+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[13+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[13+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[13+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[13+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[13+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[13+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[13+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[13+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[13+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[13+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[13+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[13+31] : + 0; + + assign shiftleft[14] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[14] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[14+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[14+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[14+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[14+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[14+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[14+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[14+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[14+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[14+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[14+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[14+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[14+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[14+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[14+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[14+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[14+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[14+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[14+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[14+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[14+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[14+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[14+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[14+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[14+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[14+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[14+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[14+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[14+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[14+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[14+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[14+31] : + 0; + + assign shiftleft[15] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[15] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[15+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[15+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[15+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[15+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[15+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[15+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[15+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[15+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[15+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[15+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[15+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[15+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[15+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[15+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[15+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[15+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[15+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[15+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[15+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[15+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[15+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[15+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[15+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[15+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[15+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[15+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[15+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[15+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[15+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[15+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[15+31] : + 0; + + assign shiftleft[16] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[16] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[16+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[16+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[16+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[16+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[16+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[16+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[16+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[16+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[16+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[16+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[16+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[16+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[16+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[16+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[16+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[16+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[16+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[16+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[16+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[16+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[16+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[16+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[16+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[16+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[16+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[16+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[16+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[16+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[16+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[16+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[16+31] : + 0; + + assign shiftleft[17] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[17] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[17+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[17+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[17+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[17+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[17+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[17+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[17+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[17+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[17+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[17+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[17+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[17+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[17+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[17+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[17+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[17+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[17+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[17+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[17+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[17+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[17+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[17+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[17+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[17+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[17+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[17+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[17+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[17+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[17+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[17+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[17+31] : + 0; + + assign shiftleft[18] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[18] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[18+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[18+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[18+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[18+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[18+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[18+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[18+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[18+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[18+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[18+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[18+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[18+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[18+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[18+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[18+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[18+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[18+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[18+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[18+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[18+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[18+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[18+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[18+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[18+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[18+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[18+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[18+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[18+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[18+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[18+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[18+31] : + 0; + + assign shiftleft[19] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[19] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[19+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[19+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[19+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[19+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[19+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[19+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[19+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[19+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[19+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[19+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[19+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[19+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[19+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[19+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[19+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[19+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[19+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[19+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[19+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[19+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[19+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[19+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[19+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[19+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[19+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[19+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[19+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[19+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[19+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[19+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[19+31] : + 0; + + assign shiftleft[20] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[20] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[20+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[20+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[20+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[20+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[20+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[20+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[20+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[20+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[20+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[20+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[20+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[20+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[20+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[20+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[20+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[20+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[20+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[20+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[20+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[20+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[20+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[20+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[20+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[20+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[20+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[20+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[20+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[20+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[20+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[20+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[20+31] : + 0; + + assign shiftleft[21] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[21] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[21+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[21+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[21+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[21+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[21+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[21+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[21+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[21+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[21+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[21+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[21+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[21+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[21+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[21+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[21+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[21+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[21+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[21+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[21+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[21+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[21+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[21+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[21+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[21+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[21+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[21+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[21+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[21+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[21+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[21+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[21+31] : + 0; + + assign shiftleft[22] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[22] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[22+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[22+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[22+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[22+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[22+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[22+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[22+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[22+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[22+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[22+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[22+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[22+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[22+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[22+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[22+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[22+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[22+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[22+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[22+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[22+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[22+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[22+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[22+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[22+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[22+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[22+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[22+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[22+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[22+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[22+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[22+31] : + 0; + + assign shiftleft[23] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[23] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[23+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[23+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[23+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[23+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[23+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[23+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[23+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[23+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[23+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[23+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[23+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[23+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[23+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[23+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[23+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[23+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[23+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[23+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[23+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[23+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[23+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[23+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[23+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[23+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[23+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[23+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[23+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[23+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[23+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[23+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[23+31] : + 0; + assign shiftleft[24] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[24] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[24+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[24+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[24+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[24+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[24+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[24+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[24+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[24+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[24+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[24+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[24+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[24+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[24+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[24+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[24+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[24+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[24+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[24+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[24+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[24+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[24+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[24+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[24+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[24+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[24+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[24+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[24+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[24+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[24+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[24+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[24+31] : + 0; + + assign shiftleft[25] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[25] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[25+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[25+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[25+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[25+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[25+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[25+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[25+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[25+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[25+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[25+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[25+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[25+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[25+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[25+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[25+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[25+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[25+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[25+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[25+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[25+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[25+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[25+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[25+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[25+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[25+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[25+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[25+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[25+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[25+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[25+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[25+31] : + 0; + + assign shiftleft[26] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[26] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[26+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[26+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[26+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[26+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[26+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[26+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[26+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[26+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[26+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[26+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[26+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[26+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[26+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[26+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[26+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[26+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[26+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[26+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[26+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[26+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[26+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[26+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[26+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[26+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[26+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[26+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[26+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[26+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[26+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[26+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[26+31] : + 0; + + assign shiftleft[27] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[27] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[27+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[27+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[27+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[27+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[27+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[27+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[27+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[27+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[27+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[27+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[27+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[27+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[27+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[27+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[27+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[27+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[27+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[27+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[27+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[27+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[27+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[27+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[27+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[27+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[27+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[27+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[27+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[27+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[27+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[27+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[27+31] : + 0; + + assign shiftleft[28] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[28] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[28+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[28+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[28+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[28+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[28+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[28+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[28+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[28+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[28+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[28+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[28+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[28+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[28+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[28+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[28+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[28+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[28+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[28+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[28+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[28+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[28+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[28+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[28+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[28+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[28+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[28+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[28+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[28+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[28+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[28+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[28+31] : + 0; + + assign shiftleft[29] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[29] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[29+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[29+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[29+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[29+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[29+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[29+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[29+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[29+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[29+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[29+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[29+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[29+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[29+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[29+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[29+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[29+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[29+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[29+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[29+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[29+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[29+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[29+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[29+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[29+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[29+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[29+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[29+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[29+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[29+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[29+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[29+31] : + 0; + + assign shiftleft[30] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + ( pos[0:4] == 5'b00000 ) ? tempshiftl[30] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[30+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[30+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[30+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[30+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[30+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[30+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[30+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[30+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[30+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[30+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[30+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[30+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[30+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[30+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[30+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[30+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[30+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[30+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[30+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[30+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[30+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[30+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[30+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[30+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[30+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[30+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[30+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[30+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[30+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[30+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[30+31] : + 0; + + assign shiftleft[31] = ((pos[0:4] == 5'b0) && (~local_error_found)) ? 0 : + (pos[0:4] == 5'b00000) ? tempshiftl[31] : + ( pos[0:4] == 5'b00001 ) ? tempshiftl[31+1]: + ( pos[0:4] == 5'b00010 ) ? tempshiftl[31+2]: + ( pos[0:4] == 5'b00011 ) ? tempshiftl[31+3]: + ( pos[0:4] == 5'b00100 ) ? tempshiftl[31+4]: + ( pos[0:4] == 5'b00101 ) ? tempshiftl[31+5]: + ( pos[0:4] == 5'b00110 ) ? tempshiftl[31+6]: + ( pos[0:4] == 5'b00111 ) ? tempshiftl[31+7]: + ( pos[0:4] == 5'b01000 ) ? tempshiftl[31+8] : + ( pos[0:4] == 5'b01001 ) ? tempshiftl[31+9] : + ( pos[0:4] == 5'b01010 ) ? tempshiftl[31+10] : + ( pos[0:4] == 5'b01011 ) ? tempshiftl[31+11] : + ( pos[0:4] == 5'b01100 ) ? tempshiftl[31+12] : + ( pos[0:4] == 5'b01101 ) ? tempshiftl[31+13] : + ( pos[0:4] == 5'b01110 ) ? tempshiftl[31+14] : + ( pos[0:4] == 5'b01111 ) ? tempshiftl[31+15] : + ( pos[0:4] == 5'b10000 ) ? tempshiftl[31+16] : + ( pos[0:4] == 5'b10001 ) ? tempshiftl[31+17] : + ( pos[0:4] == 5'b10010 ) ? tempshiftl[31+18] : + ( pos[0:4] == 5'b10011 ) ? tempshiftl[31+19] : + ( pos[0:4] == 5'b10100 ) ? tempshiftl[31+20] : + ( pos[0:4] == 5'b10101 ) ? tempshiftl[31+21] : + ( pos[0:4] == 5'b10110 ) ? tempshiftl[31+22] : + ( pos[0:4] == 5'b10111 ) ? tempshiftl[31+23] : + ( pos[0:4] == 5'b11000 ) ? tempshiftl[31+24] : + ( pos[0:4] == 5'b11001 ) ? tempshiftl[31+25] : + ( pos[0:4] == 5'b11010 ) ? tempshiftl[31+26] : + ( pos[0:4] == 5'b11011 ) ? tempshiftl[31+27] : + ( pos[0:4] == 5'b11100 ) ? tempshiftl[31+28] : + ( pos[0:4] == 5'b11101 ) ? tempshiftl[31+29] : + ( pos[0:4] == 5'b11110 ) ? tempshiftl[31+30] : + ( pos[0:4] == 5'b11111 ) ? tempshiftl[31+31] : + 0; + + assign shiftright[32] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[32] : + ( pos[0:4] == 5'b00001 ) ? shift_val[32-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[32-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[32-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[32-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[32-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[32-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[32-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[32-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[32-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[32-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[32-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[32-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[32-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[32-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[32-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[32-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[32-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[32-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[32-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[32-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[32-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[32-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[32-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[32-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[32-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[32-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[32-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[32-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[32-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[32-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[32-31] : + 0; + + assign shiftright[33] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[33] : + ( pos[0:4] == 5'b00001 ) ? shift_val[33-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[33-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[33-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[33-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[33-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[33-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[33-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[33-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[33-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[33-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[33-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[33-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[33-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[33-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[33-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[33-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[33-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[33-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[33-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[33-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[33-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[33-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[33-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[33-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[33-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[33-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[33-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[33-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[33-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[33-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[33-31] : + 0; + + assign shiftright[34] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[34] : + ( pos[0:4] == 5'b00001 ) ? shift_val[34-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[34-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[34-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[34-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[34-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[34-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[34-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[34-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[34-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[34-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[34-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[34-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[34-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[34-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[34-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[34-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[34-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[34-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[34-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[34-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[34-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[34-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[34-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[34-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[34-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[34-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[34-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[34-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[34-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[34-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[34-31] : + 0; + + assign shiftright[35] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[35] : + ( pos[0:4] == 5'b00001 ) ? shift_val[35-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[35-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[35-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[35-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[35-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[35-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[35-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[35-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[35-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[35-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[35-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[35-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[35-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[35-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[35-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[35-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[35-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[35-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[35-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[35-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[35-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[35-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[35-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[35-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[35-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[35-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[35-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[35-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[35-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[35-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[35-31] : + 0; + + assign shiftright[36] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[36] : + ( pos[0:4] == 5'b00001 ) ? shift_val[36-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[36-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[36-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[36-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[36-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[36-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[36-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[36-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[36-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[36-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[36-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[36-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[36-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[36-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[36-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[36-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[36-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[36-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[36-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[36-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[36-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[36-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[36-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[36-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[36-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[36-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[36-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[36-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[36-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[36-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[36-31] : + 0; + + assign shiftright[37] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[37] : + ( pos[0:4] == 5'b00001 ) ? shift_val[37-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[37-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[37-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[37-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[37-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[37-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[37-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[37-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[37-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[37-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[37-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[37-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[37-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[37-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[37-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[37-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[37-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[37-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[37-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[37-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[37-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[37-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[37-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[37-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[37-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[37-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[37-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[37-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[37-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[37-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[37-31] : + 0; + + assign shiftright[38] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[38] : + ( pos[0:4] == 5'b00001 ) ? shift_val[38-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[38-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[38-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[38-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[38-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[38-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[38-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[38-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[38-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[38-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[38-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[38-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[38-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[38-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[38-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[38-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[38-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[38-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[38-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[38-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[38-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[38-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[38-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[38-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[38-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[38-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[38-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[38-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[38-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[38-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[38-31] : + 0; + + assign shiftright[39] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[39] : + ( pos[0:4] == 5'b00001 ) ? shift_val[39-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[39-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[39-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[39-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[39-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[39-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[39-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[39-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[39-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[39-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[39-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[39-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[39-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[39-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[39-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[39-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[39-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[39-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[39-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[39-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[39-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[39-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[39-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[39-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[39-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[39-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[39-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[39-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[39-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[39-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[39-31] : + 0; + + assign shiftright[40] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[40] : + ( pos[0:4] == 5'b00001 ) ? shift_val[40-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[40-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[40-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[40-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[40-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[40-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[40-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[40-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[40-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[40-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[40-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[40-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[40-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[40-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[40-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[40-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[40-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[40-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[40-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[40-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[40-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[40-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[40-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[40-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[40-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[40-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[40-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[40-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[40-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[40-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[40-31] : + 0; + + assign shiftright[41] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[41] : + ( pos[0:4] == 5'b00001 ) ? shift_val[41-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[41-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[41-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[41-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[41-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[41-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[41-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[41-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[41-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[41-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[41-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[41-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[41-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[41-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[41-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[41-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[41-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[41-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[41-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[41-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[41-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[41-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[41-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[41-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[41-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[41-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[41-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[41-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[41-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[41-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[41-31] : + 0; + + assign shiftright[42] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[42] : + ( pos[0:4] == 5'b00001 ) ? shift_val[42-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[42-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[42-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[42-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[42-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[42-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[42-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[42-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[42-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[42-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[42-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[42-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[42-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[42-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[42-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[42-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[42-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[42-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[42-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[42-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[42-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[42-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[42-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[42-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[42-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[42-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[42-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[42-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[42-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[42-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[42-31] : + 0; + + + assign shiftright[43] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[43] : + ( pos[0:4] == 5'b00001 ) ? shift_val[43-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[43-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[43-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[43-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[43-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[43-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[43-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[43-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[43-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[43-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[43-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[43-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[43-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[43-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[43-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[43-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[43-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[43-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[43-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[43-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[43-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[43-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[43-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[43-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[43-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[43-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[43-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[43-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[43-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[43-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[43-31] : + 0; + + assign shiftright[44] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[44] : + ( pos[0:4] == 5'b00001 ) ? shift_val[44-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[44-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[44-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[44-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[44-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[44-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[44-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[44-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[44-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[44-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[44-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[44-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[44-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[44-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[44-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[44-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[44-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[44-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[44-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[44-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[44-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[44-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[44-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[44-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[44-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[44-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[44-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[44-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[44-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[44-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[44-31] : + 0; + + assign shiftright[45] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[45] : + ( pos[0:4] == 5'b00001 ) ? shift_val[45-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[45-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[45-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[45-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[45-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[45-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[45-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[45-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[45-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[45-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[45-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[45-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[45-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[45-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[45-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[45-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[45-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[45-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[45-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[45-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[45-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[45-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[45-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[45-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[45-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[45-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[45-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[45-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[45-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[45-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[45-31] : + 0; + + assign shiftright[46] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[46] : + ( pos[0:4] == 5'b00001 ) ? shift_val[46-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[46-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[46-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[46-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[46-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[46-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[46-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[46-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[46-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[46-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[46-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[46-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[46-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[46-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[46-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[46-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[46-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[46-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[46-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[46-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[46-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[46-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[46-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[46-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[46-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[46-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[46-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[46-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[46-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[46-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[46-31] : + 0; + + assign shiftright[47] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[47] : + ( pos[0:4] == 5'b00001 ) ? shift_val[47-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[47-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[47-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[47-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[47-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[47-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[47-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[47-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[47-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[47-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[47-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[47-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[47-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[47-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[47-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[47-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[47-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[47-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[47-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[47-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[47-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[47-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[47-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[47-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[47-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[47-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[47-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[47-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[47-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[47-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[47-31] : + 0; + + assign shiftright[48] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[48] : + ( pos[0:4] == 5'b00001 ) ? shift_val[48-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[48-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[48-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[48-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[48-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[48-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[48-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[48-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[48-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[48-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[48-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[48-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[48-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[48-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[48-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[48-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[48-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[48-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[48-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[48-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[48-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[48-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[48-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[48-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[48-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[48-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[48-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[48-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[48-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[48-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[48-31] : + 0; + + assign shiftright[49] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[49] : + ( pos[0:4] == 5'b00001 ) ? shift_val[49-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[49-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[49-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[49-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[49-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[49-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[49-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[49-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[49-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[49-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[49-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[49-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[49-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[49-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[49-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[49-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[49-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[49-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[49-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[49-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[49-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[49-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[49-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[49-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[49-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[49-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[49-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[49-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[49-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[49-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[49-31] : + 0; + + assign shiftright[50] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[50] : + ( pos[0:4] == 5'b00001 ) ? shift_val[50-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[50-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[50-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[50-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[50-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[50-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[50-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[50-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[50-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[50-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[50-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[50-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[50-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[50-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[50-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[50-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[50-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[50-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[50-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[50-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[50-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[50-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[50-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[50-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[50-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[50-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[50-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[50-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[50-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[50-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[50-31] : + 0; + + assign shiftright[51] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[51] : + ( pos[0:4] == 5'b00001 ) ? shift_val[51-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[51-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[51-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[51-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[51-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[51-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[51-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[51-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[51-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[51-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[51-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[51-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[51-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[51-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[51-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[51-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[51-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[51-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[51-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[51-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[51-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[51-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[51-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[51-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[51-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[51-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[51-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[51-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[51-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[51-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[51-31] : + 0; + + assign shiftright[52] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[52] : + ( pos[0:4] == 5'b00001 ) ? shift_val[52-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[52-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[52-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[52-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[52-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[52-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[52-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[52-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[52-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[52-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[52-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[52-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[52-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[52-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[52-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[52-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[52-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[52-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[52-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[52-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[52-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[52-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[52-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[52-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[52-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[52-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[52-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[52-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[52-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[52-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[52-31] : + 0; + + assign shiftright[53] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[53] : + ( pos[0:4] == 5'b00001 ) ? shift_val[53-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[53-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[53-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[53-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[53-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[53-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[53-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[53-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[53-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[53-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[53-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[53-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[53-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[53-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[53-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[53-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[53-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[53-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[53-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[53-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[53-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[53-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[53-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[53-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[53-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[53-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[53-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[53-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[53-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[53-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[53-31] : + 0; + + assign shiftright[54] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[54] : + ( pos[0:4] == 5'b00001 ) ? shift_val[54-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[54-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[54-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[54-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[54-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[54-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[54-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[54-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[54-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[54-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[54-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[54-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[54-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[54-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[54-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[54-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[54-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[54-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[54-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[54-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[54-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[54-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[54-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[54-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[54-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[54-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[54-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[54-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[54-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[54-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[54-31] : + 0; + + assign shiftright[55] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[55] : + ( pos[0:4] == 5'b00001 ) ? shift_val[55-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[55-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[55-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[55-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[55-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[55-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[55-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[55-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[55-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[55-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[55-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[55-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[55-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[55-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[55-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[55-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[55-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[55-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[55-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[55-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[55-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[55-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[55-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[55-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[55-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[55-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[55-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[55-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[55-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[55-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[55-31] : + 0; + + assign shiftright[56] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[56] : + ( pos[0:4] == 5'b00001 ) ? shift_val[56-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[56-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[56-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[56-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[56-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[56-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[56-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[56-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[56-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[56-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[56-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[56-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[56-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[56-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[56-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[56-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[56-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[56-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[56-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[56-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[56-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[56-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[56-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[56-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[56-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[56-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[56-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[56-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[56-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[56-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[56-31] : + 0; + + assign shiftright[57] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[57] : + ( pos[0:4] == 5'b00001 ) ? shift_val[57-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[57-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[57-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[57-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[57-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[57-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[57-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[57-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[57-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[57-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[57-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[57-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[57-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[57-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[57-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[57-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[57-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[57-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[57-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[57-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[57-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[57-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[57-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[57-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[57-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[57-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[57-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[57-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[57-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[57-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[57-31] : + 0; + + assign shiftright[58] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[58] : + ( pos[0:4] == 5'b00001 ) ? shift_val[58-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[58-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[58-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[58-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[58-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[58-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[58-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[58-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[58-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[58-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[58-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[58-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[58-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[58-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[58-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[58-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[58-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[58-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[58-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[58-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[58-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[58-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[58-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[58-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[58-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[58-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[58-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[58-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[58-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[58-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[58-31] : + 0; + + assign shiftright[59] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[59] : + ( pos[0:4] == 5'b00001 ) ? shift_val[59-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[59-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[59-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[59-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[59-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[59-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[59-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[59-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[59-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[59-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[59-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[59-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[59-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[59-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[59-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[59-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[59-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[59-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[59-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[59-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[59-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[59-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[59-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[59-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[59-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[59-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[59-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[59-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[59-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[59-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[59-31] : + 0; + + assign shiftright[60] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[60] : + ( pos[0:4] == 5'b00001 ) ? shift_val[60-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[60-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[60-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[60-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[60-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[60-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[60-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[60-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[60-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[60-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[60-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[60-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[60-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[60-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[60-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[60-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[60-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[60-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[60-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[60-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[60-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[60-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[60-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[60-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[60-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[60-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[60-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[60-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[60-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[60-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[60-31] : + 0; + + assign shiftright[61] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[61] : + ( pos[0:4] == 5'b00001 ) ? shift_val[61-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[61-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[61-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[61-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[61-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[61-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[61-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[61-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[61-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[61-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[61-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[61-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[61-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[61-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[61-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[61-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[61-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[61-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[61-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[61-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[61-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[61-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[61-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[61-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[61-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[61-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[61-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[61-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[61-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[61-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[61-31] : + 0; + + assign shiftright[62] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[62] : + ( pos[0:4] == 5'b00001 ) ? shift_val[62-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[62-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[62-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[62-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[62-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[62-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[62-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[62-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[62-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[62-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[62-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[62-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[62-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[62-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[62-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[62-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[62-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[62-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[62-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[62-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[62-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[62-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[62-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[62-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[62-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[62-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[62-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[62-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[62-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[62-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[62-31] : + 0; + + assign shiftright[63] = + ((pos[0:4] == 5'b00000 ) && ~local_error_found) ? 0 : + ( pos[0:4] == 5'b00001 ) ? shift_val[63] : + ( pos[0:4] == 5'b00001 ) ? shift_val[63-1]: + ( pos[0:4] == 5'b00010 ) ? shift_val[63-2]: + ( pos[0:4] == 5'b00011 ) ? shift_val[63-3]: + ( pos[0:4] == 5'b00100 ) ? shift_val[63-4]: + ( pos[0:4] == 5'b00101 ) ? shift_val[63-5]: + ( pos[0:4] == 5'b00110 ) ? shift_val[63-6]: + ( pos[0:4] == 5'b00111 ) ? shift_val[63-7]: + ( pos[0:4] == 5'b01000 ) ? shift_val[63-8] : + ( pos[0:4] == 5'b01001 ) ? shift_val[63-9] : + ( pos[0:4] == 5'b01010 ) ? shift_val[63-10] : + ( pos[0:4] == 5'b01011 ) ? shift_val[63-11] : + ( pos[0:4] == 5'b01100 ) ? shift_val[63-12] : + ( pos[0:4] == 5'b01101 ) ? shift_val[63-13] : + ( pos[0:4] == 5'b01110 ) ? shift_val[63-14] : + ( pos[0:4] == 5'b01111 ) ? shift_val[63-15] : + ( pos[0:4] == 5'b10000 ) ? shift_val[63-16] : + ( pos[0:4] == 5'b10001 ) ? shift_val[63-17] : + ( pos[0:4] == 5'b10010 ) ? shift_val[63-18] : + ( pos[0:4] == 5'b10011 ) ? shift_val[63-19] : + ( pos[0:4] == 5'b10100 ) ? shift_val[63-20] : + ( pos[0:4] == 5'b10101 ) ? shift_val[63-21] : + ( pos[0:4] == 5'b10110 ) ? shift_val[63-22] : + ( pos[0:4] == 5'b10111 ) ? shift_val[63-23] : + ( pos[0:4] == 5'b11000 ) ? shift_val[63-24] : + ( pos[0:4] == 5'b11001 ) ? shift_val[63-25] : + ( pos[0:4] == 5'b11010 ) ? shift_val[63-26] : + ( pos[0:4] == 5'b11011 ) ? shift_val[63-27] : + ( pos[0:4] == 5'b11100 ) ? shift_val[63-28] : + ( pos[0:4] == 5'b11101 ) ? shift_val[63-29] : + ( pos[0:4] == 5'b11110 ) ? shift_val[63-30] : + ( pos[0:4] == 5'b11111 ) ? shift_val[63-31] : + 0; + + assign shift_out[0:31] = 32'b0; + + assign shift_out[32:63] = + ( shift_cmd[0:3] == 4'b0101 ) ? shiftleft[0:31] : + ( shift_cmd[0:3] == 4'b0110 ) ? shiftright[32:63] : + 32'b0; + + assign bin_ovfl = 1'b0; + +endmodule // shifter + + \ No newline at end of file diff --git a/code/vezba9/v9_run.f b/code/vezba9/v9_run.f new file mode 100644 index 0000000..2debc97 --- /dev/null +++ b/code/vezba9/v9_run.f @@ -0,0 +1,33 @@ +-uvmhome "/eda/cadence/2019-20/RHELx86/XCELIUM_19.03.013/tools/methodology/UVM/CDNS-1.2/" +-uvm +UVM_TESTNAME=test_simple +-sv +incdir+./verif +-sv +incdir+./verif/Agent +-sv +incdir+./verif/Sequences +-sv +incdir+./verif/Configurations + + ./dut/alu_input_stage.v + ./dut/alu_output_stage.v + ./dut/exdbin_mac.v + ./dut/holdreg.v + ./dut/mux_out.v + ./dut/shifter.v + ./dut/priority.v + ./dut/calc_top.v + + +-sv ./verif/Configurations/configurations_pkg.sv +-sv ./verif/Agent/calc_agent_pkg.sv +-sv ./verif/Sequences/calc_seq_pkg.sv +-sv ./verif/calc_test_pkg.sv +-sv ./verif/calc_if.sv + +-sv ./verif/calc_verif_top.sv + + + + +#-LINEDEBUG +-access +rwc +-disable_sem2009 +-nowarn "MEMODR" +-timescale 1ns/10ps diff --git a/code/vezba9/verif/Agent/calc_agent.sv b/code/vezba9/verif/Agent/calc_agent.sv new file mode 100644 index 0000000..8a52e2d --- /dev/null +++ b/code/vezba9/verif/Agent/calc_agent.sv @@ -0,0 +1,47 @@ +class calc_agent extends uvm_agent; + + // components + calc_driver drv; + calc_sequencer seqr; + calc_monitor mon; + virtual interface calc_if vif; + // configuration + calc_config cfg; + int value; + `uvm_component_utils_begin (calc_agent) + `uvm_field_object(cfg, UVM_DEFAULT) + `uvm_component_utils_end + + function new(string name = "calc_agent", uvm_component parent = null); + super.new(name,parent); + endfunction + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + /************Geting from configuration database*******************/ + if (!uvm_config_db#(virtual calc_if)::get(this, "", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + + if(!uvm_config_db#(calc_config)::get(this, "", "calc_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + /*****************************************************************/ + + /************Setting to configuration database********************/ + uvm_config_db#(virtual calc_if)::set(this, "*", "calc_if", vif); + /*****************************************************************/ + + mon = calc_monitor::type_id::create("mon", this); + if(cfg.is_active == UVM_ACTIVE) begin + drv = calc_driver::type_id::create("drv", this); + seqr = calc_sequencer::type_id::create("seqr", this); + end + endfunction : build_phase + + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + if(cfg.is_active == UVM_ACTIVE) begin + drv.seq_item_port.connect(seqr.seq_item_export); + end + endfunction : connect_phase + +endclass : calc_agent diff --git a/code/vezba9/verif/Agent/calc_agent_pkg.sv b/code/vezba9/verif/Agent/calc_agent_pkg.sv new file mode 100644 index 0000000..e0b4fab --- /dev/null +++ b/code/vezba9/verif/Agent/calc_agent_pkg.sv @@ -0,0 +1,25 @@ +`ifndef CALC_AGENT_PKG +`define CALC_AGENT_PKG + +package calc_agent_pkg; + + import uvm_pkg::*; + `include "uvm_macros.svh" + + ////////////////////////////////////////////////////////// + // include Agent components : driver,monitor,sequencer + ///////////////////////////////////////////////////////// + import configurations_pkg::*; + + `include "calc_seq_item.sv" + `include "calc_sequencer.sv" + `include "calc_driver.sv" + `include "calc_monitor.sv" + `include "calc_agent.sv" + +endpackage + +`endif + + + diff --git a/code/vezba9/verif/Agent/calc_driver.sv b/code/vezba9/verif/Agent/calc_driver.sv new file mode 100644 index 0000000..dfe3ed0 --- /dev/null +++ b/code/vezba9/verif/Agent/calc_driver.sv @@ -0,0 +1,36 @@ +`ifndef CALC_DRIVER_SV + `define CALC_DRIVER_SV +class calc_driver extends uvm_driver#(calc_seq_item); + + `uvm_component_utils(calc_driver) + + virtual interface calc_if vif; + + function new(string name = "calc_driver", uvm_component parent = null); + super.new(name,parent); + if (!uvm_config_db#(virtual calc_if)::get(this, "", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"}) + endfunction + + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + + endfunction : connect_phase + + + task main_phase(uvm_phase phase); + forever begin + seq_item_port.get_next_item(req); + `uvm_info(get_type_name(), + $sformatf("Driver sending...\n%s", req.sprint()), + UVM_HIGH) + // do actual driving here + /* TODO */ + seq_item_port.item_done(); + end + endtask : main_phase + +endclass : calc_driver + +`endif + diff --git a/code/vezba9/verif/Agent/calc_monitor.sv b/code/vezba9/verif/Agent/calc_monitor.sv new file mode 100644 index 0000000..2471e84 --- /dev/null +++ b/code/vezba9/verif/Agent/calc_monitor.sv @@ -0,0 +1,45 @@ +class calc_monitor extends uvm_monitor; + + // control fileds + bit checks_enable = 1; + bit coverage_enable = 1; + + uvm_analysis_port #(calc_seq_item) item_collected_port; + + `uvm_component_utils_begin(calc_monitor) + `uvm_field_int(checks_enable, UVM_DEFAULT) + `uvm_field_int(coverage_enable, UVM_DEFAULT) + `uvm_component_utils_end + + // The virtual interface used to drive and view HDL signals. + virtual interface calc_if vif; + + // current transaction + calc_seq_item curr_it; + + // coverage can go here + // ... + + function new(string name = "calc_monitor", uvm_component parent = null); + super.new(name,parent); + item_collected_port = new("item_collected_port", this); + if (!uvm_config_db#(virtual calc_if)::get(this, "", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + endfunction + + function void connect_phase(uvm_phase phase); + super.connect_phase(phase); + + endfunction : connect_phase + + task main_phase(uvm_phase phase); + // forever begin + // curr_it = calc_seq_item::type_id::create("curr_it", this); + // ... + // collect transactions + // ... + // item_collected_port.write(curr_it); + // end + endtask : main_phase + +endclass : calc_monitor diff --git a/code/vezba9/verif/Agent/calc_seq_item.sv b/code/vezba9/verif/Agent/calc_seq_item.sv new file mode 100644 index 0000000..0e26bcc --- /dev/null +++ b/code/vezba9/verif/Agent/calc_seq_item.sv @@ -0,0 +1,21 @@ +`ifndef CALC_SEQ_ITEM_SV + `define CALC_SEQ_ITEM_SV + +parameter DATA_WIDTH = 32; +parameter RESP_WIDTH = 2; +parameter CMD_WIDTH = 4; + +class calc_seq_item extends uvm_sequence_item; + + + + `uvm_object_utils_begin(calc_seq_item) + `uvm_object_utils_end + + function new (string name = "calc_seq_item"); + super.new(name); + endfunction // new + +endclass : calc_seq_item + +`endif diff --git a/code/vezba9/verif/Agent/calc_sequencer.sv b/code/vezba9/verif/Agent/calc_sequencer.sv new file mode 100644 index 0000000..d01a629 --- /dev/null +++ b/code/vezba9/verif/Agent/calc_sequencer.sv @@ -0,0 +1,15 @@ +`ifndef CALC_SEQUENCER_SV + `define CALC_SEQUENCER_SV + +class calc_sequencer extends uvm_sequencer#(calc_seq_item); + + `uvm_component_utils(calc_sequencer) + + function new(string name = "calc_sequencer", uvm_component parent = null); + super.new(name,parent); + endfunction + +endclass : calc_sequencer + +`endif + diff --git a/code/vezba9/verif/Configurations/calc_config.sv b/code/vezba9/verif/Configurations/calc_config.sv new file mode 100644 index 0000000..3bb21e9 --- /dev/null +++ b/code/vezba9/verif/Configurations/calc_config.sv @@ -0,0 +1,13 @@ +class calc_config extends uvm_object; + + uvm_active_passive_enum is_active = UVM_ACTIVE; + + `uvm_object_utils_begin (calc_config) + `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_DEFAULT) + `uvm_object_utils_end + + function new(string name = "calc_config"); + super.new(name); + endfunction + +endclass : calc_config diff --git a/code/vezba9/verif/Configurations/configurations_pkg.sv b/code/vezba9/verif/Configurations/configurations_pkg.sv new file mode 100644 index 0000000..eb77582 --- /dev/null +++ b/code/vezba9/verif/Configurations/configurations_pkg.sv @@ -0,0 +1,15 @@ +`ifndef CONFIGURATION_PKG_SV + `define CONFIGURATION_PKG_SV + +package configurations_pkg; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + +`include "calc_config.sv" + + +endpackage : configurations_pkg + +`endif + diff --git a/code/vezba9/verif/Sequences/calc_base_seq.sv b/code/vezba9/verif/Sequences/calc_base_seq.sv new file mode 100644 index 0000000..1f8cb80 --- /dev/null +++ b/code/vezba9/verif/Sequences/calc_base_seq.sv @@ -0,0 +1,30 @@ +`ifndef CALC_BASE_SEQ_SV + `define CALC_BASE_SEQ_SV + +class calc_base_seq extends uvm_sequence#(calc_seq_item); + + `uvm_object_utils(calc_base_seq) + `uvm_declare_p_sequencer(calc_sequencer) + + function new(string name = "calc_base_seq"); + super.new(name); + endfunction + + // objections are raised in pre_body + virtual task pre_body(); + uvm_phase phase = get_starting_phase(); + if (phase != null) + phase.raise_objection(this, {"Running sequence '", get_full_name(), "'"}); + uvm_test_done.set_drain_time(this, 200us); + endtask : pre_body + + // objections are dropped in post_body + virtual task post_body(); + uvm_phase phase = get_starting_phase(); + if (phase != null) + phase.drop_objection(this, {"Completed sequence '", get_full_name(), "'"}); + endtask : post_body + +endclass : calc_base_seq + +`endif diff --git a/code/vezba9/verif/Sequences/calc_seq_pkg.sv b/code/vezba9/verif/Sequences/calc_seq_pkg.sv new file mode 100644 index 0000000..21495d5 --- /dev/null +++ b/code/vezba9/verif/Sequences/calc_seq_pkg.sv @@ -0,0 +1,11 @@ +`ifndef CALC_SEQ_PKG_SV + `define CALC_SEQ_PKG_SV +package calc_seq_pkg; + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + import calc_agent_pkg::calc_seq_item; + import calc_agent_pkg::calc_sequencer; + `include "calc_base_seq.sv" + `include "calc_simple_seq.sv" + endpackage +`endif diff --git a/code/vezba9/verif/Sequences/calc_simple_seq.sv b/code/vezba9/verif/Sequences/calc_simple_seq.sv new file mode 100644 index 0000000..da7ee2e --- /dev/null +++ b/code/vezba9/verif/Sequences/calc_simple_seq.sv @@ -0,0 +1,19 @@ +`ifndef CALC_SIMPLE_SEQ_SV + `define CALC_SIMPLE_SEQ_SV + +class calc_simple_seq extends calc_base_seq; + + `uvm_object_utils (calc_simple_seq) + + function new(string name = "calc_simple_seq"); + super.new(name); + endfunction + + virtual task body(); + // simple example - just send one item + `uvm_do(req); + endtask : body + +endclass : calc_simple_seq + +`endif diff --git a/code/vezba9/verif/calc_env.sv b/code/vezba9/verif/calc_env.sv new file mode 100644 index 0000000..23f4b16 --- /dev/null +++ b/code/vezba9/verif/calc_env.sv @@ -0,0 +1,36 @@ +`ifndef CALC_ENV_SV + `define CALC_ENV_SV + +class calc_env extends uvm_env; + + calc_agent agent; + calc_config cfg; + virtual interface calc_if vif; + `uvm_component_utils (calc_env) + + function new(string name = "calc_env", uvm_component parent = null); + super.new(name,parent); + endfunction + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + /************Geting from configuration database*******************/ + if (!uvm_config_db#(virtual calc_if)::get(this, "", "calc_if", vif)) + `uvm_fatal("NOVIF",{"virtual interface must be set:",get_full_name(),".vif"}) + + if(!uvm_config_db#(calc_config)::get(this, "", "calc_config", cfg)) + `uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"}) + /*****************************************************************/ + + + /************Setting to configuration database********************/ + uvm_config_db#(calc_config)::set(this, "agent", "calc_config", cfg); + uvm_config_db#(virtual calc_if)::set(this, "agent", "calc_if", vif); + /*****************************************************************/ + agent = calc_agent::type_id::create("agent", this); + + endfunction : build_phase + +endclass : calc_env + +`endif diff --git a/code/vezba9/verif/calc_if.sv b/code/vezba9/verif/calc_if.sv new file mode 100644 index 0000000..feebbb1 --- /dev/null +++ b/code/vezba9/verif/calc_if.sv @@ -0,0 +1,29 @@ +`ifndef CALC_IF_SV + `define CALC_IF_SV + +interface calc_if (input clk, logic [6 : 0] rst); + + parameter DATA_WIDTH = 32; + parameter RESP_WIDTH = 2; + parameter CMD_WIDTH = 4; + + logic [DATA_WIDTH - 1 : 0] out_data1; + logic [DATA_WIDTH - 1 : 0] out_data2; + logic [DATA_WIDTH - 1 : 0] out_data3; + logic [DATA_WIDTH - 1 : 0] out_data4; + logic [RESP_WIDTH - 1 : 0] out_resp1; + logic [RESP_WIDTH - 1 : 0] out_resp2; + logic [RESP_WIDTH - 1 : 0] out_resp3; + logic [RESP_WIDTH - 1 : 0] out_resp4; + logic [CMD_WIDTH - 1 : 0] req1_cmd_in; + logic [DATA_WIDTH - 1 : 0] req1_data_in; + logic [CMD_WIDTH - 1 : 0] req2_cmd_in; + logic [DATA_WIDTH - 1 : 0] req2_data_in; + logic [CMD_WIDTH - 1 : 0] req3_cmd_in; + logic [DATA_WIDTH - 1 : 0] req3_data_in; + logic [CMD_WIDTH - 1 : 0] req4_cmd_in; + logic [DATA_WIDTH - 1 : 0] req4_data_in; + +endinterface : calc_if + +`endif diff --git a/code/vezba9/verif/calc_test_pkg.sv b/code/vezba9/verif/calc_test_pkg.sv new file mode 100644 index 0000000..4fad561 --- /dev/null +++ b/code/vezba9/verif/calc_test_pkg.sv @@ -0,0 +1,23 @@ +`ifndef CALC_TEST_PKG_SV + `define CALC_TEST_PKG_SV + +package calc_test_pkg; + + import uvm_pkg::*; // import the UVM library + `include "uvm_macros.svh" // Include the UVM macros + + import calc_agent_pkg::*; + import calc_seq_pkg::*; + import configurations_pkg::*; +`include "calc_env.sv" +`include "test_base.sv" +`include "test_simple.sv" +`include "test_simple_2.sv" + + +endpackage : calc_test_pkg + + `include "calc_if.sv" + +`endif + diff --git a/code/vezba9/verif/calc_verif_top.sv b/code/vezba9/verif/calc_verif_top.sv new file mode 100644 index 0000000..470a268 --- /dev/null +++ b/code/vezba9/verif/calc_verif_top.sv @@ -0,0 +1,52 @@ +module calc_verif_top; + + import uvm_pkg::*; // import the UVM library +`include "uvm_macros.svh" // Include the UVM macros + + import calc_test_pkg::*; + + logic clk; + logic [6 : 0] rst; + + // interface + calc_if calc_vif(clk, rst); + + // DUT + calc_top DUT( + .c_clk ( clk ), + .reset ( rst ), + .out_data1 ( calc_vif.out_data1 ), + .out_data2 ( calc_vif.out_data2 ), + .out_data3 ( calc_vif.out_data3 ), + .out_data4 ( calc_vif.out_data4 ), + .out_resp1 ( calc_vif.out_resp1 ), + .out_resp2 ( calc_vif.out_resp2 ), + .out_resp3 ( calc_vif.out_resp3 ), + .out_resp4 ( calc_vif.out_resp4 ), + .req1_cmd_in ( calc_vif.req1_cmd_in ), + .req1_data_in ( calc_vif.req1_data_in ), + .req2_cmd_in ( calc_vif.req2_cmd_in ), + .req2_data_in ( calc_vif.req2_data_in ), + .req3_cmd_in ( calc_vif.req3_cmd_in ), + .req3_data_in ( calc_vif.req3_data_in ), + .req4_cmd_in ( calc_vif.req4_cmd_in ), + .req4_data_in ( calc_vif.req4_data_in ) + ); + + // run test + initial begin + uvm_config_db#(virtual calc_if)::set(null, "uvm_test_top.env", "calc_if", calc_vif); + run_test(); + end + + // clock and reset init. + initial begin + clk <= 0; + rst <= 1; + #50 rst <= 0; + end + + // clock generation + always #50 clk = ~clk; + +endmodule : calc_verif_top diff --git a/code/vezba9/verif/test_base.sv b/code/vezba9/verif/test_base.sv new file mode 100644 index 0000000..19ec99d --- /dev/null +++ b/code/vezba9/verif/test_base.sv @@ -0,0 +1,29 @@ +`ifndef TEST_BASE_SV + `define TEST_BASE_SV + +class test_base extends uvm_test; + + calc_env env; + calc_config cfg; + + `uvm_component_utils(test_base) + + function new(string name = "test_base", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + cfg = calc_config::type_id::create("cfg"); + uvm_config_db#(calc_config)::set(this, "env", "calc_config", cfg); + env = calc_env::type_id::create("env", this); + endfunction : build_phase + + function void end_of_elaboration_phase(uvm_phase phase); + super.end_of_elaboration_phase(phase); + uvm_top.print_topology(); + endfunction : end_of_elaboration_phase + +endclass : test_base + +`endif diff --git a/code/vezba9/verif/test_simple.sv b/code/vezba9/verif/test_simple.sv new file mode 100644 index 0000000..0cc2aa6 --- /dev/null +++ b/code/vezba9/verif/test_simple.sv @@ -0,0 +1,27 @@ +`ifndef TEST_SIMPLE_SV + `define TEST_SIMPLE_SV + +class test_simple extends test_base; + + `uvm_component_utils(test_simple) + + calc_simple_seq simple_seq; + + function new(string name = "test_simple", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + simple_seq = calc_simple_seq::type_id::create("simple_seq"); + endfunction : build_phase + + task main_phase(uvm_phase phase); + phase.raise_objection(this); + simple_seq.start(env.agent.seqr); + phase.drop_objection(this); + endtask : main_phase + +endclass + +`endif diff --git a/code/vezba9/verif/test_simple_2.sv b/code/vezba9/verif/test_simple_2.sv new file mode 100644 index 0000000..57ad9f6 --- /dev/null +++ b/code/vezba9/verif/test_simple_2.sv @@ -0,0 +1,23 @@ +`ifndef TEST_SIMPLE_2_SV + `define TEST_SIMPLE_2_SV + +class test_simple_2 extends test_base; + + `uvm_component_utils(test_simple_2) + + function new(string name = "test_simple_2", uvm_component parent = null); + super.new(name,parent); + endfunction : new + + function void build_phase(uvm_phase phase); + super.build_phase(phase); + + uvm_config_db#(uvm_object_wrapper)::set(this, + "seqr.main_phase", + "default_sequence", + calc_simple_seq::type_id::get()); + endfunction : build_phase + +endclass + +`endif diff --git a/vezba1-1.pdf b/vezba1-1.pdf new file mode 100644 index 0000000..402f404 Binary files /dev/null and b/vezba1-1.pdf differ diff --git a/vezba10-1.pdf b/vezba10-1.pdf new file mode 100644 index 0000000..be7cd59 Binary files /dev/null and b/vezba10-1.pdf differ diff --git a/vezba11-1.pdf b/vezba11-1.pdf new file mode 100644 index 0000000..c5089c5 Binary files /dev/null and b/vezba11-1.pdf differ diff --git a/vezba12-1.pdf b/vezba12-1.pdf new file mode 100644 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