209 lines
6.9 KiB
Systemverilog
209 lines
6.9 KiB
Systemverilog
/****************************************************************************
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+-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+
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|F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e|
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+-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+
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FILE i2c_monitor.sv
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DESCRIPTION
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****************************************************************************/
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`ifndef I2C_MONITOR_SV
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`define I2C_MONITOR_SV
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/*
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* Class: i2c_monitor
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*/
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class i2c_monitor extends uvm_monitor;
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// i2c virtual interface
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virtual i2c_if vif;
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// configuration
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i2c_config cfg;
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// TLM - from monitor to other components
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uvm_analysis_port #(i2c_transaction) item_collected_port;
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// keep track of number of transactions
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int unsigned num_transactions = 0;
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// current transaction
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i2c_transaction tr_collected;
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// start and stop helper events
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event start_e;
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event stop_e;
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// UVM factory registration
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`uvm_component_utils_begin(i2c_monitor)
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`uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE)
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`uvm_component_utils_end
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// coverage
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covergroup cg_i2c_monitor;
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// cover direction - read or write
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cp_direction : coverpoint tr_collected.dir {
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bins write = {I2C_WRITE};
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bins read = {I2C_READ};
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}
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// cover address ack
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cp_addr_ack : coverpoint tr_collected.addr_ack {
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bins ack = {I2C_ACK};
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bins nack = {I2C_NACK};
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}
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// cover data ack
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cp_data_ack : coverpoint tr_collected.data_ack {
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bins ack = {I2C_ACK};
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bins nack = {I2C_NACK};
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}
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// TODO : add others
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endgroup : cg_i2c_monitor;
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// new - constructor
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function new(string name = "i2c_monitor", uvm_component parent = null);
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super.new(name, parent);
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item_collected_port = new("item_collected_port", this);
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cg_i2c_monitor = new();
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endfunction : new
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// UVM build_phase
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function void build_phase(uvm_phase phase);
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super.build_phase(phase);
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// get configuration object from db
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if(!uvm_config_db#(i2c_config)::get(this, "", "i2c_config", cfg))
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`uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"})
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endfunction: build_phase
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// UVM connect_phase
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function void connect_phase(uvm_phase phase);
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super.connect_phase(phase);
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// get interface from db
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if(!uvm_config_db#(virtual i2c_if)::get(this, "", "i2c_if", vif))
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`uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"})
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endfunction : connect_phase
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// additional class methods
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extern virtual task start_condition(ref event start_e);
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extern virtual task stop_condition(ref event stop_e);
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extern virtual task run_phase(uvm_phase phase);
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extern virtual task collect_transactions();
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extern virtual function void report_phase(uvm_phase phase);
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endclass : i2c_monitor
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// UVM run_phase
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task i2c_monitor::run_phase(uvm_phase phase);
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forever begin
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@(negedge vif.rst); // reset dropped
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`uvm_info(get_type_name(), "Reset dropped", UVM_MEDIUM)
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fork
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@(posedge vif.rst); // reset is active high
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start_condition(start_e);
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stop_condition(stop_e);
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collect_transactions();
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join_any
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disable fork;
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// only way to get here is after reset
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end
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endtask : run_phase
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// trigger event when start
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task i2c_monitor::start_condition(ref event start_e);
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forever begin
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wait(vif.sda_wire !== 1'bx); // don't trigger from an X to 0 transition
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@(negedge vif.sda_wire);
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if(vif.scl_wire === 1'b1) begin
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->start_e;
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end
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end
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endtask : start_condition
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// trigger event when stop
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task i2c_monitor::stop_condition(ref event stop_e);
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forever begin
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wait(vif.sda_wire !== 1'bx); // don't trigger from an X to 1 transition
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@(posedge vif.sda_wire);
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if(vif.scl_wire === 1'b1) begin
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->stop_e;
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end
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end
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endtask : stop_condition
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// monitor i2c interface and collect transactions
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task i2c_monitor::collect_transactions();
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forever begin
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wait(start_e.triggered);
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tr_collected = i2c_transaction::type_id::create("tr_collected", this);
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// address
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tr_collected.addr = 0;
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repeat(ADDR_WIDTH) begin
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@(posedge vif.scl_wire);
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#1;
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tr_collected.addr = {tr_collected.addr[ADDR_WIDTH - 2 : 0], vif.sda_wire};
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end
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// read / write bit
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@(posedge vif.scl_wire);
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#1;
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tr_collected.dir = i2c_direction_enum'(vif.sda_wire);
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// ack bit
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@(posedge vif.scl_wire);
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#1;
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if(vif.sda_wire === 1'b0) tr_collected.addr_ack = I2C_ACK;
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else tr_collected.addr_ack = I2C_NACK;
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if(cfg.has_checks) begin // check for NACK
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asrt_addr_nack : assert (tr_collected.addr_ack == I2C_ACK)
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else
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`uvm_error(get_type_name(), $sformatf("Observed address NACK during %s", tr_collected.dir.name))
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end
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// only if ack
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if(tr_collected.addr_ack == I2C_ACK) begin
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// data
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repeat(DATA_WIDTH) begin
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@(posedge vif.scl_wire);
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#1;
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tr_collected.data = {tr_collected.data[DATA_WIDTH - 2 : 0], vif.sda_wire};
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end
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// ack bit
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@(posedge vif.scl_wire);
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#1;
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if(vif.sda_wire === 1'b0) tr_collected.data_ack = I2C_ACK;
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else tr_collected.data_ack = I2C_NACK;
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if(cfg.has_checks) begin // check for NACK
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asrt_data_nack : assert (tr_collected.data_ack == I2C_ACK)
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else
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`uvm_error(get_type_name(), $sformatf("Observed data NACK during %s", tr_collected.dir.name))
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end
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end
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wait(stop_e.triggered);
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item_collected_port.write(tr_collected); // TLM
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// collect coverage if enabled
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if(cfg.has_coverage == 1) begin
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cg_i2c_monitor.sample();
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end
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`uvm_info(get_type_name(), $sformatf("Tr collected :\n%s", tr_collected.sprint()), UVM_MEDIUM)
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num_transactions++;
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end
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endtask : collect_transactions
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// UVM report_phase
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function void i2c_monitor::report_phase(uvm_phase phase);
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// final report
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`uvm_info( get_type_name(),
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$sformatf("Report: I2C monitor collected: %0d transactions", num_transactions),
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UVM_LOW);
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endfunction : report_phase
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`endif
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