12 lines
270 B
Systemverilog
12 lines
270 B
Systemverilog
`ifndef V5_CALC_TEST_PKG_SV
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`define V5_CALC_TEST_PKG_SV
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package calc_test_pkg;
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// import the UVM library
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`include "uvm_macros.svh" // Include the UVM macros
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import uvm_pkg::*;
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// import test class
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`include "calc_test_simple.sv"
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endpackage
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`include "calc_if.sv"
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`endif;
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