128 lines
4.0 KiB
Systemverilog
128 lines
4.0 KiB
Systemverilog
/****************************************************************************
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+-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+
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|F|u|n|c|t|i|o|n|a|l| |V|e|r|i|f|i|c|a|t|i|o|n| |o|f| |H|a|r|d|w|a|r|e|
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+-+-+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+ +-+-+ +-+-+-+-+-+-+-+-+
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FILE reset_monitor.sv
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DESCRIPTION monitors interface for reset; collects coverage
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****************************************************************************/
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`ifndef RESET_MONITOR_SV
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`define RESET_MONITOR_SV
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/**
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* Class: reset_monitor
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*/
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class reset_monitor extends uvm_monitor;
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// reset virtual interface
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virtual reset_if vif;
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// configuration
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reset_config cfg;
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// TLM - from monitor to other components
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uvm_analysis_port #(reset_transaction) item_collected_port;
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// keep track of number of transactions
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int unsigned num_transactions = 0;
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// current transaction
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reset_transaction tr_collected;
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// UVM factory registration
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`uvm_component_utils_begin(reset_monitor)
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`uvm_field_object(cfg, UVM_DEFAULT | UVM_REFERENCE)
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`uvm_component_utils_end
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// coverage
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covergroup cg_reset;
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// reset duration
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cp_duration : coverpoint tr_collected.duration {
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bins one_clk = {1};
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bins other = default;
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}
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endgroup : cg_reset;
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// new - constructor
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function new(string name = "reset_monitor", uvm_component parent = null);
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super.new(name, parent);
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item_collected_port = new("item_collected_port", this);
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cg_reset = new();
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endfunction : new
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// UVM build_phase
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function void build_phase(uvm_phase phase);
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super.build_phase(phase);
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// get configuration object from db
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if(!uvm_config_db#(reset_config)::get(this, "", "reset_config", cfg))
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`uvm_fatal("NOCONFIG",{"Config object must be set for: ",get_full_name(),".cfg"})
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endfunction: build_phase
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// UVM connect_phase
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function void connect_phase(uvm_phase phase);
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super.connect_phase(phase);
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// get interface from db
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if(!uvm_config_db#(virtual reset_if)::get(this, "", "reset_if", vif))
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`uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"})
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endfunction : connect_phase
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// additional class methods
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extern virtual task run_phase(uvm_phase phase);
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extern virtual function void report_phase(uvm_phase phase);
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endclass : reset_monitor
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// UVM run_phase
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task reset_monitor::run_phase(uvm_phase phase);
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forever begin
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tr_collected = reset_transaction::type_id::create("tr_collected");
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// monitor reset
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if(cfg.active_high) begin
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@(posedge vif.reset);
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end
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else begin
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@(negedge vif.reset);
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end
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`uvm_info(get_type_name(), "Reset observed", UVM_MEDIUM)
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tr_collected.duration = 1;
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fork
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// get duration
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forever begin
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@(posedge vif.clk) tr_collected.duration++;
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end
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// monitor reset dropped
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begin
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if(cfg.active_high) begin
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@(negedge vif.reset);
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end
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else begin
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@(posedge vif.reset);
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end
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end
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join_any
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disable fork;
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item_collected_port.write(tr_collected); // TLM
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// collect coverage if enabled
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if(cfg.has_coverage == 1) begin
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cg_reset.sample();
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end
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num_transactions++;
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end // forever begin
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endtask : run_phase
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// UVM report_phase
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function void reset_monitor::report_phase(uvm_phase phase);
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// final report
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`uvm_info(get_type_name(), $sformatf("Report: reset monitor collected %0d transfers", num_transactions), UVM_LOW);
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endfunction : report_phase
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`endif
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